[AArch64InstPrinter] Change printADRPLabel to print the target address in hexadecimal form

[MaskRay]

Summary

Similar to D77853. Change ADRP to print the target address in hex, instead of the raw immediate.
The behavior is similar to GNU objdump but we also include 0x.

Note: GNU objdump is not consistent whether or not to emit 0x for different architectures. We try emitting 0x consistently for all targets.

GNU objdump:       adrp x16, 10000000
Old llvm-objdump:  adrp x16, #0
New llvm-objdump:  adrp x16, 0x10000000

adrp Xd, 0x... assembles to a relocation referencing *ABS*+0x10000 which is not intended. We need to use a linker or use yaml2obj.
The main test is test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml

[jhenderson]

Looks like there are plenty of failing tests still?

lld/test/ELF/aarch64-feature-btipac.s

174

Would you mind adding the missing new line whilst you are modifying the file, please?

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

1391

What's this calculation about?

[psmith]

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

1391

It looks we are doing more than just change the display the immediate in hex, we are calculating the destination of the instruction. Personally I think that's fine as the destination is almost always more useful than the raw immediate. It also matches GNU objdump in this area.

ADRP is a bit of strange instruction (https://developer.arm.com/docs/ddi0596/i/base-instructions-alphabetic-order/adrp-form-pc-relative-address-to-4kb-page) . It is scaled PC-relative offset from the 4Kib page address of the ADRP instruction.

[MaskRay]

Fix lld/COFF tests

[jhenderson]

LGTM, but I wouldn't mind @psmith or someone else with more AArch64 knowledge confirming the calculation is correct.

[psmith]

The calculation looks good to me. It is logically equivalent to that given in the reference manual

imm = SignExtend(immhi:immlo:Zeros(12), 64); // const int64_t Offset = Op.getImm() << 12;
bits(64) base = PC[];                        // Address

base<11:0> = Zeros(12);                      // (Address & -4096)

X[d] = base + imm;                           // + Offset

[morehouse]

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

1389–1393

This line is causing a UBSan error: http://lab.llvm.org:8011/#/builders/5/builds/2510
Please fix.

/b/sanitizer-x86_64-linux-fast/build/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp:1389:40: runtime error: left shift of negative value -32770

[MaskRay]

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

1389–1393

1bd928e50bb85a1ab8440473abd2a0a4ecd1349a

[Facepalm] C++20 :(

lld/test/ELF/aarch64-condb-reloc.s

 #DSO-NEXT:     1035c: b.eq 0x10390 <_foo@plt>
 #DSO-NEXT:     10360: b.eq 0x103a0 <_bar@plt>
 #DSO-NEXT:     10364: b.eq 0x103b0 <_dah@plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:
 #DSO-NEXT: <.plt>:
 #DSO-NEXT:     10370: stp x16, x30, [sp, #-16]!
-#DSO-NEXT:     10374: adrp x16, #131072
+#DSO-NEXT:     10374: adrp x16, 0x30000
 #DSO-NEXT:     10378: ldr x17, [x16, #1152]
 #DSO-NEXT:     1037c: add x16, x16, #1152
 #DSO-NEXT:     10380: br x17
 #DSO-NEXT:     10384: nop
 #DSO-NEXT:     10388: nop
 #DSO-NEXT:     1038c: nop
 #DSO-EMPTY:
 #DSO-NEXT:   <_foo@plt>:
-#DSO-NEXT:     10390: adrp x16, #131072
+#DSO-NEXT:     10390: adrp x16, 0x30000
 #DSO-NEXT:     10394: ldr x17, [x16, #1160]
 #DSO-NEXT:     10398: add x16, x16, #1160
 #DSO-NEXT:     1039c: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   <_bar@plt>:
-#DSO-NEXT:     103a0: adrp x16, #131072
+#DSO-NEXT:     103a0: adrp x16, 0x30000
 #DSO-NEXT:     103a4: ldr x17, [x16, #1168]
 #DSO-NEXT:     103a8: add x16, x16, #1168
 #DSO-NEXT:     103ac: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   <_dah@plt>:
-#DSO-NEXT:     103b0: adrp x16, #131072
+#DSO-NEXT:     103b0: adrp x16, 0x30000
 #DSO-NEXT:     103b4: ldr x17, [x16, #1176]
 #DSO-NEXT:     103b8: add x16, x16, #1176
 #DSO-NEXT:     103bc: br x17
 
 .globl _start
 _start:
  b.eq _foo
  b.eq _bar
  b.eq _dah

lld/test/ELF/aarch64-copy.s

 // CHECK: ]
 
 // CODE: Disassembly of section .text:
 // CODE-EMPTY:
 // CODE-NEXT: <_start>:
 // S + A - P = 0x2303f0 + 0 - 0x21031c = 131284
 // CODE-NEXT:  21031c: adr  x1, #131284
 // Page(S + A) - Page(P) = Page(0x230400) - Page(0x210320) = 131072
-// CODE-NEXT:  210320: adrp x2, #131072
+// CODE-NEXT:  210320: adrp x2, 0x230000
 // (S + A) & 0xFFF = (0x230400 + 0) & 0xFFF = 1024
 // CODE-NEXT:  210324: add  x2, x2, #1024
 
 // RODATA: Contents of section .rodata:
 // S(z) = 0x230404
 // RODATA-NEXT:  200318 04042300

lld/test/ELF/aarch64-cortex-a53-843419-address.s

 // - We can handle a patch in more than range of code, with literal data
 //   inbetween.
 // - We can handle redundant mapping symbols (two or more consecutive mapping
 //   symbols with the same type).
 // - We can ignore erratum sequences in multiple literal data ranges.
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.
 // CHECK: <t3_ff8_ldr>:
-// CHECK-NEXT:      ff8:        20 00 00 d0     adrp    x0, #24576
+// CHECK-NEXT:      ff8:        20 00 00 d0     adrp    x0, 0x6000
 // CHECK-NEXT:      ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-NEXT:     1000:        f9 0f 00 14     b       0x4fe4
 // CHECK-NEXT:     1004:        c0 03 5f d6     ret
         .section .text.01, "ax", %progbits
         .balign 4096
         .space 4096 - 8
         .globl t3_ff8_ldr
         .type t3_ff8_ldr, %function
 t3_ff8_ldr:
         adrp x0, dat
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat]
         ret
 
         // create a redundant mapping symbol as we are already in a $x range
         // some object producers unconditionally generate a mapping symbol on
         // every symbol so we need to handle the case of $x $x.
         .local $x.999
 $x.999:
 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.
 // CHECK: <t3_ffc_ldrsimd>:
-// CHECK-NEXT:     1ffc:        20 00 00 b0     adrp    x0, #20480
+// CHECK-NEXT:     1ffc:        20 00 00 b0     adrp    x0, 0x6000
 // CHECK-NEXT:     2000:        21 00 40 bd     ldr             s1, [x1]
 // CHECK-NEXT:     2004:        fa 0b 00 14     b       0x4fec
 // CHECK-NEXT:     2008:        c0 03 5f d6     ret
         .globl t3_ffc_ldrsimd
         .type t3_ffc_ldrsimd, %function
         .space 4096 - 12
 t3_ffc_ldrsimd:
         adrp x0, dat
t3_ff8_ldralldata:
         .byte 0x00
         .byte 0x00
         .byte 0x40
         .byte 0xf9
         // Check that we can recognise the erratum sequence post literal data.
 
 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.
 // CHECK: <t3_ffc_ldr>:
-// CHECK-NEXT:     3ff8:        00 00 00 f0     adrp    x0, #12288
+// CHECK-NEXT:     3ff8:        00 00 00 f0     adrp    x0, 0x6000
 // CHECK-NEXT:     3ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-NEXT:     4000:        fd 03 00 14     b       0x4ff4
 // CHECK-NEXT:     4004:        c0 03 5f d6     ret
         .space 4096 - 12
         .globl t3_ffc_ldr
         .type t3_ffc_ldr, %function
  t3_ffc_ldr:
         adrp x0, dat
// CHECK-NEXT:     4ff8:        03 fc ff 17     b       0x4004
         .space 4096 - 36
 
         // Start a new InputSectionDescription (see Linker Script) so the
         // start address will be affected by any patches added to previous
         // InputSectionDescription.
 
 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output
 // CHECK: <t3_ffc_str>:
-// CHECK-NEXT:     4ffc:        00 00 00 d0     adrp    x0, #8192
+// CHECK-NEXT:     4ffc:        00 00 00 d0     adrp    x0, 0x6000
 // CHECK-NEXT:     5000:        21 00 00 f9     str             x1, [x1]
 // CHECK-NEXT:     5004:        fb 03 00 14     b       0x5ff0
 // CHECK-NEXT:     5008:        c0 03 5f d6     ret
 
         .section .newisd, "ax", %progbits
         .globl t3_ffc_str
         .type t3_ffc_str, %function
 t3_ffc_str:
         adrp x0, dat
         str x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat]
         ret
         .space 4096 - 28
 
 // CHECK: <__CortexA53843419_5004>:
 // CHECK-NEXT:     5ff0:        00 0c 40 f9     ldr     x0, [x0, #24]
 // CHECK-NEXT:     5ff4:        05 fc ff 17     b       0x5008
 
         // Start a new OutputSection (see Linker Script) so the
         // start address will be affected by any patches added to previous
         // InputSectionDescription.
 
 //CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output
 // CHECK: <t3_ff8_str>:
-// CHECK-NEXT:     5ff8:        00 00 00 b0     adrp    x0, #4096
+// CHECK-NEXT:     5ff8:        00 00 00 b0     adrp    x0, 0x6000
 // CHECK-NEXT:     5ffc:        21 00 00 f9     str             x1, [x1]
 // CHECK-NEXT:     6000:        03 00 00 14     b       0x600c
 // CHECK-NEXT:     6004:        c0 03 5f d6     ret
 
         .section .newos, "ax", %progbits
         .globl t3_ff8_str
         .type t3_ff8_str, %function
 t3_ff8_str:

lld/test/ELF/aarch64-cortex-a53-843419-large.s

// CHECK2-NEXT:    211000:       00 fc ff 97     bl      0x210000
         .type t3_ff8_ldr, %function
 t3_ff8_ldr:
         adrp x0, dat
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat]
         ret
 
 // CHECK3: <t3_ff8_ldr>:
-// CHECK3-NEXT:    211ff8:       e0 00 04 f0     adrp    x0, #134344704
+// CHECK3-NEXT:    211ff8:       e0 00 04 f0     adrp    x0, 0x8230000
 // CHECK3-NEXT:    211ffc:       21 00 40 f9     ldr     x1, [x1]
 // CHECK3-NEXT:    212000:       02 08 80 15     b       0x6214008
 // CHECK3-NEXT:    212004:       c0 03 5f d6     ret
 
         .section .text.04, "ax", %progbits
         .space 64 * 1024 * 1024
 
         // Expect patch on pass 1
         .section .text.05, "ax", %progbits
         .balign 4096
         .space 4096 - 8
         .globl t3_ff8_str
         .type t3_ff8_str, %function
 t3_ff8_str:
         adrp x0, dat
         ldr x1, [x1, #0]
         str x0, [x0, :got_lo12:dat]
         ret
 
 // CHECK4: <t3_ff8_str>:
-// CHECK4-NEXT:  4213ff8:       e0 00 02 b0     adrp    x0, #67227648
+// CHECK4-NEXT:  4213ff8:       e0 00 02 b0     adrp    x0, 0x8230000
 // CHECK4-NEXT:  4213ffc:       21 00 40 f9     ldr     x1, [x1]
 // CHECK4-NEXT:  4214000:       04 00 80 14     b       0x6214010
 // CHECK4-NEXT:  4214004:       c0 03 5f d6     ret
 
         .section .text.06, "ax", %progbits
         .space 32 * 1024 * 1024
 
 // CHECK5: <__CortexA53843419_211000>:
// CHECK6-NEXT:  821100c:       c0 03 5f d6     ret
         .type t3_ffc_ldr, %function
 t3_ffc_ldr:
         adrp x0, dat
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat]
         ret
 
 // CHECK7: <t3_ffc_ldr>:
-// CHECK7-NEXT:  8211ffc:       e0 00 00 f0     adrp    x0, #126976
+// CHECK7-NEXT:  8211ffc:       e0 00 00 f0     adrp    x0, 0x8230000
 // CHECK7-NEXT:  8212000:       21 00 40 f9     ldr     x1, [x1]
 // CHECK7-NEXT:  8212004:       02 00 00 14     b       0x821200c
 // CHECK7-NEXT:  8212008:       c0 03 5f d6     ret
 // CHECK7: <__CortexA53843419_8212004>:
 // CHECK7-NEXT:  821200c:       00 00 40 f9     ldr     x0, [x0]
 // CHECK7-NEXT:  8212010:       fe ff ff 17     b       0x8212008
 
         .section .data
         .globl dat
 dat:    .quad 0

lld/test/ELF/aarch64-cortex-a53-843419-recognize.s

 // as erratum 843419. The test cases cover the major variations such as:
 // - adrp starts at 0xfff8 or 0xfffc.
 // - Variations in instruction class for instruction 2.
 // - Optional instruction 3 present or not.
 // - Load or store for instruction 4.
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 211FF8 in unpatched output.
 // CHECK: <t3_ff8_ldr>:
-// CHECK-NEXT:    211ff8:        60 02 00 f0     adrp    x0, #323584
+// CHECK-NEXT:    211ff8:        60 02 00 f0     adrp    x0, 0x260000
 // CHECK-NEXT:    211ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-FIX:     212000:        03 c8 00 14     b       0x24400c
 // CHECK-NOFIX:   212000:        00 00 40 f9     ldr             x0, [x0]
 // CHECK-NEXT:    212004:        c0 03 5f d6     ret
 // CHECK-RELOCATABLE: <t3_ff8_ldr>:
-// CHECK-RELOCATABLE-NEXT:    ff8:        00 00 00 90     adrp    x0, #0
+// CHECK-RELOCATABLE-NEXT:    ff8:        00 00 00 90     adrp    x0, 0x0
 // CHECK-RELOCATABLE-NEXT:    ffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-RELOCATABLE-NEXT:   1000:        00 00 40 f9     ldr             x0, [x0]
 // CHECK-RELOCATABLE-NEXT:   1004:        c0 03 5f d6     ret
 
         .section .text.01, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldr
         .type t3_ff8_ldr, %function
         .space 4096 - 8
 t3_ff8_ldr:
         adrp x0, dat1
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 213FF8 in unpatched output.
 // CHECK: <t3_ff8_ldrsimd>:
-// CHECK-NEXT:    213ff8:        60 02 00 b0     adrp    x0, #315392
+// CHECK-NEXT:    213ff8:        60 02 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    213ffc:        21 00 40 bd     ldr             s1, [x1]
 // CHECK-FIX:     214000:        05 c0 00 14     b       0x244014
 // CHECK-NOFIX:   214000:        02 04 40 f9     ldr     x2, [x0, #8]
 // CHECK-NEXT:    214004:        c0 03 5f d6     ret
         .section .text.02, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldrsimd
         .type t3_ff8_ldrsimd, %function
         .space 4096 - 8
 t3_ff8_ldrsimd:
         adrp x0, dat2
         ldr s1, [x1, #0]
         ldr x2, [x0, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 215FFC in unpatched output.
 // CHECK: <t3_ffc_ldrpost>:
-// CHECK-NEXT:    215ffc:        40 02 00 f0     adrp    x0, #307200
+// CHECK-NEXT:    215ffc:        40 02 00 f0     adrp    x0, 0x260000
 // CHECK-NEXT:    216000:        21 84 40 bc     ldr     s1, [x1], #8
 // CHECK-FIX:     216004:        06 b8 00 14     b       0x24401c
 // CHECK-NOFIX:   216004:        03 08 40 f9     ldr     x3, [x0, #16]
 // CHECK-NEXT:    216008:        c0 03 5f d6     ret
         .section .text.03, "ax", %progbits
         .balign 4096
         .globl t3_ffc_ldrpost
         .type t3_ffc_ldrpost, %function
         .space 4096 - 4
 t3_ffc_ldrpost:
         adrp x0, dat3
         ldr s1, [x1], #8
         ldr x3, [x0, :got_lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 217FF8 in unpatched output.
 // CHECK: <t3_ff8_strpre>:
-// CHECK-NEXT:    217ff8:        40 02 00 b0     adrp    x0, #299008
+// CHECK-NEXT:    217ff8:        40 02 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    217ffc:        21 8c 00 bc     str     s1, [x1, #8]!
 // CHECK-FIX:     218000:        09 b0 00 14     b       0x244024
 // CHECK-NOFIX:   218000:        02 0c 40 f9     ldr     x2, [x0, #24]
 // CHECK-NEXT:    218004:        c0 03 5f d6     ret
         .section .text.04, "ax", %progbits
         .balign 4096
         .globl t3_ff8_strpre
         .type t3_ff8_strpre, %function
         .space 4096 - 8
 t3_ff8_strpre:
         adrp x0, dat1
         str s1, [x1, #8]!
         ldr x2, [x0, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 219FFC in unpatched output.
 // CHECK: <t3_ffc_str>:
-// CHECK-NEXT:    219ffc:        3c 02 00 f0     adrp    x28, #290816
+// CHECK-NEXT:    219ffc:        3c 02 00 f0     adrp    x28, 0x260000
 // CHECK-NEXT:    21a000:        42 00 00 f9     str             x2, [x2]
 // CHECK-FIX:     21a004:        0a a8 00 14     b       0x24402c
 // CHECK-NOFIX:   21a004:        9c 13 00 f9     str     x28, [x28, #32]
 // CHECK-NEXT:    21a008:        c0 03 5f d6     ret
         .section .text.05, "ax", %progbits
         .balign 4096
         .globl t3_ffc_str
         .type t3_ffc_str, %function
         .space 4096 - 4
 t3_ffc_str:
         adrp x28, dat2
         str x2, [x2, #0]
         str x28, [x28, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21BFFC in unpatched output.
 // CHECK: <t3_ffc_strsimd>:
-// CHECK-NEXT:    21bffc:        3c 02 00 b0     adrp    x28, #282624
+// CHECK-NEXT:    21bffc:        3c 02 00 b0     adrp    x28, 0x260000
 // CHECK-NEXT:    21c000:        44 00 00 b9     str             w4, [x2]
 // CHECK-FIX:     21c004:        0c a0 00 14     b       0x244034
 // CHECK-NOFIX:   21c004:        84 17 00 f9     str     x4, [x28, #40]
 // CHECK-NEXT:    21c008:        c0 03 5f d6     ret
         .section .text.06, "ax", %progbits
         .balign 4096
         .globl t3_ffc_strsimd
         .type t3_ffc_strsimd, %function
         .space 4096 - 4
 t3_ffc_strsimd:
         adrp x28, dat3
         str w4, [x2, #0]
         str x4, [x28, :lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21DFF8 in unpatched output.
 // CHECK: <t3_ff8_ldrunpriv>:
-// CHECK-NEXT:    21dff8:        1d 02 00 f0     adrp    x29, #274432
+// CHECK-NEXT:    21dff8:        1d 02 00 f0     adrp    x29, 0x260000
 // CHECK-NEXT:    21dffc:        41 08 40 38     ldtrb           w1, [x2]
 // CHECK-FIX:     21e000:        0f 98 00 14     b       0x24403c
 // CHECK-NOFIX:   21e000:        bd 03 40 f9     ldr             x29, [x29]
 // CHECK-NEXT:    21e004:        c0 03 5f d6     ret
         .section .text.07, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldrunpriv
         .type t3_ff8_ldrunpriv, %function
         .space 4096 - 8
 t3_ff8_ldrunpriv:
         adrp x29, dat1
         ldtrb w1, [x2, #0]
         ldr x29, [x29, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 21FFFC in unpatched output.
 // CHECK: <t3_ffc_ldur>:
-// CHECK-NEXT:    21fffc:        1d 02 00 b0     adrp    x29, #266240
+// CHECK-NEXT:    21fffc:        1d 02 00 b0     adrp    x29, 0x260000
 // CHECK-NEXT:    220000:        42 40 40 b8     ldur    w2, [x2, #4]
 // CHECK-FIX:     220004:        10 90 00 14     b       0x244044
 // CHECK-NOFIX:   220004:        bd 07 40 f9     ldr     x29, [x29, #8]
 // CHECK-NEXT:    220008:        c0 03 5f d6     ret
         .balign 4096
         .globl t3_ffc_ldur
         .type t3_ffc_ldur, %function
         .space 4096 - 4
 t3_ffc_ldur:
         adrp x29, dat2
         ldur w2, [x2, #4]
         ldr x29, [x29, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 221FFC in unpatched output.
 // CHECK: <t3_ffc_sturh>:
-// CHECK-NEXT:    221ffc:        f2 01 00 f0     adrp    x18, #258048
+// CHECK-NEXT:    221ffc:        f2 01 00 f0     adrp    x18, 0x260000
 // CHECK-NEXT:    222000:        43 40 00 78     sturh   w3, [x2, #4]
 // CHECK-FIX:     222004:        12 88 00 14     b       0x24404c
 // CHECK-NOFIX:   222004:        41 0a 40 f9     ldr     x1, [x18, #16]
 // CHECK-NEXT:    222008:        c0 03 5f d6     ret
         .section .text.09, "ax", %progbits
         .balign 4096
         .globl t3_ffc_sturh
         .type t3_ffc_sturh, %function
         .space 4096 - 4
 t3_ffc_sturh:
         adrp x18, dat3
         sturh w3, [x2, #4]
         ldr x1, [x18, :got_lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 223FF8 in unpatched output.
 // CHECK: <t3_ff8_literal>:
-// CHECK-NEXT:    223ff8:        f2 01 00 b0     adrp    x18, #249856
+// CHECK-NEXT:    223ff8:        f2 01 00 b0     adrp    x18, 0x260000
 // CHECK-NEXT:    223ffc:        e3 ff ff 58     ldr     x3, 0x223ff8
 // CHECK-FIX:     224000:        15 80 00 14     b       0x244054
 // CHECK-NOFIX:   224000:        52 0e 40 f9     ldr     x18, [x18, #24]
 // CHECK-NEXT:    224004:        c0 03 5f d6     ret
         .section .text.10, "ax", %progbits
         .balign 4096
         .globl t3_ff8_literal
         .type t3_ff8_literal, %function
         .space 4096 - 8
 t3_ff8_literal:
         adrp x18, dat1
         ldr x3, t3_ff8_literal
         ldr x18, [x18, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 225FFC in unpatched output.
 // CHECK: <t3_ffc_register>:
-// CHECK-NEXT:    225ffc:        cf 01 00 f0     adrp    x15, #241664
+// CHECK-NEXT:    225ffc:        cf 01 00 f0     adrp    x15, 0x260000
 // CHECK-NEXT:    226000:        43 68 61 f8     ldr             x3, [x2, x1]
 // CHECK-FIX:     226004:        16 78 00 14     b       0x24405c
 // CHECK-NOFIX:   226004:        ea 11 40 f9     ldr     x10, [x15, #32]
 // CHECK-NEXT:    226008:        c0 03 5f d6     ret
         .section .text.11, "ax", %progbits
         .balign 4096
         .globl t3_ffc_register
         .type t3_ffc_register, %function
         .space 4096 - 4
 t3_ffc_register:
         adrp x15, dat2
         ldr x3, [x2, x1]
         ldr x10, [x15, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 227FF8 in unpatched output.
 // CHECK: <t3_ff8_stp>:
-// CHECK-NEXT:    227ff8:        d0 01 00 b0     adrp    x16, #233472
+// CHECK-NEXT:    227ff8:        d0 01 00 b0     adrp    x16, 0x260000
 // CHECK-NEXT:    227ffc:        61 08 00 a9     stp             x1, x2, [x3]
 // CHECK-FIX:     228000:        19 70 00 14     b       0x244064
 // CHECK-NOFIX:   228000:        0d 16 40 f9     ldr     x13, [x16, #40]
 // CHECK-NEXT:    228004:        c0 03 5f d6     ret
         .section .text.12, "ax", %progbits
         .balign 4096
         .globl t3_ff8_stp
         .type t3_ff8_stp, %function
         .space 4096 - 8
 t3_ff8_stp:
         adrp x16, dat3
         stp x1,x2, [x3, #0]
         ldr x13, [x16, :lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 229FFC in unpatched output.
 // CHECK: <t3_ffc_stnp>:
-// CHECK-NEXT:    229ffc:        a7 01 00 f0     adrp    x7, #225280
+// CHECK-NEXT:    229ffc:        a7 01 00 f0     adrp    x7, 0x260000
 // CHECK-NEXT:    22a000:        61 08 00 a8     stnp            x1, x2, [x3]
 // CHECK-FIX:     22a004:        1a 68 00 14     b       0x24406c
 // CHECK-NOFIX:   22a004:        e9 0c 40 f9     ldr             x9, [x7, #24]
 // CHECK-NEXT:    22a008:        c0 03 5f d6     ret
         .section .text.13, "ax", %progbits
         .balign 4096
         .globl t3_ffc_stnp
         .type t3_ffc_stnp, %function
         .space 4096 - 4
 t3_ffc_stnp:
         adrp x7, dat1
         stnp x1,x2, [x3, #0]
         ldr x9, [x7, :lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22BFFC in unpatched output.
 // CHECK: <t3_ffc_st1singlepost>:
-// CHECK-NEXT:    22bffc:        b7 01 00 b0     adrp    x23, #217088
+// CHECK-NEXT:    22bffc:        b7 01 00 b0     adrp    x23, 0x260000
 // CHECK-NEXT:    22c000:        20 04 82 0d     st1 { v0.b }[1], [x1], x2
 // CHECK-FIX:     22c004:        1c 60 00 14     b       0x244074
 // CHECK-NOFIX:   22c004:        f6 12 40 f9     ldr     x22, [x23, #32]
 // CHECK-NEXT:    22c008:        c0 03 5f d6     ret
         .section .text.14, "ax", %progbits
         .balign 4096
         .globl t3_ffc_st1singlepost
         .type t3_ffc_st1singlepost, %function
         .space 4096 - 4
 t3_ffc_st1singlepost:
         adrp x23, dat2
         st1 { v0.b }[1], [x1], x2
         ldr x22, [x23, :lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22DFF8 in unpatched output.
 // CHECK: <t3_ff8_st1multiple>:
-// CHECK-NEXT:    22dff8:        97 01 00 f0     adrp    x23, #208896
+// CHECK-NEXT:    22dff8:        97 01 00 f0     adrp    x23, 0x260000
 // CHECK-NEXT:    22dffc:        20 a0 00 4c     st1     { v0.16b, v1.16b }, [x1]
 // CHECK-FIX:     22e000:        1f 58 00 14     b       0x24407c
 // CHECK-NOFIX:   22e000:        f8 16 40 f9     ldr     x24, [x23, #40]
 // CHECK-NEXT:    22e004:        c0 03 5f d6     ret
         .section .text.15, "ax", %progbits
         .balign 4096
         .globl t3_ff8_st1multiple
         .type t3_ff8_st1muliple, %function
         .space 4096 - 8
 t3_ff8_st1multiple:
         adrp x23, dat3
         st1 { v0.16b, v1.16b }, [x1]
         ldr x24, [x23, :lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 22FFF8 in unpatched output.
 // CHECK: <t4_ff8_ldr>:
-// CHECK-NEXT:    22fff8:        80 01 00 b0     adrp    x0, #200704
+// CHECK-NEXT:    22fff8:        80 01 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    22fffc:        21 00 40 f9     ldr             x1, [x1]
 // CHECK-NEXT:    230000:        42 00 00 8b     add             x2, x2, x0
 // CHECK-FIX:     230004:        20 50 00 14     b       0x244084
 // CHECK-NOFIX:   230004:        02 00 40 f9     ldr             x2, [x0]
 // CHECK-NEXT:    230008:        c0 03 5f d6     ret
         .section .text.16, "ax", %progbits
         .balign 4096
         .globl t4_ff8_ldr
         .type t4_ff8_ldr, %function
         .space 4096 - 8
 t4_ff8_ldr:
         adrp x0, dat1
         ldr x1, [x1, #0]
         add x2, x2, x0
         ldr x2, [x0, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 231FFC in unpatched output.
 // CHECK: <t4_ffc_str>:
-// CHECK-NEXT:    231ffc:        7c 01 00 f0     adrp    x28, #192512
+// CHECK-NEXT:    231ffc:        7c 01 00 f0     adrp    x28, 0x260000
 // CHECK-NEXT:    232000:        42 00 00 f9     str             x2, [x2]
 // CHECK-NEXT:    232004:        20 00 02 cb     sub             x0, x1, x2
 // CHECK-FIX:     232008:        21 48 00 14     b       0x24408c
 // CHECK-NOFIX:   232008:        9b 07 00 f9     str     x27, [x28, #8]
 // CHECK-NEXT:    23200c:        c0 03 5f d6     ret
         .section .text.17, "ax", %progbits
         .balign 4096
         .globl t4_ffc_str
         .type t4_ffc_str, %function
         .space 4096 - 4
 t4_ffc_str:
         adrp x28, dat2
         str x2, [x2, #0]
         sub x0, x1, x2
         str x27, [x28, :got_lo12:dat2]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 233FF8 in unpatched output.
 // CHECK: <t4_ff8_stp>:
-// CHECK-NEXT:    233ff8:        70 01 00 b0     adrp    x16, #184320
+// CHECK-NEXT:    233ff8:        70 01 00 b0     adrp    x16, 0x260000
 // CHECK-NEXT:    233ffc:        61 08 00 a9     stp             x1, x2, [x3]
 // CHECK-NEXT:    234000:        03 7e 10 9b     mul             x3, x16, x16
 // CHECK-FIX:     234004:        24 40 00 14     b       0x244094
 // CHECK-NOFIX:   234004:        0e 0a 40 f9     ldr     x14, [x16, #16]
 // CHECK-NEXT:    234008:        c0 03 5f d6     ret
         .section .text.18, "ax", %progbits
         .balign 4096
         .globl t4_ff8_stp
         .type t4_ff8_stp, %function
         .space 4096 - 8
 t4_ff8_stp:
         adrp x16, dat3
         stp x1,x2, [x3, #0]
         mul x3, x16, x16
         ldr x14, [x16, :got_lo12:dat3]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 235FF8 in unpatched output.
 // CHECK: <t4_ff8_stppre>:
-// CHECK-NEXT:    235ff8:        50 01 00 f0     adrp    x16, #176128
+// CHECK-NEXT:    235ff8:        50 01 00 f0     adrp    x16, 0x260000
 // CHECK-NEXT:    235ffc:        61 08 81 a9     stp     x1, x2, [x3, #16]!
 // CHECK-NEXT:    236000:        03 7e 10 9b     mul             x3, x16, x16
 // CHECK-FIX:     236004:        26 38 00 14     b       0x24409c
 // CHECK-NOFIX:   236004:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    236008:        c0 03 5f d6     ret
         .section .text.19, "ax", %progbits
         .balign 4096
         .globl t4_ff8_stppre
         .type t4_ff8_stppre, %function
         .space 4096 - 8
 t4_ff8_stppre:
         adrp x16, dat1
         stp x1,x2, [x3, #16]!
         mul x3, x16, x16
         ldr x14, [x16, #8]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 237FF8 in unpatched output.
 // CHECK: <t4_ff8_stppost>:
-// CHECK-NEXT:    237ff8:        50 01 00 b0     adrp    x16, #167936
+// CHECK-NEXT:    237ff8:        50 01 00 b0     adrp    x16, 0x260000
 // CHECK-NEXT:    237ffc:        61 08 81 a8     stp     x1, x2, [x3], #16
 // CHECK-NEXT:    238000:        03 7e 10 9b     mul             x3, x16, x16
 // CHECK-FIX:     238004:        28 30 00 14     b       0x2440a4
 // CHECK-NOFIX:   238004:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    238008:        c0 03 5f d6     ret
         .section .text.20, "ax", %progbits
         .balign 4096
         .globl t4_ff8_stppost
         .type t4_ff8_stppost, %function
         .space 4096 - 8
 t4_ff8_stppost:
         adrp x16, dat2
         stp x1,x2, [x3], #16
         mul x3, x16, x16
         ldr x14, [x16, #8]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 239FFC in unpatched output.
 // CHECK: <t4_ffc_stpsimd>:
-// CHECK-NEXT:    239ffc:        30 01 00 f0     adrp    x16, #159744
+// CHECK-NEXT:    239ffc:        30 01 00 f0     adrp    x16, 0x260000
 // CHECK-NEXT:    23a000:        61 08 00 ad     stp             q1, q2, [x3]
 // CHECK-NEXT:    23a004:        03 7e 10 9b     mul             x3, x16, x16
 // CHECK-FIX:     23a008:        29 28 00 14     b       0x2440ac
 // CHECK-NOFIX:   23a008:        0e 06 40 f9     ldr     x14, [x16, #8]
 // CHECK-NEXT:    23a00c:        c0 03 5f d6     ret
         .section .text.21, "ax", %progbits
         .balign 4096
         .globl t4_ffc_stpsimd
         .type t4_ffc_stpsimd, %function
         .space 4096 - 4
 t4_ffc_stpsimd:
         adrp x16, dat3
         stp q1,q2, [x3, #0]
         mul x3, x16, x16
         ldr x14, [x16, #8]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23BFFC in unpatched output.
 // CHECK: <t4_ffc_stnp>:
-// CHECK-NEXT:    23bffc:        27 01 00 b0     adrp    x7, #151552
+// CHECK-NEXT:    23bffc:        27 01 00 b0     adrp    x7, 0x260000
 // CHECK-NEXT:    23c000:        61 08 00 a8     stnp            x1, x2, [x3]
 // CHECK-NEXT:    23c004:        1f 20 03 d5     nop
 // CHECK-FIX:     23c008:        2b 20 00 14     b       0x2440b4
 // CHECK-NOFIX:   23c008:        ea 00 40 f9     ldr             x10, [x7]
 // CHECK-NEXT:    23c00c:        c0 03 5f d6     ret
         .section .text.22, "ax", %progbits
         .balign 4096
         .globl t4_ffc_stnp
         .type t4_ffc_stnp, %function
         .space 4096 - 4
 t4_ffc_stnp:
         adrp x7, dat1
         stnp x1,x2, [x3, #0]
         nop
         ldr x10, [x7, :got_lo12:dat1]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23DFFC in unpatched output.
 // CHECK: <t4_ffc_st1>:
-// CHECK-NEXT:    23dffc:        18 01 00 f0     adrp    x24, #143360
+// CHECK-NEXT:    23dffc:        18 01 00 f0     adrp    x24, 0x260000
 // CHECK-NEXT:    23e000:        20 80 00 4d     st1 { v0.s }[2], [x1]
 // CHECK-NEXT:    23e004:        f6 06 40 f9     ldr     x22, [x23, #8]
 // CHECK-FIX:     23e008:        2d 18 00 14     b       0x2440bc
 // CHECK-NOFIX:   23e008:        18 ff 3f f9     str     x24, [x24, #32760]
 // CHECK-NEXT:    23e00c:        c0 03 5f d6     ret
         .section .text.23, "ax", %progbits
         .balign 4096
         .globl t4_ffc_st1
         .type t4_ffc_st1, %function
         .space 4096 - 4
 t4_ffc_st1:
         adrp x24, dat2
         st1 { v0.s }[2], [x1]
         ldr x22, [x23, :got_lo12:dat2]
         str x24, [x24, #32760]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 23FFF8 in unpatched output.
 // CHECK: <t3_ff8_ldr_once>:
-// CHECK-NEXT:    23fff8:        00 01 00 b0     adrp    x0, #135168
+// CHECK-NEXT:    23fff8:        00 01 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    23fffc:        20 70 82 4c     st1     { v0.16b }, [x1], x2
 // CHECK-FIX:     240000:        31 10 00 14     b       0x2440c4
 // CHECK-NOFIX:   240000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK-NEXT:    240004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    240008:        c0 03 5f d6     ret
         .section .text.24, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldr_once
         .type t3_ff8_ldr_once, %function
         .space 4096 - 8
 t3_ff8_ldr_once:
         adrp x0, dat3
         st1 { v0.16b }, [x1], x2
         ldr x1, [x0, #16]
         ldr x2, [x0, #16]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 241FF8 in unpatched output.
 // CHECK: <t3_ff8_ldxr>:
-// CHECK-NEXT:    241ff8:        e0 00 00 f0     adrp    x0, #126976
+// CHECK-NEXT:    241ff8:        e0 00 00 f0     adrp    x0, 0x260000
 // CHECK-NEXT:    241ffc:        03 7c 5f c8     ldxr    x3, [x0]
 // CHECK-FIX:     242000:        33 08 00 14     b       0x2440cc
 // CHECK-NOFIX:   242000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK:         242004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    242008:        c0 03 5f d6     ret
         .section .text.25, "ax", %progbits
         .balign 4096
         .globl t3_ff8_ldxr
         .type t3_ff8_ldxr, %function
         .space 4096 - 8
 t3_ff8_ldxr:
         adrp x0, dat3
         ldxr x3, [x0]
         ldr x1, [x0, #16]
         ldr x2, [x0, #16]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 243FF8 in unpatched output.
 // CHECK: <t3_ff8_stxr>:
-// CHECK-NEXT:    243ff8:        e0 00 00 b0     adrp    x0, #118784
+// CHECK-NEXT:    243ff8:        e0 00 00 b0     adrp    x0, 0x260000
 // CHECK-NEXT:    243ffc:        03 7c 04 c8     stxr    w4, x3, [x0]
 // CHECK-FIX:     244000:        35 00 00 14     b       0x2440d4
 // CHECK-NOFIX:   244000:        01 08 40 f9     ldr     x1, [x0, #16]
 // CHECK:         244004:        02 08 40 f9     ldr     x2, [x0, #16]
 // CHECK-NEXT:    244008:        c0 03 5f d6     ret
         .section .text.26, "ax", %progbits
         .balign 4096
         .globl t3_ff8_stxr

lld/test/ELF/aarch64-cortex-a53-843419-thunk.s

 t3_ff8_ldr:
         adrp x0, dat
         ldr x1, [x1, #0]
         ldr x0, [x0, :got_lo12:dat]
         ret
 
 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 10FF8 in unpatched output.
 // CHECK: 0000000000010ff8 <t3_ff8_ldr>:
-// CHECK-NEXT: adrp    x0, #134217728
+// CHECK-NEXT: adrp    x0, 0x8010000
 // CHECK-NEXT: ldr     x1, [x1]
 // CHECK-NEXT: b       0x11008
 // CHECK-NEXT: ret
 // CHECK: 0000000000011008 <__CortexA53843419_11000>:
 // CHECK-NEXT: ldr     x0, [x0, #8]
 // CHECK-NEXT: b       0x11004
         .section .text.04, "ax", %progbits
         .globl far_away
         .type far_away, function
 far_away:
         ret
 
         .section .data
         .globl dat
 dat:    .quad 0

lld/test/ELF/aarch64-feature-bti.s

 # NOBTIDYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 # NOBTI: 00000000000102b8 <func2>:
 # NOBTI-NEXT:    102b8: bl      0x102f0 <func3@plt>
 # NOBTI-NEXT:    102bc: ret
 # NOBTI: Disassembly of section .plt:
 # NOBTI: 00000000000102d0 <.plt>:
 # NOBTI-NEXT:    102d0: stp     x16, x30, [sp, #-16]!
-# NOBTI-NEXT:    102d4: adrp    x16, #131072
+# NOBTI-NEXT:    102d4: adrp    x16, 0x30000
 # NOBTI-NEXT:    102d8: ldr     x17, [x16, #960]
 # NOBTI-NEXT:    102dc: add     x16, x16, #960
 # NOBTI-NEXT:    102e0: br      x17
 # NOBTI-NEXT:    102e4: nop
 # NOBTI-NEXT:    102e8: nop
 # NOBTI-NEXT:    102ec: nop
 # NOBTI: 00000000000102f0 <func3@plt>:
-# NOBTI-NEXT:    102f0: adrp    x16, #131072
+# NOBTI-NEXT:    102f0: adrp    x16, 0x30000
 # NOBTI-NEXT:    102f4: ldr     x17, [x16, #968]
 # NOBTI-NEXT:    102f8: add     x16, x16, #968
 # NOBTI-NEXT:    102fc: br      x17
 
 ## The .got.plt should be identical between the BTI and no BTI DSO PLT.
 # SOGOTPLT: Hex dump of section '.got.plt'
 # SOGOTPLT-NEXT:  0x000303b0 00000000 00000000 00000000 00000000
 # SOGOTPLT-NEXT:  0x000303c0 00000000 00000000 d0020100 00000000

 # BTISO-NEXT:    10348: bl      0x10380 <func3@plt>
 # BTISO-NEXT:           ret
 # BTISO: 0000000000010350 <func3>:
 # BTISO-NEXT:    10350: ret
 # BTISO: Disassembly of section .plt:
 # BTISO: 0000000000010360 <.plt>:
 # BTISO-NEXT:    10360: bti     c
 # BTISO-NEXT:           stp     x16, x30, [sp, #-16]!
-# BTISO-NEXT:           adrp    x16, #131072
+# BTISO-NEXT:           adrp    x16, 0x30000
 # BTISO-NEXT:           ldr     x17, [x16, #1136]
 # BTISO-NEXT:           add     x16, x16, #1136
 # BTISO-NEXT:           br      x17
 # BTISO-NEXT:           nop
 # BTISO-NEXT:           nop
 # BTISO: 0000000000010380 <func3@plt>:
-# BTISO-NEXT:    10380: adrp    x16, #131072
+# BTISO-NEXT:    10380: adrp    x16, 0x30000
 # BTISO-NEXT:           ldr     x17, [x16, #1144]
 # BTISO-NEXT:           add     x16, x16, #1144
 # BTISO-NEXT:           br      x17
 
 # SOGOTPLT2: Hex dump of section '.got.plt'
 # SOGOTPLT2-NEXT:  0x00030460 00000000 00000000 00000000 00000000
 # SOGOTPLT2-NEXT:  0x00030470 00000000 00000000 60030100 00000000
 

 # EXECBTI: Disassembly of section .text:
 # EXECBTI: 0000000000210348 <func1>:
 # EXECBTI-NEXT:   210348: bl    0x210370 <func2@plt>
 # EXECBTI-NEXT:           ret
 # EXECBTI: Disassembly of section .plt:
 # EXECBTI: 0000000000210350 <.plt>:
 # EXECBTI-NEXT:   210350: bti   c
 # EXECBTI-NEXT:           stp   x16, x30, [sp, #-16]!
-# EXECBTI-NEXT:           adrp  x16, #131072
+# EXECBTI-NEXT:           adrp  x16, 0x230000
 # EXECBTI-NEXT:           ldr   x17, [x16, #1160]
 # EXECBTI-NEXT:           add   x16, x16, #1160
 # EXECBTI-NEXT:           br    x17
 # EXECBTI-NEXT:           nop
 # EXECBTI-NEXT:           nop
 # EXECBTI: 0000000000210370 <func2@plt>:
 # EXECBTI-NEXT:   210370: bti   c
-# EXECBTI-NEXT:           adrp  x16, #131072
+# EXECBTI-NEXT:           adrp  x16, 0x230000
 # EXECBTI-NEXT:           ldr   x17, [x16, #1168]
 # EXECBTI-NEXT:           add   x16, x16, #1168
 # EXECBTI-NEXT:           br    x17
 # EXECBTI-NEXT:           nop
 
 ## We expect the same for PIE, as the address of an ifunc can escape
 # RUN: ld.lld --pie %t.o %t.so %t2.so -o %tpie.exe
 # RUN: llvm-readelf -n %tpie.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-readelf --dynamic-table -n %tpie.exe | FileCheck --check-prefix=BTIPROP %s
 # RUN: llvm-objdump -d --mattr=+bti --no-show-raw-insn %tpie.exe | FileCheck --check-prefix=PIE %s
 
 # PIE: Disassembly of section .text:
 # PIE: 0000000000010348 <func1>:
 # PIE-NEXT:    10348: bl     0x10370 <func2@plt>
 # PIE-NEXT:           ret
 # PIE: Disassembly of section .plt:
 # PIE: 0000000000010350 <.plt>:
 # PIE-NEXT:    10350: bti    c
 # PIE-NEXT:           stp    x16, x30, [sp, #-16]!
-# PIE-NEXT:           adrp   x16, #131072
+# PIE-NEXT:           adrp   x16, 0x30000
 # PIE-NEXT:           ldr    x17, [x16, #1176]
 # PIE-NEXT:           add    x16, x16, #1176
 # PIE-NEXT:           br     x17
 # PIE-NEXT:           nop
 # PIE-NEXT:           nop
 # PIE: 0000000000010370 <func2@plt>:
 # PIE-NEXT:    10370: bti    c
-# PIE-NEXT:           adrp   x16, #131072
+# PIE-NEXT:           adrp   x16, 0x30000
 # PIE-NEXT:           ldr    x17, [x16, #1184]
 # PIE-NEXT:           add    x16, x16, #1184
 # PIE-NEXT:           br     x17
 # PIE-NEXT:           nop
 
 ## Build and executable with not all relocatable inputs having the BTI
 ## .note.property, expect no bti c and no .note.gnu.property entry
 
 # RUN: ld.lld %t.o %t2.o %t.so -o %tnobti.exe
 # RUN: llvm-readelf --dynamic-table %tnobti.exe | FileCheck --check-prefix NOBTIDYN %s
 # RUN: llvm-objdump -d --mattr=+bti --no-show-raw-insn %tnobti.exe | FileCheck --check-prefix=NOEX %s
 
 # NOEX: Disassembly of section .text:
 # NOEX: 00000000002102e0 <func1>:
 # NOEX-NEXT:   2102e0: bl      0x210310 <func2@plt>
 # NOEX-NEXT:           ret
 # NOEX: 00000000002102e8 <func3>:
 # NOEX-NEXT:   2102e8: ret
 # NOEX: Disassembly of section .plt:
 # NOEX: 00000000002102f0 <.plt>:
 # NOEX-NEXT:   2102f0: stp     x16, x30, [sp, #-16]!
-# NOEX-NEXT:           adrp    x16, #131072
+# NOEX-NEXT:           adrp    x16, 0x230000
 # NOEX-NEXT:           ldr     x17, [x16, #1024]
 # NOEX-NEXT:           add     x16, x16, #1024
 # NOEX-NEXT:           br      x17
 # NOEX-NEXT:           nop
 # NOEX-NEXT:           nop
 # NOEX-NEXT:           nop
 # NOEX: 0000000000210310 <func2@plt>:
-# NOEX-NEXT:   210310: adrp    x16, #131072
+# NOEX-NEXT:   210310: adrp    x16, 0x230000
 # NOEX-NEXT:           ldr     x17, [x16, #1032]
 # NOEX-NEXT:           add     x16, x16, #1032
 # NOEX-NEXT:           br      x17
 
 ## Force BTI entries with the -z force-bti command line option. Expect a warning
 ## from the file without the .note.gnu.property.
 
 # RUN: ld.lld %t.o %t2.o -z force-bti %t.so -o %tforcebti.exe 2>&1 | FileCheck --check-prefix=FORCE-WARN %s

 # FORCE-NEXT:   210370: bl      0x2103a0 <func2@plt>
 # FORCE-NEXT:           ret
 # FORCE: 0000000000210378 <func3>:
 # FORCE-NEXT:   210378: ret
 # FORCE: Disassembly of section .plt:
 # FORCE: 0000000000210380 <.plt>:
 # FORCE-NEXT:   210380: bti     c
 # FORCE-NEXT:           stp     x16, x30, [sp, #-16]!
-# FORCE-NEXT:           adrp    x16, #131072
+# FORCE-NEXT:           adrp    x16, 0x230000
 # FORCE-NEXT:           ldr     x17, [x16, #1192]
 # FORCE-NEXT:           add     x16, x16, #1192
 # FORCE-NEXT:           br      x17
 # FORCE-NEXT:           nop
 # FORCE-NEXT:           nop
 # FORCE: 00000000002103a0 <func2@plt>:
 # FORCE-NEXT:   2103a0: bti     c
-# FORCE-NEXT:           adrp    x16, #131072
+# FORCE-NEXT:           adrp    x16, 0x230000
 # FORCE-NEXT:           ldr     x17, [x16, #1200]
 # FORCE-NEXT:           add     x16, x16, #1200
 # FORCE-NEXT:           br      x17
 # FORCE-NEXT:           nop
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10

lld/test/ELF/aarch64-feature-btipac.s

 # BTIPACSO-NEXT:    10348:              bl      0x10380 <func3@plt>
 # BTIPACSO-NEXT:                        ret
 # BTIPACSO: 0000000000010350 <func3>:
 # BTIPACSO-NEXT:    10350:              ret
 # BTIPACSO: Disassembly of section .plt:
 # BTIPACSO: 0000000000010360 <.plt>:
 # BTIPACSO-NEXT:    10360:              bti     c
 # BTIPACSO-NEXT:                        stp     x16, x30, [sp, #-16]!
-# BTIPACSO-NEXT:                        adrp    x16, #131072
+# BTIPACSO-NEXT:                        adrp    x16, 0x30000
 # BTIPACSO-NEXT:                        ldr     x17, [x16, #1136]
 # BTIPACSO-NEXT:                        add     x16, x16, #1136
 # BTIPACSO-NEXT:                        br      x17
 # BTIPACSO-NEXT:                        nop
 # BTIPACSO-NEXT:                        nop
 # BTIPACSO: 0000000000010380 <func3@plt>:
-# BTIPACSO-NEXT:    10380:              adrp    x16, #131072
+# BTIPACSO-NEXT:    10380:              adrp    x16, 0x30000
 # BTIPACSO-NEXT:                        ldr     x17, [x16, #1144]
 # BTIPACSO-NEXT:                        add     x16, x16, #1144
 # BTIPACSO-NEXT:                        br      x17
 
 # BTIPACPROP:    Properties:    aarch64 feature: BTI, PAC
 
 # BTIPACDYN:   0x0000000070000001 (AARCH64_BTI_PLT)
 # BTIPACDYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)

 # BTIPACEX-NEXT:                        ret
 # BTIPACEX-NEXT:                        ret
 # BTIPACEX: 000000000021037c <func3>:
 # BTIPACEX-NEXT:   21037c:              ret
 # BTIPACEX: Disassembly of section .plt:
 # BTIPACEX: 0000000000210380 <.plt>:
 # BTIPACEX-NEXT:   210380:              bti     c
 # BTIPACEX-NEXT:                        stp     x16, x30, [sp, #-16]!
-# BTIPACEX-NEXT:                        adrp    x16, #131072
+# BTIPACEX-NEXT:                        adrp    x16, 0x230000
 # BTIPACEX-NEXT:                        ldr     x17, [x16, #1192]
 # BTIPACEX-NEXT:                        add     x16, x16, #1192
 # BTIPACEX-NEXT:                        br      x17
 # BTIPACEX-NEXT:                        nop
 # BTIPACEX-NEXT:                        nop
 # BTIPACEX: 00000000002103a0 <func2@plt>:
 # BTIPACEX-NEXT:   2103a0:              bti     c
-# BTIPACEX-NEXT:                        adrp    x16, #131072
+# BTIPACEX-NEXT:                        adrp    x16, 0x230000
 # BTIPACEX-NEXT:                        ldr     x17, [x16, #1200]
 # BTIPACEX-NEXT:                        add     x16, x16, #1200
 # BTIPACEX-NEXT:                        br      x17
 
 # BTIPACDYNEX:   0x0000000070000001 (AARCH64_BTI_PLT)
 # BTIPACDYNEX-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 ## Check that combinations of BTI+PAC with 0 properties results in standard PLT
 
 # RUN: ld.lld %t.o %t3.o %t.so -o %t.exe
 # RUN: llvm-objdump -d --mattr=+v8.5a --no-show-raw-insn %t.exe | FileCheck --check-prefix EX %s
 # RUN: llvm-readelf --dynamic-table %t.exe | FileCheck --check-prefix=NODYN %s
 
 # EX: Disassembly of section .text:
 # EX: 00000000002102e0 <func1>:
 # EX-NEXT:   2102e0: bl      0x210310 <func2@plt>
 # EX-NEXT:           ret
 # EX-NEXT:           ret
 # EX: 00000000002102ec <func3>:
 # EX-NEXT:   2102ec: ret
 # EX: Disassembly of section .plt:
 # EX: 00000000002102f0 <.plt>:
 # EX-NEXT:   2102f0: stp     x16, x30, [sp, #-16]!
-# EX-NEXT:           adrp    x16, #131072
+# EX-NEXT:           adrp    x16, 0x230000
 # EX-NEXT:           ldr     x17, [x16, #1024]
 # EX-NEXT:           add     x16, x16, #1024
 # EX-NEXT:           br      x17
 # EX-NEXT:           nop
 # EX-NEXT:           nop
 # EX-NEXT:           nop
 # EX: 0000000000210310 <func2@plt>:
-# EX:        210310: adrp    x16, #131072
+# EX:        210310: adrp    x16, 0x230000
 # EX-NEXT:           ldr     x17, [x16, #1032]
 # EX-NEXT:           add     x16, x16, #1032
 # EX-NEXT:           br      x17
 
 # NODYN-NOT:   0x0000000070000001 (AARCH64_BTI_PLT)
 # NODYN-NOT:   0x0000000070000003 (AARCH64_PAC_PLT)
 
 ## Check that combination of -z pac-plt and -z force-bti warns for the file that

 # BTIPACEX2-NEXT:                        ret
 # BTIPACEX2-NEXT:                        ret
 # BTIPACEX2: 000000000021037c <func3>:
 # BTIPACEX2-NEXT:   21037c:              ret
 # BTIPACEX2: Disassembly of section .plt:
 # BTIPACEX2: 0000000000210380 <.plt>:
 # BTIPACEX2-NEXT:   210380:              bti     c
 # BTIPACEX2-NEXT:                        stp     x16, x30, [sp, #-16]!
-# BTIPACEX2-NEXT:                        adrp    x16, #131072
+# BTIPACEX2-NEXT:                        adrp    x16, 0x230000
 # BTIPACEX2-NEXT:                        ldr     x17, [x16, #1208]
 # BTIPACEX2-NEXT:                        add     x16, x16, #1208
 # BTIPACEX2-NEXT:                        br      x17
 # BTIPACEX2-NEXT:                        nop
 # BTIPACEX2-NEXT:                        nop
 # BTIPACEX2: 00000000002103a0 <func2@plt>:
 # BTIPACEX2-NEXT:   2103a0:              bti     c
-# BTIPACEX2-NEXT:                        adrp    x16, #131072
+# BTIPACEX2-NEXT:                        adrp    x16, 0x230000
 # BTIPACEX2-NEXT:                        ldr     x17, [x16, #1216]
 # BTIPACEX2-NEXT:                        add     x16, x16, #1216
 # BTIPACEX2-NEXT:                        autia1716
 # BTIPACEX2-NEXT:                        br      x17
 
 # BTIPACDYN2:        0x0000000070000001 (AARCH64_BTI_PLT)
 # BTIPACDYN2-NEXT:   0x0000000070000003 (AARCH64_PAC_PLT)
 No newline at end of file

lld/test/ELF/aarch64-feature-pac.s

 # RUN: llvm-readelf --dynamic-table %tno.so | FileCheck --check-prefix NOPACDYN %s
 
 # NOPAC: 00000000000102b8 <func2>:
 # NOPAC-NEXT:    102b8: bl      0x102f0 <func3@plt>
 # NOPAC-NEXT:           ret
 # NOPAC: Disassembly of section .plt:
 # NOPAC: 00000000000102d0 <.plt>:
 # NOPAC-NEXT:    102d0: stp     x16, x30, [sp, #-16]!
-# NOPAC-NEXT:           adrp    x16, #131072
+# NOPAC-NEXT:           adrp    x16, 0x30000
 # NOPAC-NEXT:           ldr     x17, [x16, #960]
 # NOPAC-NEXT:           add     x16, x16, #960
 # NOPAC-NEXT:           br      x17
 # NOPAC-NEXT:           nop
 # NOPAC-NEXT:           nop
 # NOPAC-NEXT:           nop
 # NOPAC: 00000000000102f0 <func3@plt>:
-# NOPAC-NEXT:    102f0: adrp    x16, #131072
+# NOPAC-NEXT:    102f0: adrp    x16, 0x30000
 # NOPAC-NEXT:           ldr     x17, [x16, #968]
 # NOPAC-NEXT:           add     x16, x16, #968
 # NOPAC-NEXT:           br      x17
 
 # SOGOTPLT: Hex dump of section '.got.plt':
 # SOGOTPLT-NEXT: 0x000303b0 00000000 00000000 00000000 00000000
 # SOGOTPLT-NEXT: 0x000303c0 00000000 00000000 d0020100 00000000
 

 # PACSO: 0000000000010348 <func2>:
 # PACSO-NEXT:    10348:         bl      0x10380 <func3@plt>
 # PACSO-NEXT:                   ret
 # PACSO: 0000000000010350 <func3>:
 # PACSO-NEXT:    10350:         ret
 # PACSO: Disassembly of section .plt:
 # PACSO: 0000000000010360 <.plt>:
 # PACSO-NEXT:    10360:         stp     x16, x30, [sp, #-16]!
-# PACSO-NEXT:                   adrp    x16, #131072
+# PACSO-NEXT:                   adrp    x16, 0x30000
 # PACSO-NEXT:                   ldr     x17, [x16, #1120]
 # PACSO-NEXT:                   add     x16, x16, #1120
 # PACSO-NEXT:                   br      x17
 # PACSO-NEXT:                   nop
 # PACSO-NEXT:                   nop
 # PACSO-NEXT:                   nop
 # PACSO: 0000000000010380 <func3@plt>:
-# PACSO-NEXT:    10380:         adrp    x16, #131072
+# PACSO-NEXT:    10380:         adrp    x16, 0x30000
 # PACSO-NEXT:                   ldr     x17, [x16, #1128]
 # PACSO-NEXT:                   add     x16, x16, #1128
 # PACSO-NEXT:                   br      x17
 
 # SOGOTPLT2: Hex dump of section '.got.plt':
 # SOGOTPLT2-NEXT: 0x00030450 00000000 00000000 00000000 00000000
 # SOGOTPLT2-NEXT: 0x00030460 00000000 00000000 60030100 00000000
 

 # PACPLT: 0000000000210370 <func1>:
 # PACPLT-NEXT:   210370:        bl      0x2103a0 <func2@plt>
 # PACPLT-NEXT:                  ret
 # PACPLT: 0000000000210378 <func3>:
 # PACPLT-NEXT:   210378:        ret
 # PACPLT: Disassembly of section .plt:
 # PACPLT: 0000000000210380 <.plt>:
 # PACPLT-NEXT:   210380:        stp     x16, x30, [sp, #-16]!
-# PACPLT-NEXT:                  adrp    x16, #131072
+# PACPLT-NEXT:                  adrp    x16, 0x230000
 # PACPLT-NEXT:                  ldr     x17, [x16, #1192]
 # PACPLT-NEXT:                  add     x16, x16, #1192
 # PACPLT-NEXT:                  br      x17
 # PACPLT-NEXT:                  nop
 # PACPLT-NEXT:                  nop
 # PACPLT-NEXT:                  nop
 # PACPLT: 00000000002103a0 <func2@plt>:
-# PACPLT-NEXT:   2103a0:        adrp    x16, #131072
+# PACPLT-NEXT:   2103a0:        adrp    x16, 0x230000
 # PACPLT-NEXT:                  ldr     x17, [x16, #1200]
 # PACPLT-NEXT:                  add     x16, x16, #1200
 # PACPLT-NEXT:                  autia1716
 # PACPLT-NEXT:                  br      x17
 # PACPLT-NEXT:                  nop
 
 # PACDYN2-NOT:      0x0000000070000001 (AARCH64_BTI_PLT)
 # PACDYN2:      0x0000000070000003 (AARCH64_PAC_PLT)

lld/test/ELF/aarch64-fpic-got.s

 ## dynamic relocation and not using plt relative (R_AARCH64_JUMP_SLOT).
 # RELOC:      .rela.dyn {
 # RELOC-NEXT:   0x220320 R_AARCH64_GLOB_DAT bar 0x0
 # RELOC-NEXT: }
 
 ## page(0x220320) - page(0x210000) = 65536
 ## page(0x220320) & 0xff8 = 800
 # DIS:      <_start>:
-# DIS-NEXT: 210258: adrp x0, #65536
+# DIS-NEXT: 210258: adrp x0, 0x220000
 # DIS-NEXT: 21025c: ldr x0, [x0, #800]
 
 .globl _start
 _start:
   adrp x0, :got:bar
   ldr  x0, [x0, :got_lo12:bar]

lld/test/ELF/aarch64-gnu-ifunc-address.s

 .globl main
 .type main,@function
 main:
  adrp x8, :got:myfunc
  ldr  x8, [x8, :got_lo12:myfunc]
  ret
 # CHECK:   0000000000010284 <main>:
 ## myfunc's got entry = page(0x20330)-page(0x10284) + 0x330 = 65536 + 816
-# CHECK-NEXT:    10284: adrp    x8, #65536
+# CHECK-NEXT:    10284: adrp    x8, 0x20000
 # CHECK-NEXT:    10288: ldr     x8, [x8, #816]
 # CHECK-NEXT:    1028c: ret
 
 # CHECK: Disassembly of section .got:
 # CHECK-EMPTY:
 # CHECK-NEXT: 0000000000020330 <.got>:
 
 # CHECK-RELOCS: Relocations [
 # CHECK-RELOCS-NEXT:   Section {{.*}} .rela.dyn {
 # CHECK-RELOCS-NEXT:     0x20330 R_AARCH64_GLOB_DAT myfunc 0x0
 # CHECK-RELOCS-NEXT:   }
 # CHECK-RELOCS-NEXT: ]

lld/test/ELF/aarch64-gnu-ifunc-nonpreemptable.s

  adrp x8, myfunc
  add  x8, x8, :lo12: myfunc
  ret
 
 ## The address of myfunc is the address of the PLT entry for myfunc.
 # PDE:      <myfunc_resolver>:
 # PDE-NEXT:   210170:   ret
 # PDE:      <main>:
-# PDE-NEXT:   210174:   adrp    x8, #0
+# PDE-NEXT:   210174:   adrp    x8, 0x210000
 # PDE-NEXT:   210178:   add     x8, x8, #384
 # PDE-NEXT:   21017c:   ret
 # PDE-EMPTY:
 # PDE-NEXT: Disassembly of section .iplt:
 # PDE-EMPTY:
 # PDE-NEXT: <myfunc>:
 ## page(.got.plt) - page(0x210010) = 65536
-# PDE-NEXT:   210180: adrp    x16, #65536
+# PDE-NEXT:   210180: adrp    x16, 0x220000
 # PDE-NEXT:   210184: ldr     x17, [x16, #400]
 # PDE-NEXT:   210188: add     x16, x16, #400
 # PDE-NEXT:   21018c: br      x17
 
 ## The adrp to myfunc should generate a PLT entry and a GOT entry with an
 ## irelative relocation.
 # PDE-RELOC:      .rela.dyn {
 # PDE-RELOC-NEXT:   0x220190 R_AARCH64_IRELATIVE - 0x210170
 # PDE-RELOC-NEXT: }
 
 # PIE:      <myfunc_resolver>:
 # PIE-NEXT:    10260: ret
 # PIE:      <main>:
-# PIE-NEXT:    10264: adrp    x8, #0
+# PIE-NEXT:    10264: adrp    x8, 0x10000
 # PIE-NEXT:    10268: add     x8, x8, #624
 # PIE-NEXT:    1026c: ret
 # PIE-EMPTY:
 # PIE-NEXT: Disassembly of section .iplt:
 # PIE-EMPTY:
 # PIE-NEXT: <myfunc>:
-# PIE-NEXT:    10270: adrp    x16, #131072
+# PIE-NEXT:    10270: adrp    x16, 0x30000
 # PIE-NEXT:    10274: ldr     x17, [x16, #896]
 # PIE-NEXT:    10278: add     x16, x16, #896
 # PIE-NEXT:    1027c: br      x17
 
 # PIE-RELOC:      .rela.dyn {
 # PIE-RELOC-NEXT:   0x30380 R_AARCH64_IRELATIVE - 0x10260
 # PIE-RELOC-NEXT: }

lld/test/ELF/aarch64-gnu-ifunc-plt.s

 // DISASM-NEXT:    2102e4: bl      0x210340 <zed2+0x210340>
 // DISASM-NEXT:    2102e8: bl      0x210310 <bar2@plt>
 // DISASM-NEXT:    2102ec: bl      0x210320 <zed2@plt>
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:
 // DISASM-NEXT: <.plt>:
 // DISASM-NEXT:    2102f0: stp     x16, x30, [sp, #-16]!
-// DISASM-NEXT:    2102f4: adrp    x16, #131072
+// DISASM-NEXT:    2102f4: adrp    x16, 0x230000
 // DISASM-NEXT:    2102f8: ldr     x17, [x16, #1104]
 // DISASM-NEXT:    2102fc: add     x16, x16, #1104
 // DISASM-NEXT:    210300: br      x17
 // DISASM-NEXT:    210304: nop
 // DISASM-NEXT:    210308: nop
 // DISASM-NEXT:    21030c: nop
 // DISASM-EMPTY:
 // DISASM-NEXT:   <bar2@plt>:
-// DISASM-NEXT:    210310: adrp    x16, #131072
+// DISASM-NEXT:    210310: adrp    x16, 0x230000
 // DISASM-NEXT:    210314: ldr     x17, [x16, #1112]
 // DISASM-NEXT:    210318: add     x16, x16, #1112
 // DISASM-NEXT:    21031c: br      x17
 // DISASM-EMPTY:
 // DISASM-NEXT:   <zed2@plt>:
-// DISASM-NEXT:    210320: adrp    x16, #131072
+// DISASM-NEXT:    210320: adrp    x16, 0x230000
 // DISASM-NEXT:    210324: ldr     x17, [x16, #1120]
 // DISASM-NEXT:    210328: add     x16, x16, #1120
 // DISASM-NEXT:    21032c: br      x17
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .iplt:
 // DISASM-EMPTY:
 // DISASM-NEXT: <.iplt>:
-// DISASM-NEXT:    210330: adrp    x16, #131072
+// DISASM-NEXT:    210330: adrp    x16, 0x230000
 // DISASM-NEXT:    210334: ldr     x17, [x16, #1128]
 // DISASM-NEXT:    210338: add     x16, x16, #1128
 // DISASM-NEXT:    21033c: br      x17
-// DISASM-NEXT:    210340: adrp    x16, #131072
+// DISASM-NEXT:    210340: adrp    x16, 0x230000
 // DISASM-NEXT:    210344: ldr     x17, [x16, #1136]
 // DISASM-NEXT:    210348: add     x16, x16, #1136
 // DISASM-NEXT:    21034c: br      x17
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:

lld/test/ELF/aarch64-gnu-ifunc.s

 // DISASM-NEXT:  210190: bl  0x2101a0
 // DISASM-NEXT:  210194: bl  0x2101b0
 // DISASM-NEXT:  210198: add x2, x2, #344
 // DISASM-NEXT:  21019c: add x2, x2, #392
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .iplt:
 // DISASM-EMPTY:
 // DISASM-NEXT: <.iplt>:
-// DISASM-NEXT:  2101a0: adrp x16, #65536
+// DISASM-NEXT:  2101a0: adrp x16, 0x220000
 // DISASM-NEXT:  2101a4: ldr x17, [x16, #448]
 // DISASM-NEXT:  2101a8: add x16, x16, #448
 // DISASM-NEXT:  2101ac: br x17
-// DISASM-NEXT:  2101b0: adrp x16, #65536
+// DISASM-NEXT:  2101b0: adrp x16, 0x220000
 // DISASM-NEXT:  2101b4: ldr x17, [x16, #456]
 // DISASM-NEXT:  2101b8: add x16, x16, #456
 // DISASM-NEXT:  2101bc: br x17
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:

lld/test/ELF/aarch64-gnu-ifunc2.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 # RUN: ld.lld %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t | FileCheck %s
 # RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SEC
 # RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=RELOC
 
 # CHECK:      Disassembly of section .text:
 # CHECK-EMPTY:
 # CHECK-NEXT: <myfunc>:
 # CHECK-NEXT:   210170:
 
 # CHECK:      <main>:
 # .got.plt - page(0x210174) = 0x220190 - 0x210000 = 0x10190
-# CHECK-NEXT:   210174: adrp    x8, #0x10000
+# CHECK-NEXT:   210174: adrp    x8, 0x220000
 # CHECK-NEXT:   210178: ldr     x8, [x8, #0x190]
 # CHECK-NEXT:   21017c: ret
 
 # CHECK:      Disassembly of section .iplt:
 # CHECK-EMPTY:
 # CHECK-NEXT: <.iplt>:
 # .got.plt - page(0x210180) = 0x220190 - 0x210000 = 0x10190
-# CHECK-NEXT:   210180: adrp    x16, #0x10000
+# CHECK-NEXT:   210180: adrp    x16, 0x220000
 # CHECK-NEXT:   210184: ldr     x17, [x16, #0x190]
 # CHECK-NEXT:   210188: add     x16, x16, #0x190
 # CHECK-NEXT:   21018c: br      x17
 
 # SEC: .got.plt PROGBITS 0000000000220190 000190 000008 00 WA 0 0 8
 
 # RELOC:      Relocations [
 # RELOC-NEXT:   Section {{.*}} .rela.dyn {

lld/test/ELF/aarch64-hi21-nc.s

 // REQUIRES: aarch64
 // RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-linux %s -o %t.o
 // RUN: ld.lld %t.o -o %t
 // RUN: llvm-objdump -d %t | FileCheck %s
 
 foo = . + 0x1100000000000000
-// CHECK: adrp x0, #0
+// CHECK: adrp x0, 0x210000
 adrp x0, :pg_hi21_nc:foo

lld/test/ELF/aarch64-ifunc-bti.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 # RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %p/Inputs/aarch64-addrifunc.s -o %t1.o
 
 # RUN: ld.lld --shared --soname=t1.so %t1.o -o %t1.so
 # RUN: ld.lld --pie %t1.so %t.o -o %t
 # RUN: llvm-objdump -d --no-show-raw-insn --mattr=+bti --triple=aarch64-linux-gnu %t | FileCheck %s
 
 # When the address of an ifunc is taken using a non-got reference which clang
 # can do, LLD exports a canonical PLT entry that may have its address taken so
 # we must use bti c.
 
 # CHECK: Disassembly of section .plt:
 # CHECK: 0000000000010380 <.plt>:
 # CHECK-NEXT:    10380:         bti     c
 # CHECK-NEXT:                   stp     x16, x30, [sp, #-16]!
-# CHECK-NEXT:                   adrp    x16, #131072
+# CHECK-NEXT:                   adrp    x16, 0x30000
 # CHECK-NEXT:                   ldr     x17, [x16, #1288]
 # CHECK-NEXT:                   add     x16, x16, #1288
 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
 # CHECK-NEXT:                   nop
 # CHECK: 00000000000103a0 <func1@plt>:
 # CHECK-NEXT:    103a0:         bti     c
-# CHECK-NEXT:                   adrp    x16, #131072
+# CHECK-NEXT:                   adrp    x16, 0x30000
 # CHECK-NEXT:                   ldr     x17, [x16, #1296]
 # CHECK-NEXT:                   add     x16, x16, #1296
 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
 # CHECK-EMPTY:
 # CHECK: Disassembly of section .iplt:
 # CHECK-EMPTY:
 # CHECK-NEXT: 00000000000103c0 <myfunc>:
 # CHECK-NEXT:    103c0:         bti     c
-# CHECK-NEXT:                   adrp    x16, #131072
+# CHECK-NEXT:                   adrp    x16, 0x30000
 # CHECK-NEXT:                   ldr     x17, [x16, #1304]
 # CHECK-NEXT:                   add     x16, x16, #1304
 # CHECK-NEXT:                   br      x17
 # CHECK-NEXT:                   nop
 
 .section ".note.gnu.property", "a"
 .long 4
 .long 0x10

lld/test/ELF/aarch64-plt.s

 // DISASMDSO: <foo>:
 // DISASMDSO-NEXT:     1033c: nop
 
 // DISASMDSO: Disassembly of section .plt:
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT: <.plt>:
 // DISASMDSO-NEXT:     10340: stp     x16, x30, [sp, #-0x10]!
 // &(.got.plt[2]) = 0x30450 + 2 * 8 = 0x30460
-// DISASMDSO-NEXT:     10344: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10344: adrp    x16, 0x30000
 // DISASMDSO-NEXT:     10348: ldr     x17, [x16, #0x460]
 // DISASMDSO-NEXT:     1034c: add     x16, x16, #0x460
 // DISASMDSO-NEXT:     10350: br      x17
 // DISASMDSO-NEXT:     10354: nop
 // DISASMDSO-NEXT:     10358: nop
 // DISASMDSO-NEXT:     1035c: nop
 
 // foo@plt 0x30468
 // &.got.plt[foo] = 0x30468
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   <foo@plt>:
-// DISASMDSO-NEXT:     10360: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10360: adrp    x16, 0x30000
 // DISASMDSO-NEXT:     10364: ldr     x17, [x16, #0x468]
 // DISASMDSO-NEXT:     10368: add     x16, x16, #0x468
 // DISASMDSO-NEXT:     1036c: br      x17
 
 // bar@plt
 // &.got.plt[foo] = 0x30470
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   <bar@plt>:
-// DISASMDSO-NEXT:     10370: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10370: adrp    x16, 0x30000
 // DISASMDSO-NEXT:     10374: ldr     x17, [x16, #0x470]
 // DISASMDSO-NEXT:     10378: add     x16, x16, #0x470
 // DISASMDSO-NEXT:     1037c: br      x17
 
 // weak@plt
 // 0x30468 = 0x10000 + 131072 + 1128
 // DISASMDSO-EMPTY:
 // DISASMDSO-NEXT:   <weak@plt>:
-// DISASMDSO-NEXT:     10380: adrp    x16, #0x20000
+// DISASMDSO-NEXT:     10380: adrp    x16, 0x30000
 // DISASMDSO-NEXT:     10384: ldr     x17, [x16, #0x478]
 // DISASMDSO-NEXT:     10388: add     x16, x16, #0x478
 // DISASMDSO-NEXT:     1038c: br      x17
 
 // CHECKEXE:     Name: .plt
 // CHECKEXE-NEXT:     Type: SHT_PROGBITS
 // CHECKEXE-NEXT:     Flags [
 // CHECKEXE-NEXT:       SHF_ALLOC

 // DISASMEXE: <foo>:
 // DISASMEXE-NEXT:    2102d4: nop
 
 // DISASMEXE: Disassembly of section .plt:
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT: <.plt>:
 // DISASMEXE-NEXT:    2102e0: stp     x16, x30, [sp, #-0x10]!
 // &(.got.plt[2]) = 0x2303f0 + 2 * 8 = 0x230400
-// DISASMEXE-NEXT:    2102e4: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    2102e4: adrp    x16, 0x230000
 // DISASMEXE-NEXT:    2102e8: ldr     x17, [x16, #0x400]
 // DISASMEXE-NEXT:    2102ec: add     x16, x16, #0x400
 // DISASMEXE-NEXT:    2102f0: br      x17
 // DISASMEXE-NEXT:    2102f4: nop
 // DISASMEXE-NEXT:    2102f8: nop
 // DISASMEXE-NEXT:    2102fc: nop
 
 // bar@plt
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT:   <bar@plt>:
-// DISASMEXE-NEXT:    210300: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    210300: adrp    x16, 0x230000
 // DISASMEXE-NEXT:    210304: ldr     x17, [x16, #0x408]
 // DISASMEXE-NEXT:    210308: add     x16, x16, #0x408
 // DISASMEXE-NEXT:    21030c: br      x17
 
 // weak@plt
 // DISASMEXE-EMPTY:
 // DISASMEXE-NEXT:   <weak@plt>:
-// DISASMEXE-NEXT:    210310: adrp    x16, #0x20000
+// DISASMEXE-NEXT:    210310: adrp    x16, 0x230000
 // DISASMEXE-NEXT:    210314: ldr     x17, [x16, #0x410]
 // DISASMEXE-NEXT:    210318: add     x16, x16, #0x410
 // DISASMEXE-NEXT:    21031c: br      x17
 
 .global _start,foo,bar
 .weak weak
 _start:
   b foo
   b bar
   b weak
 
 .section .text2,"ax",@progbits
 foo:
   nop

lld/test/ELF/aarch64-relocs.s

mystr:
   .asciz "blah"
   .size mystr, 4
 
 # PAGE(S + A) - PAGE(P) = PAGE(210136) - PAGE(0x210132) = 0
 #
 # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
 # CHECK-EMPTY:
 # CHECK-NEXT: <$x.2>:
-# CHECK-NEXT:   210132:       01 00 00 90     adrp    x1, #0
+# CHECK-NEXT:   210132:       01 00 00 90     adrp    x1, 0x210000
 
 .section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits
   add x0, x0, :lo12:.L.str
 .L.str:
   .asciz "blah"
   .size mystr, 4
 
 # S = 0x21013b, A = 0x4

lld/test/ELF/aarch64-thunk-pi.s

 // CHECK: <low_target2>:
 // CHECK-NEXT:       e0:       bl      0xf8 <__AArch64ADRPThunk_high_target2>
 // CHECK-NEXT:       e4:       bl      0x104 <__AArch64ADRPThunk_>
 // CHECK-NEXT:                 ret
 
 // Expect range extension thunks for .text_low
 // adrp calculation is (PC + signed immediate) & (!0xfff)
 // CHECK: <__AArch64ADRPThunk_high_target>:
-// CHECK-NEXT:       ec:       adrp    x16, #0x10000000
+// CHECK-NEXT:       ec:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 add     x16, x16, #0x40
 // CHECK-NEXT:                 br      x16
 // CHECK: <__AArch64ADRPThunk_high_target2>:
-// CHECK-NEXT:       f8:       adrp    x16, #0x10000000
+// CHECK-NEXT:       f8:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 add     x16, x16, #0x8
 // CHECK-NEXT:                 br      x16
 /// Identical to the previous one, but for the target .text_high+8.
 // CHECK: <__AArch64ADRPThunk_>:
-// CHECK-NEXT:      104:       adrp    x16, #0x10000000
+// CHECK-NEXT:      104:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 add     x16, x16, #0x8
 // CHECK-NEXT:                 br      x16
 
 
  .section .text_high, "ax", %progbits
  .globl high_target
  .type high_target, %function
 high_target:

  ret
 // CHECK: <high_target2>:
 // CHECK-NEXT: 10000008:       bl      0x10000010 <__AArch64ADRPThunk_low_target2>
 // CHECK-NEXT:                 ret
 
 // Expect Thunk for .text.high
 
 // CHECK: <__AArch64ADRPThunk_low_target2>:
-// CHECK-NEXT: 10000010:       adrp    x16, #-0x10000000
+// CHECK-NEXT: 10000010:       adrp    x16, 0x0
 // CHECK-NEXT:                 add     x16, x16, #0xe0
 // CHECK-NEXT:                 br      x16
 
 // CHECK: Disassembly of section .plt:
 // CHECK-EMPTY:
 // CHECK-NEXT: <.plt>:
 // CHECK-NEXT: 10000020:       stp     x16, x30, [sp, #-0x10]!
-// CHECK-NEXT:                 adrp    x16, #0
+// CHECK-NEXT:                 adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x120]
 // CHECK-NEXT:                 add     x16, x16, #0x120
 // CHECK-NEXT:                 br      x17
 // CHECK-NEXT:                 nop
 // CHECK-NEXT:                 nop
 // CHECK-NEXT:                 nop
 // CHECK-EMPTY:
 // CHECK-NEXT:   <high_target@plt>:
-// CHECK-NEXT: 10000040:       adrp    x16, #0x0
+// CHECK-NEXT: 10000040:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x128]
 // CHECK-NEXT:                 add     x16, x16, #0x128
 // CHECK-NEXT:                 br      x17
 // CHECK-EMPTY:
 // CHECK-NEXT:   <low_target@plt>:
-// CHECK-NEXT: 10000050:       adrp    x16, #0x0
+// CHECK-NEXT: 10000050:       adrp    x16, 0x10000000
 // CHECK-NEXT:                 ldr     x17, [x16, #0x130]
 // CHECK-NEXT:                 add     x16, x16, #0x130
 // CHECK-NEXT:                 br      x17
 
 //--- lds
 PHDRS {
   low PT_LOAD FLAGS(0x1 | 0x4);
   high PT_LOAD FLAGS(0x1 | 0x4);
 }
 SECTIONS {
   .text_low : { *(.text_low) } :low
   .text_high 0x10000000 : { *(.text_high) } :high
 }

lld/test/ELF/aarch64-tls-gdie.s

 // SEC-NEXT: ]
 // SEC-NEXT: Address: 0x220300
 
 // page(0x220300) - page(0x21023c) = 65536
 // 0x23c = 768
 
 // CHECK:      <_start>:
 // CHECK-NEXT: 210238: nop
-// CHECK-NEXT: 21023c: adrp    x0, #65536
+// CHECK-NEXT: 21023c: adrp    x0, 0x220000
 // CHECK-NEXT: 210240: ldr     x0, [x0, #768]
 // CHECK-NEXT: 210244: nop
 // CHECK-NEXT: 210248: nop

lld/test/ELF/aarch64-tls-ie.s

 # RELOC-NEXT:  }
 # RELOC-NEXT:]
 
 ## Page(0x2200B0) - Page(0x210000) = 0x10000 = 65536
 ## 0x2200B0 & 0xff8 = 0xB0 = 176
 ## Page(0x2200B8) - Page(0x210000) = 0x10000 = 65536
 ## 0x2200B8 & 0xff8 = 0xB8 = 184
 # CHECK:     <_start>:
-# CHECK-NEXT: 210278: adrp x0, #65536
+# CHECK-NEXT: 210278: adrp x0, 0x220000
 # CHECK-NEXT: 21027c: ldr  x0, [x0, #824]
-# CHECK-NEXT: 210280: adrp x0, #65536
+# CHECK-NEXT: 210280: adrp x0, 0x220000
 # CHECK-NEXT: 210284: ldr  x0, [x0, #832]
 
 .globl _start
 _start:
  adrp x0, :gottprel:foo
  ldr x0, [x0, #:gottprel_lo12:foo]
 
  adrp x0, :gottprel:bar
  ldr x0, [x0, #:gottprel_lo12:bar]

lld/test/ELF/aarch64-tlsdesc.s

.text
         add     x0, x0, :tlsdesc_lo12:a
         .tlsdesccall a
         blr     x1
 
 // Create relocation against local TLS symbols where linker should
 // create target specific dynamic TLSDESC relocation where addend is
 // the symbol VMA in tls block.
 
-// CHECK:      10298: adrp    x0, #65536
+// CHECK:      10298: adrp    x0, 0x20000
 // CHECK-NEXT: 1029c: ldr     x1, [x0, #856]
 // CHECK-NEXT: 102a0: add     x0, x0, #856
 // CHECK-NEXT: 102a4: blr     x1
 
   adrp  x0, :tlsdesc:local1
   ldr  x1, [x0, :tlsdesc_lo12:local1]
   add x0, x0, :tlsdesc_lo12:local1
         .tlsdesccall a
         blr     x1
 
-// CHECK:      102a8: adrp    x0, #65536
+// CHECK:      102a8: adrp    x0, 0x20000
 // CHECK-NEXT: 102ac: ldr     x1, [x0, #872]
 // CHECK-NEXT: 102b0: add     x0, x0, #872
 // CHECK-NEXT: 102b4: blr     x1
 
   adrp  x0, :tlsdesc:local2
   ldr  x1, [x0, :tlsdesc_lo12:local2]
   add x0, x0, :tlsdesc_lo12:local2
         .tlsdesccall a
         blr     x1
 
-// CHECK:      102b8: adrp    x0, #65536
+// CHECK:      102b8: adrp    x0, 0x20000
 // CHECK-NEXT: 102bc: ldr     x1, [x0, #888]
 // CHECK-NEXT: 102c0: add     x0, x0, #888
 // CHECK-NEXT: 102c4: blr     x1
 
         .section .tbss,"awT",@nobits
         .type   local1,@object
         .p2align 2
 local1:

lld/test/ELF/aarch64-tstbr14-reloc.s

 #DSO-NEXT:  10318: tbnz w3, #15, 0x10360 <_bar@plt>
 #DSO-NEXT:  1031c: tbz x6, #45, 0x10350 <_foo@plt>
 #DSO-NEXT:  10320: tbz x6, #45, 0x10360 <_bar@plt>
 #DSO-EMPTY:
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-EMPTY:
 #DSO-NEXT: <.plt>:
 #DSO-NEXT:  10330: stp x16, x30, [sp, #-16]!
-#DSO-NEXT:  10334: adrp x16, #131072
+#DSO-NEXT:  10334: adrp x16, 0x30000
 #DSO-NEXT:  10338: ldr x17, [x16, #1072]
 #DSO-NEXT:  1033c: add x16, x16, #1072
 #DSO-NEXT:  10340: br x17
 #DSO-NEXT:  10344: nop
 #DSO-NEXT:  10348: nop
 #DSO-NEXT:  1034c: nop
 #DSO-EMPTY:
 #DSO-NEXT:   <_foo@plt>:
-#DSO-NEXT:  10350: adrp x16, #131072
+#DSO-NEXT:  10350: adrp x16, 0x30000
 #DSO-NEXT:  10354: ldr x17, [x16, #1080]
 #DSO-NEXT:  10358: add x16, x16, #1080
 #DSO-NEXT:  1035c: br x17
 #DSO-EMPTY:
 #DSO-NEXT:   <_bar@plt>:
-#DSO-NEXT:  10360: adrp x16, #131072
+#DSO-NEXT:  10360: adrp x16, 0x30000
 #DSO-NEXT:  10364: ldr x17, [x16, #1088]
 #DSO-NEXT:  10368: add x16, x16, #1088
 #DSO-NEXT:  1036c: br x17
 
 .globl _start
 _start:
  tbnz w3, #15, _foo
  tbnz w3, #15, _bar
  tbz x6, #45, _foo
  tbz x6, #45, _bar

lld/test/ELF/aarch64-undefined-weak.s

 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: 0000000010010120 <_start>:
 // CHECK-NEXT: 10010120: b       0x10010124
 // CHECK-NEXT: 10010124: bl      0x10010128
 // CHECK-NEXT: 10010128: b.eq    0x1001012c
 // CHECK-NEXT: 1001012c: cbz     x1, 0x10010130
 // CHECK-NEXT: 10010130: adr     x0, #0
-// CHECK-NEXT: 10010134: adrp    x0, #0
+// CHECK-NEXT: 10010134: adrp    x0, 0x10010000
 // CHECK-NEXT: 10010138: ldr     x8, 0x10010138
 // CHECK:      1001013c: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 10010140: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 10010144: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 10010148: 00 00 00 00     .word   0x00000000
 // CHECK-NEXT: 1001014c: 00 00           .short  0x0000

llvm/lib/Target/AArch64/AArch64InstrFormats.td

def AdrpOperand : AsmOperandClass {
   let Name = "AdrpLabel";
   let ParserMethod = "tryParseAdrpLabel";
   let DiagnosticType = "InvalidLabel";
 }
 def adrplabel : Operand<i64> {
   let EncoderMethod = "getAdrLabelOpValue";
   let PrintMethod = "printAdrpLabel";
   let ParserMatchClass = AdrpOperand;
+  let OperandType = "OPERAND_PCREL";
 }
 
 def AdrOperand : AsmOperandClass {
   let Name = "AdrLabel";
   let ParserMethod = "tryParseAdrLabel";
   let DiagnosticType = "InvalidLabel";
 }
 def adrlabel : Operand<i64> {

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h

void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
                                       raw_ostream &O);
 
   template <unsigned NumLanes, char LaneKind>
   void printTypedVectorList(const MCInst *MI, unsigned OpNum,
                             const MCSubtargetInfo &STI, raw_ostream &O);
 
   void printVectorIndex(const MCInst *MI, unsigned OpNum,
                         const MCSubtargetInfo &STI, raw_ostream &O);
-  void printAdrpLabel(const MCInst *MI, unsigned OpNum,
+  void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
                       const MCSubtargetInfo &STI, raw_ostream &O);
   void printBarrierOption(const MCInst *MI, unsigned OpNum,
                           const MCSubtargetInfo &STI, raw_ostream &O);
   void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
                               const MCSubtargetInfo &STI, raw_ostream &O);
   void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
                               const MCSubtargetInfo &STI, raw_ostream &O);
   void printSystemPStateField(const MCInst *MI, unsigned OpNum,

llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp

void AArch64InstPrinter::printAlignedLabel(const MCInst *MI, uint64_t Address,
   if (BranchTarget && BranchTarget->evaluateAsAbsolute(TargetAddress)) {
     O << formatHex(TargetAddress);
   } else {
     // Otherwise, just print the expression.
     MI->getOperand(OpNum).getExpr()->print(O, &MAI);
   }
 }
 
-void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, unsigned OpNum,
+void AArch64InstPrinter::printAdrpLabel(const MCInst *MI, uint64_t Address,
+                                        unsigned OpNum,
                                         const MCSubtargetInfo &STI,
                                         raw_ostream &O) {
   const MCOperand &Op = MI->getOperand(OpNum);
 
   // If the label has already been resolved to an immediate offset (say, when
   // we're running the disassembler), just print the immediate.
   if (Op.isImm()) {
-    O << "#" << formatImm(Op.getImm() * (1 << 12));
+    const int64_t Offset = Op.getImm() << 12;
+    if (PrintBranchImmAsAddress)
+      O << formatHex((Address & -4096) + Offset);
+    else
+      O << "#" << Offset;
     return;
   }
 
   // Otherwise, just print the expression.
   MI->getOperand(OpNum).getExpr()->print(O, &MAI);
 }
 
 void AArch64InstPrinter::printBarrierOption(const MCInst *MI, unsigned OpNo,

llvm/test/MC/AArch64/adr.s

// CHECK-NEXT: R_AARCH64_ADR_PREL_LO21  Symbol+0xf1000
 
   adr x0, 100
   adr x2, Symbol
   adr x3, Symbol + 0
   adr x4, Symbol + 987136
   adr x5, (0xffffffff000f1000 - 0xffffffff00000000 + Symbol)
   adr x6, Symbol + (0xffffffff000f1000 - 0xffffffff00000000)
 
-// CHECK-NEXT: adrp x0, #0
+// CHECK-NEXT: adrp x0, 0x0
 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol
-// CHECK-NEXT: adrp x2, #0
+// CHECK-NEXT: adrp x2, 0x0
 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol
-// CHECK-NEXT: adrp x3, #0
+// CHECK-NEXT: adrp x3, 0x0
 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000
-// CHECK-NEXT: adrp x4, #0
+// CHECK-NEXT: adrp x4, 0x0
 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000
-// CHECK-NEXT: adrp x5, #0
+// CHECK-NEXT: adrp x5, 0x0
 // CHECK-NEXT: R_AARCH64_ADR_PREL_PG_HI21 Symbol+0xf1000
 
   adrp x0, Symbol
   adrp x2, Symbol + 0
   adrp x3, Symbol + 987136
   adrp x4, (0xffffffff000f1000 - 0xffffffff00000000 + Symbol)
   adrp x5, Symbol + (0xffffffff000f1000 - 0xffffffff00000000)

llvm/test/MC/AArch64/coff-relocations.s

 ; CHECK: 0x44 IMAGE_REL_ARM64_SECREL_HIGH12A foo
 ; CHECK: 0x48 IMAGE_REL_ARM64_SECREL_LOW12L foo
 ; CHECK: 0x4C IMAGE_REL_ARM64_REL21 foo
 ; CHECK: 0x50 IMAGE_REL_ARM64_BRANCH19 target
 ; CHECK: 0x54 IMAGE_REL_ARM64_BRANCH14 target
 ; CHECK:   }
 ; CHECK: ]
 
-; DISASM: 30:       20 1a 09 b0     adrp    x0, #305418240
+; DISASM: 30:       20 1a 09 b0     adrp    x0, 0x12345000
 ; DISASM: 34:       00 14 0d 91     add     x0, x0, #837
 ; DISASM: 38:       00 14 4d 39     ldrb    w0, [x0, #837]
 ; DISASM: 3c:       00 a4 41 f9     ldr     x0, [x0, #840]
 ; DISASM: 40:       00 00 00 91     add     x0, x0, #0
 ; DISASM: 44:       00 00 40 91     add     x0, x0, #0, lsl #12
 ; DISASM: 48:       00 00 40 f9     ldr     x0, [x0]
 ; DISASM: 4c:       20 1a 09 30     adr     x0, #74565

llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test

 # CHECK:        0:       21 00 00 10     adr     x1, #4
 # CHECK: <msg>:
 # CHECK:        4:       48 65 6c 6c     .word
 # CHECK:        8:       6f 2c 20 77     .word
 # CHECK:        c:       6f 72 6c 64     .word
 # CHECK:       10:       0a 00           .short  0x000a
 # CHECK: Disassembly of section .myothersection:
 # CHECK: <$x.2>:
-# CHECK:        0:       01 00 00 90     adrp    x1, #0
+# CHECK:        0:       01 00 00 90     adrp    x1, 0x0
 # CHECK: <mystr>:
 # CHECK:        4:       62 6c 61 68     .word
 # CHECK:        8:       00              .byte   0x01

llvm/test/tools/llvm-objdump/ELF/AArch64/pcrel-address.yaml

+# RUN: yaml2obj %s -o %t
+# RUN: llvm-objdump %t -d --no-show-raw-insn --no-leading-addr | FileCheck %s
+
+# CHECK-LABEL: <_start>:
+# CHECK-NEXT:    adrp x2, 0x230000 <_start+0x80>
+# CHECK-NEXT:    adrp x2, 0x230000 <_start+0x84>
+
+--- !ELF
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