PowerPC cores like e200z759n3  using an efpu2 only support single precision hardware floating point instructions.
The single precision instructions efs* and evfs* are identical to the spe float instructions while efd* and evfd* instructions trigger a not implemented exception.
This patch introduces a new command line option -mefpu2 which leads to single-hardware / double-software code generation.
The regression tests in spe.ll were updated so that the tests are executed twice - with and without -mefpu2 option.
 Core reference: https://www.nxp.com/files-static/32bit/doc/ref_manual/e200z759CRM.pdf