[WebAssembly] Prototype i8x16.popcnt

[tlively]

Summary

As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target
builtin and intrinsic rather than normal codegen patterns to make the
instruction opt-in until it is merged to the proposal and stabilized in engines.

[aheejin]

clang/include/clang/Basic/BuiltinsWebAssembly.def

117

• Even if there's only one vector type for a builtin, it seems others still have type postfix attached.
• Is the result also a vector? Does that mean this instruction count each 16 slot separately?

[tlively]

• Update builtin function name

[tlively]

clang/include/clang/Basic/BuiltinsWebAssembly.def

117

Yes, the it does a popcnt on each 1-byte lane individually.

clang/include/clang/Basic/BuiltinsWebAssembly.def

 TARGET_BUILTIN(__builtin_wasm_min_s_i32x4, "V4iV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_min_u_i32x4, "V4UiV4UiV4Ui", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_s_i32x4, "V4iV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_max_u_i32x4, "V4UiV4UiV4Ui", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i8x16, "V16UcV16UcV16Uc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_avgr_u_i16x8, "V8UsV8UsV8Us", "nc", "simd128")
 
+TARGET_BUILTIN(__builtin_wasm_popcnt_i8x16, "V16ScV16Sc", "nc", "simd128")
+
 TARGET_BUILTIN(__builtin_wasm_q15mulr_saturate_s_i8x16, "V8sV8sV8s", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_shuffle_v8x16, "V16ScV16ScV16ScIiIiIiIiIiIiIiIiIiIiIiIiIiIiIiIi", "nc", "simd128")
 
 TARGET_BUILTIN(__builtin_wasm_any_true_i8x16, "iV16Sc", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_any_true_i16x8, "iV8s", "nc", "simd128")
 TARGET_BUILTIN(__builtin_wasm_any_true_i32x4, "iV4i", "nc", "simd128")

clang/lib/CodeGen/CGBuiltin.cpp

case WebAssembly::BI__builtin_wasm_bitselect: {
     return Builder.CreateCall(Callee, {V1, V2, C});
   }
   case WebAssembly::BI__builtin_wasm_dot_s_i32x4_i16x8: {
     Value *LHS = EmitScalarExpr(E->getArg(0));
     Value *RHS = EmitScalarExpr(E->getArg(1));
     Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_dot);
     return Builder.CreateCall(Callee, {LHS, RHS});
   }
+  case WebAssembly::BI__builtin_wasm_popcnt_i8x16: {
+    Value *Vec = EmitScalarExpr(E->getArg(0));
+    Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_popcnt);
+    return Builder.CreateCall(Callee, {Vec});
+  }
   case WebAssembly::BI__builtin_wasm_any_true_i8x16:
   case WebAssembly::BI__builtin_wasm_any_true_i16x8:
   case WebAssembly::BI__builtin_wasm_any_true_i32x4:
   case WebAssembly::BI__builtin_wasm_any_true_i64x2:
   case WebAssembly::BI__builtin_wasm_all_true_i8x16:
   case WebAssembly::BI__builtin_wasm_all_true_i16x8:
   case WebAssembly::BI__builtin_wasm_all_true_i32x4:
   case WebAssembly::BI__builtin_wasm_all_true_i64x2: {

clang/test/CodeGen/builtins-wasm.c

 
 i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
   return __builtin_wasm_bitselect(x, y, c);
   // WEBASSEMBLY: call <4 x i32> @llvm.wasm.bitselect.v4i32(
   // WEBASSEMBLY-SAME: <4 x i32> %x, <4 x i32> %y, <4 x i32> %c)
   // WEBASSEMBLY-NEXT: ret
 }
 
+i8x16 popcnt(i8x16 x) {
+  return __builtin_wasm_popcnt_i8x16(x);
+  // WEBASSEMBLY: call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)
+  // WEBASSEMBLY-NEXT: ret
+}
+
 int any_true_i8x16(i8x16 x) {
   return __builtin_wasm_any_true_i8x16(x);
   // WEBASSEMBLY: call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
   // WEBASSEMBLY: ret
 }
 
 int any_true_i16x8(i16x8 x) {
   return __builtin_wasm_any_true_i16x8(x);

llvm/include/llvm/IR/IntrinsicsWebAssembly.td

Intrinsic<[],
             [IntrWriteMem, IntrArgMemOnly],
             "", [SDNPMemOperand]>;
 def int_wasm_store64_lane :
   Intrinsic<[],
             [LLVMPointerType<llvm_i64_ty>, llvm_v2i64_ty, llvm_i32_ty],
             [IntrWriteMem, IntrArgMemOnly],
             "", [SDNPMemOperand]>;
 
+// TODO: Replace this intrinsic with normal ISel patterns once popcnt is merged
+// to the proposal.
+def int_wasm_popcnt :
+  Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty], [IntrNoMem, IntrSpeculatable]>;
+
 //===----------------------------------------------------------------------===//
 // Thread-local storage intrinsics
 //===----------------------------------------------------------------------===//
 
 def int_wasm_tls_size :
   Intrinsic<[llvm_anyint_ty],
             [],
             [IntrNoMem, IntrSpeculatable]>;

llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

 defm NEG : SIMDUnaryInt<ivneg, "neg", 97>;
 
 // Any lane true: any_true
 defm ANYTRUE : SIMDReduce<int_wasm_anytrue, "any_true", 98>;
 
 // All lanes true: all_true
 defm ALLTRUE : SIMDReduce<int_wasm_alltrue, "all_true", 99>;
 
+// Population count: popcnt
+defm POPCNT : SIMDUnary<v16i8, "i8x16", int_wasm_popcnt, "popcnt", 124>;
+
 // Reductions already return 0 or 1, so and 1, setne 0, and seteq 1
 // can be folded out
 foreach reduction =
   [["int_wasm_anytrue", "ANYTRUE"], ["int_wasm_alltrue", "ALLTRUE"]] in
 foreach ty = [v16i8, v8i16, v4i32, v2i64] in {
 def : Pat<(i32 (and
             (i32 (!cast<Intrinsic>(reduction[0]) (ty V128:$x))),
             (i32 1)

llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

 ; SIMD128-NEXT: i8x16.avgr_u $push[[R:[0-9]+]]=, $0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 declare <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(<16 x i8>, <16 x i8>)
 define <16 x i8> @avgr_u_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = call <16 x i8> @llvm.wasm.avgr.unsigned.v16i8(<16 x i8> %x, <16 x i8> %y)
   ret <16 x i8> %a
 }
 
+; CHECK-LABEL: popcnt_v16i8:
+; SIMD128-NEXT: .functype popcnt_v16i8 (v128) -> (v128){{$}}
+; SIMD128-NEXT: i8x16.popcnt $push[[R:[0-9]+]]=, $0{{$}}
+; SIMD128-NEXT: return $pop[[R]]{{$}}
+declare <16 x i8> @llvm.wasm.popcnt(<16 x i8>)
+define <16 x i8> @popcnt_v16i8(<16 x i8> %x) {
+ %a = call <16 x i8> @llvm.wasm.popcnt(<16 x i8> %x)
+ ret <16 x i8> %a
+}
+
 ; CHECK-LABEL: any_v16i8:
 ; SIMD128-NEXT: .functype any_v16i8 (v128) -> (i32){{$}}
 ; SIMD128-NEXT: i8x16.any_true $push[[R:[0-9]+]]=, $0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 declare i32 @llvm.wasm.anytrue.v16i8(<16 x i8>)
 define i32 @any_v16i8(<16 x i8> %x) {
   %a = call i32 @llvm.wasm.anytrue.v16i8(<16 x i8> %x)
   ret i32 %a

llvm/test/MC/WebAssembly/simd-encodings.s

main:
     i8x16.max_s
 
     # CHECK: i8x16.max_u # encoding: [0xfd,0x79]
     i8x16.max_u
 
     # CHECK: i8x16.avgr_u # encoding: [0xfd,0x7b]
     i8x16.avgr_u
 
+    # CHECK: i8x16.popcnt # encoding: [0xfd,0x7c]
+    i8x16.popcnt
+
     # CHECK: i16x8.abs # encoding: [0xfd,0x80,0x01]
     i16x8.abs
 
     # CHECK: i16x8.neg # encoding: [0xfd,0x81,0x01]
     i16x8.neg
 
     # CHECK: i16x8.any_true # encoding: [0xfd,0x82,0x01]
     i16x8.any_true