[SVE] Add ISel patterns for "insert undef_nxv#f##, f##, 0"

[paulwalker-arm]

Looking at the testing I think there are some holes regarding general vector inserts, but I'll investigate that under a different patch.

[david-arm]

LGTM! Brings tears of joy to my eyes.

llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td

def : Pat<(nxv16i8 (vector_insert (nxv16i8 (undef)), (i32 FPR32:$src), 0)),
             (INSERT_SUBREG (nxv16i8 (IMPLICIT_DEF)), FPR32:$src, ssub)>;
   def : Pat<(nxv8i16 (vector_insert (nxv8i16 (undef)), (i32 FPR32:$src), 0)),
             (INSERT_SUBREG (nxv8i16 (IMPLICIT_DEF)), FPR32:$src, ssub)>;
   def : Pat<(nxv4i32 (vector_insert (nxv4i32 (undef)), (i32 FPR32:$src), 0)),
             (INSERT_SUBREG (nxv4i32 (IMPLICIT_DEF)), FPR32:$src, ssub)>;
   def : Pat<(nxv2i64 (vector_insert (nxv2i64 (undef)), (i64 FPR64:$src), 0)),
             (INSERT_SUBREG (nxv2i64 (IMPLICIT_DEF)), FPR64:$src, dsub)>;
 
+  def : Pat<(nxv8f16 (vector_insert (nxv8f16 (undef)), (f16 FPR16:$src), 0)),
+            (INSERT_SUBREG (nxv8f16 (IMPLICIT_DEF)), FPR16:$src, hsub)>;
+  def : Pat<(nxv4f16 (vector_insert (nxv4f16 (undef)), (f16 FPR16:$src), 0)),
+            (INSERT_SUBREG (nxv4f16 (IMPLICIT_DEF)), FPR16:$src, hsub)>;
+  def : Pat<(nxv2f16 (vector_insert (nxv2f16 (undef)), (f16 FPR16:$src), 0)),
+            (INSERT_SUBREG (nxv2f16 (IMPLICIT_DEF)), FPR16:$src, hsub)>;
+  def : Pat<(nxv4f32 (vector_insert (nxv4f32 (undef)), (f32 FPR32:$src), 0)),
+            (INSERT_SUBREG (nxv4f32 (IMPLICIT_DEF)), FPR32:$src, ssub)>;
+  def : Pat<(nxv2f32 (vector_insert (nxv2f32 (undef)), (f32 FPR32:$src), 0)),
+            (INSERT_SUBREG (nxv2f32 (IMPLICIT_DEF)), FPR32:$src, ssub)>;
+  def : Pat<(nxv2f64 (vector_insert (nxv2f64 (undef)), (f64 FPR64:$src), 0)),
+            (INSERT_SUBREG (nxv2f64 (IMPLICIT_DEF)), FPR64:$src, dsub)>;
+
   // Insert scalar into vector[0]
   def : Pat<(nxv16i8 (vector_insert (nxv16i8 ZPR:$vec), (i32 GPR32:$src), 0)),
             (CPY_ZPmR_B ZPR:$vec, (PTRUE_B 1), GPR32:$src)>;
   def : Pat<(nxv8i16 (vector_insert (nxv8i16 ZPR:$vec), (i32 GPR32:$src), 0)),
             (CPY_ZPmR_H ZPR:$vec, (PTRUE_H 1), GPR32:$src)>;
   def : Pat<(nxv4i32 (vector_insert (nxv4i32 ZPR:$vec), (i32 GPR32:$src), 0)),
             (CPY_ZPmR_S ZPR:$vec, (PTRUE_S 1), GPR32:$src)>;
   def : Pat<(nxv2i64 (vector_insert (nxv2i64 ZPR:$vec), (i64 GPR64:$src), 0)),

llvm/test/CodeGen/AArch64/sve-insert-element.ll

 ; CHECK-NEXT:    ptrue p0.b
 ; CHECK-NEXT:    cmpeq p0.b, p0/z, z1.b, z2.b
 ; CHECK-NEXT:    mov z0.b, p0/m, w8
 ; CHECK-NEXT:    ret
   %c = extractelement <vscale x 16 x i8> %b, i32 1
   %d = insertelement <vscale x 16 x i8> %a, i8 %c, i32 3
   ret <vscale x 16 x i8> %d
 }
+
+define <vscale x 8 x half> @test_insert_into_undef_nxv8f16(half %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv8f16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $h0 killed $h0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 8 x half> undef, half %a, i32 0
+  ret <vscale x 8 x half> %b
+}
+
+define <vscale x 4 x half> @test_insert_into_undef_nxv4f16(half %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv4f16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $h0 killed $h0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 4 x half> undef, half %a, i32 0
+  ret <vscale x 4 x half> %b
+}
+
+define <vscale x 2 x half> @test_insert_into_undef_nxv2f16(half %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv2f16:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $h0 killed $h0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 2 x half> undef, half %a, i32 0
+  ret <vscale x 2 x half> %b
+}
+
+define <vscale x 4 x float> @test_insert_into_undef_nxv4f32(float %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv4f32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $s0 killed $s0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 4 x float> undef, float %a, i32 0
+  ret <vscale x 4 x float> %b
+}
+
+define <vscale x 2 x float> @test_insert_into_undef_nxv2f32(float %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv2f32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $s0 killed $s0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 2 x float> undef, float %a, i32 0
+  ret <vscale x 2 x float> %b
+}
+
+define <vscale x 2 x double> @test_insert_into_undef_nxv2f64(double %a) {
+; CHECK-LABEL: test_insert_into_undef_nxv2f64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT:    ret
+  %b = insertelement <vscale x 2 x double> undef, double %a, i32 0
+  ret <vscale x 2 x double> %b
+}