[llvm-readobj] [ARMWinEH] Print set_fp/add_fp differently in epilogues

[mstorsjo]

Summary

This matches how e.g. stp/ldp and other opcodes are printed differently for epilogues.

Also add a missing --strict-whitespace in an existing test that was added explicitly for testing vertical alignment.

[efriedma]

LGTM

[MaskRay]

Also add a missing --strict-whitespace in an existing test that was added explicitly for testing vertical alignment.

Without --match-full-lines, leading and trailing space changes cannot be detected. For // CHECK: a b, you can ensure the spaces between a and b are 2, but you cannot test the indentation.

[mstorsjo]

In D87363#2264369, @MaskRay wrote:

Also add a missing --strict-whitespace in an existing test that was added explicitly for testing vertical alignment.

Without --match-full-lines, leading and trailing space changes cannot be detected. For // CHECK: a b, you can ensure the spaces between a and b are 2, but you cannot test the indentation.

Yeah - here, --strict-whitespace is enough for the thing that the testcase wanted to test (the amount of spaces between the hex opcodes and their interpretation on the right hand side, which was fixed in D86523).

llvm/test/CodeGen/AArch64/wineh6.mir

 # CHECK-NEXT:        0x81                ; stp x29, x30, [sp, #-16]!
 # CHECK-NEXT:        0xe4                ; end
 # CHECK-NEXT:      ]
 # CHECK-NEXT:      EpilogueScopes [
 # CHECK-NEXT:        EpilogueScope {
 # CHECK-NEXT:          StartOffset: 20
 # CHECK-NEXT:          EpilogueStartIndex: 4
 # CHECK-NEXT:          Opcodes [
-# CHECK-NEXT:            0xe1                ; mov fp, sp
+# CHECK-NEXT:            0xe1                ; mov sp, fp
 # CHECK-NEXT:            0x81                ; ldp x29, x30, [sp], #16
 # CHECK-NEXT:            0xe4                ; end
 # CHECK-NEXT:          ]
 # CHECK-NEXT:        }
 # CHECK-NEXT:      ]
 # CHECK-NEXT:    }
 ...
 ---

llvm/test/CodeGen/AArch64/wineh7.mir

 # CHECK-NEXT:        0xcc85              ; stp x21, x22, [sp, #-48]!
 # CHECK-NEXT:        0xe4                ; end
 # CHECK-NEXT:      ]
 # CHECK-NEXT:      EpilogueScopes [
 # CHECK-NEXT:        EpilogueScope {
 # CHECK-NEXT:          StartOffset: 13
 # CHECK-NEXT:          EpilogueStartIndex: 8
 # CHECK-NEXT:          Opcodes [
-# CHECK-NEXT:            0xe204              ; add fp, sp, #32
+# CHECK-NEXT:            0xe204              ; sub sp, fp, #32
 # CHECK-NEXT:            0x44                ; ldp x29, x30, [sp, #32]
 # CHECK-NEXT:            0xc802              ; ldp x19, x20, [sp, #16]
 # CHECK-NEXT:            0xcc85              ; ldp x21, x22, [sp], #48
 # CHECK-NEXT:            0xe4                ; end
 # CHECK-NEXT:          ]
 # CHECK-NEXT:        }
 # CHECK-NEXT:      ]
 # CHECK-NEXT:    }

llvm/test/tools/llvm-readobj/COFF/arm64-unwind-opcodes.s

 // REQUIRES: aarch64-registered-target
-// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o - \
-// RUN:   | llvm-readobj --unwind - | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple aarch64-windows %s -o %t.o
+// RUN: llvm-readobj --unwind %t.o | FileCheck --strict-whitespace %s
 
 // CHECK:          Prologue [
+// CHECK-NEXT:        0xe202              ; add fp, sp, #16
+// CHECK-NEXT:        0xe1                ; mov fp, sp
 // CHECK-NEXT:        0xdc01              ; str d8, [sp, #8]
 // CHECK-NEXT:        0xd400              ; str x19, [sp, #-8]!
 // CHECK-NEXT:        0xe4                ; end
 // CHECK-NEXT:     ]
+// CHECK-NEXT:     EpilogueScopes [
+// CHECK-NEXT:       EpilogueScope {
+// CHECK-NEXT:         StartOffset:
+// CHECK-NEXT:         EpilogueStartIndex:
+// CHECK-NEXT:         Opcodes [
+// CHECK-NEXT:           0xe202              ; sub sp, fp, #16
+// CHECK-NEXT:           0xe1                ; mov sp, fp
+// CHECK-NEXT:           0xe4                ; end
+// CHECK-NEXT:         ]
+// CHECK-NEXT:       }
+// CHECK-NEXT:     ]
 
 .section .pdata,"dr"
         .long func@IMGREL
         .long "$unwind$func"@IMGREL
 
         .text
         .globl  func
 func:
         str x19, [sp, #-8]!
-        str d8,  [sp, #8]
+        str d8, [sp, #8]
+        mov x29, sp
+        add x29, sp, #16
+        nop
+        sub sp, x29, #16
+        mov sp, x29
         ret
 
 .section .xdata,"dr"
 "$unwind$func":
-.long 0x10000002, 0x00d401dc, 0xe3e3e3e4
+.byte 0x08, 0x00, 0x40, 0x18
+.byte 0x05, 0x00, 0x00, 0x02
+.byte 0xe2, 0x02, 0xe1, 0xdc
+.byte 0x01, 0xd4, 0x00, 0xe4
+.byte 0xe2, 0x02, 0xe1, 0xe4

llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp

SW.startLine() << format(
       OC[Offset + 2], OC[Offset + 3],
       static_cast<const char *>(Prologue ? "sub" : "add"), Off);
   Offset += 4;
   return false;
 }
 
 bool Decoder::opcode_setfp(const uint8_t *OC, unsigned &Offset, unsigned Length,
                            bool Prologue) {
-  SW.startLine() << format("0x%02x                ; mov fp, sp\n", OC[Offset]);
+  SW.startLine() << format("0x%02x                ; mov %s, %s\n", OC[Offset],
+                           static_cast<const char *>(Prologue ? "fp" : "sp"),
+                           static_cast<const char *>(Prologue ? "sp" : "fp"));
   ++Offset;
   return false;
 }
 
 bool Decoder::opcode_addfp(const uint8_t *OC, unsigned &Offset, unsigned Length,
                            bool Prologue) {
   unsigned NumBytes = OC[Offset + 1] << 3;
-  SW.startLine() << format("0x%02x%02x              ; add fp, sp, #%u\n",
-                           OC[Offset], OC[Offset + 1], NumBytes);
+  SW.startLine() << format(
+      "0x%02x%02x              ; %s %s, %s, #%u\n", OC[Offset], OC[Offset + 1],
+      static_cast<const char *>(Prologue ? "add" : "sub"),
+      static_cast<const char *>(Prologue ? "fp" : "sp"),
+      static_cast<const char *>(Prologue ? "sp" : "fp"), NumBytes);
   Offset += 2;
   return false;
 }
 
 bool Decoder::opcode_nop(const uint8_t *OC, unsigned &Offset, unsigned Length,
                          bool Prologue) {
   SW.startLine() << format("0x%02x                ; nop\n", OC[Offset]);
   ++Offset;