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Differential D86737

[Attributor] Fix AANoUndef identification
ClosedPublic

Authored by okura on Aug 27 2020, 2:15 PM.

Details

Reviewers
uenoku
jdoerfert
homerdin
sstefan1
baziotis
Commits
rG7a15dfd0565c: [Attributor] Fix AANoUndef identification
Summary

Even though noundef IR attribute might be attached to non-void type values, AANoUndef is mistakenly identified for pointer type values only.
This patch fixes that.

Diff Detail

Event Timeline

okura created this revision.Aug 27 2020, 2:15 PM
Herald added a reviewer: uenoku. · View Herald TranscriptAug 27 2020, 2:15 PM
Herald added a reviewer: jdoerfert. · View Herald Transcript
Herald added a reviewer: homerdin. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: llvm-commits, kuter, uenoku, hiraditya. · View Herald Transcript
okura requested review of this revision.Aug 27 2020, 2:15 PM
Herald added a reviewer: sstefan1. · View Herald TranscriptAug 27 2020, 2:15 PM
Herald added a reviewer: baziotis. · View Herald Transcript
Herald added subscribers: bbn, sstefan1. · View Herald Transcript
jdoerfert added inline comments.Aug 27 2020, 5:32 PM
llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
20

Hm,... I think this exposes a problem. Could you take a look why we get a noundef here?

okura added inline comments.Aug 29 2020, 2:32 AM
llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
20

I overlooked this problem, thanks.
In this case, I expected that we indicate a pessimistic fixpoint for %div = sdiv ... in genericValueTraversal because we cannot strip value even once.
A simplified value for %div does not have value (i.e. llvm::None) because the assumed range is empty. (we can intentionally reduce undef to 0 there.)
Therefore, a callback is not called in genericValueTraversal and it returns true. That's why we got a noundef here.
We can avoid this by changing manifest not to manifest for such positions.

Herald added a subscriber: danielkiss. · View Herald TranscriptAug 29 2020, 2:32 AM
okura added inline comments.Aug 29 2020, 3:01 AM
llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
20

I made a new patch for this. D86835
However, I'm worried that a similar problem will emerge again when another AA has the possibility to change values to undef.
I think implementing a new interface of Attributor to query if a position will be changed to undef is one of the possible solutions. But it would not be trivial change because we should manage the order of manifestation. (i.e. we should process noundef manifestation at last.)
How do you think about this?

jdoerfert accepted this revision.Aug 29 2020, 10:27 AM

LGTM

llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
20

It seems I did not properly read what was happening. sdiv .., undef is UB. So deriving noundef for the result is OK. Eventually we should replace this with unreachable but not here.

This revision is now accepted and ready to land.Aug 29 2020, 10:27 AM
okura updated this revision to Diff 288793.Aug 29 2020, 11:22 AM

Reflect change in D86835

okura updated this revision to Diff 288797.Aug 29 2020, 12:20 PM

Rebase

okura updated this revision to Diff 288804.Aug 29 2020, 1:33 PM

fix OpenMP/parallel_deletion.ll

Closed by commit rG7a15dfd0565c: [Attributor] Fix AANoUndef identification (authored by okura). · Explain WhyAug 29 2020, 1:40 PM
This revision was automatically updated to reflect the committed changes.
okura added a commit: rG7a15dfd0565c: [Attributor] Fix AANoUndef identification.

Revision Contents

PathSize
llvm/
lib/
Transforms/
IPO/
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test/
Transforms/
Attributor/
ArgumentPromotion/
X86/
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IPConstantProp/
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Diff 288793

llvm/lib/Transforms/IPO/Attributor.cpp

Show First 20 Lines • Show All 1,954 Lines • ▼ Show 20 Lines if (!ReturnType->isVoidTy()) {
IRPosition RetPos = IRPosition::returned(F); IRPosition RetPos = IRPosition::returned(F);
// Every returned value might be dead. // Every returned value might be dead.
getOrCreateAAFor<AAIsDead>(RetPos); getOrCreateAAFor<AAIsDead>(RetPos);
// Every function might be simplified. // Every function might be simplified.
getOrCreateAAFor<AAValueSimplify>(RetPos); getOrCreateAAFor<AAValueSimplify>(RetPos);
// Every returned value might be marked noundef.
getOrCreateAAFor<AANoUndef>(RetPos);
if (ReturnType->isPointerTy()) { if (ReturnType->isPointerTy()) {
// Every function with pointer return type might be marked align. // Every function with pointer return type might be marked align.
getOrCreateAAFor<AAAlign>(RetPos); getOrCreateAAFor<AAAlign>(RetPos);
// Every function with pointer return type might be marked nonnull. // Every function with pointer return type might be marked nonnull.
getOrCreateAAFor<AANonNull>(RetPos); getOrCreateAAFor<AANonNull>(RetPos);
// Every function with pointer return type might be marked noalias. // Every function with pointer return type might be marked noalias.
getOrCreateAAFor<AANoAlias>(RetPos); getOrCreateAAFor<AANoAlias>(RetPos);
// Every function with pointer return type might be marked // Every function with pointer return type might be marked
// dereferenceable. // dereferenceable.
getOrCreateAAFor<AADereferenceable>(RetPos); getOrCreateAAFor<AADereferenceable>(RetPos);
// Every function with pointer return type might be marked noundef.
getOrCreateAAFor<AANoUndef>(RetPos);
} }
} }
for (Argument &Arg : F.args()) { for (Argument &Arg : F.args()) {
IRPosition ArgPos = IRPosition::argument(Arg); IRPosition ArgPos = IRPosition::argument(Arg);
// Every argument might be simplified. // Every argument might be simplified.
getOrCreateAAFor<AAValueSimplify>(ArgPos); getOrCreateAAFor<AAValueSimplify>(ArgPos);
// Every argument might be dead. // Every argument might be dead.
getOrCreateAAFor<AAIsDead>(ArgPos); getOrCreateAAFor<AAIsDead>(ArgPos);
// Every argument might be marked noundef.
getOrCreateAAFor<AANoUndef>(ArgPos);
if (Arg.getType()->isPointerTy()) { if (Arg.getType()->isPointerTy()) {
// Every argument with pointer type might be marked nonnull. // Every argument with pointer type might be marked nonnull.
getOrCreateAAFor<AANonNull>(ArgPos); getOrCreateAAFor<AANonNull>(ArgPos);
// Every argument with pointer type might be marked noalias. // Every argument with pointer type might be marked noalias.
getOrCreateAAFor<AANoAlias>(ArgPos); getOrCreateAAFor<AANoAlias>(ArgPos);
// Every argument with pointer type might be marked dereferenceable. // Every argument with pointer type might be marked dereferenceable.
Show All 9 Lines if (Arg.getType()->isPointerTy()) {
// "readnone/readonly/writeonly/..." // "readnone/readonly/writeonly/..."
getOrCreateAAFor<AAMemoryBehavior>(ArgPos); getOrCreateAAFor<AAMemoryBehavior>(ArgPos);
// Every argument with pointer type might be marked nofree. // Every argument with pointer type might be marked nofree.
getOrCreateAAFor<AANoFree>(ArgPos); getOrCreateAAFor<AANoFree>(ArgPos);
// Every argument with pointer type might be privatizable (or promotable) // Every argument with pointer type might be privatizable (or promotable)
getOrCreateAAFor<AAPrivatizablePtr>(ArgPos); getOrCreateAAFor<AAPrivatizablePtr>(ArgPos);
// Every argument with pointer type might be marked noundef.
getOrCreateAAFor<AANoUndef>(ArgPos);
} }
} }
auto CallSitePred = [&](Instruction &I) -> bool { auto CallSitePred = [&](Instruction &I) -> bool {
auto &CB = cast<CallBase>(I); auto &CB = cast<CallBase>(I);
IRPosition CBRetPos = IRPosition::callsite_returned(CB); IRPosition CBRetPos = IRPosition::callsite_returned(CB);
// Call sites might be dead if they do not have side effects and no live // Call sites might be dead if they do not have side effects and no live
Show All 26 Lines for (int I = 0, E = CB.getNumArgOperands(); I < E; ++I) {
IRPosition CBArgPos = IRPosition::callsite_argument(CB, I); IRPosition CBArgPos = IRPosition::callsite_argument(CB, I);
// Every call site argument might be dead. // Every call site argument might be dead.
getOrCreateAAFor<AAIsDead>(CBArgPos); getOrCreateAAFor<AAIsDead>(CBArgPos);
// Call site argument might be simplified. // Call site argument might be simplified.
getOrCreateAAFor<AAValueSimplify>(CBArgPos); getOrCreateAAFor<AAValueSimplify>(CBArgPos);
// Every call site argument might be marked "noundef".
getOrCreateAAFor<AANoUndef>(CBArgPos);
if (!CB.getArgOperand(I)->getType()->isPointerTy()) if (!CB.getArgOperand(I)->getType()->isPointerTy())
continue; continue;
// Call site argument attribute "non-null". // Call site argument attribute "non-null".
getOrCreateAAFor<AANonNull>(CBArgPos); getOrCreateAAFor<AANonNull>(CBArgPos);
// Call site argument attribute "nocapture". // Call site argument attribute "nocapture".
getOrCreateAAFor<AANoCapture>(CBArgPos); getOrCreateAAFor<AANoCapture>(CBArgPos);
// Call site argument attribute "no-alias". // Call site argument attribute "no-alias".
getOrCreateAAFor<AANoAlias>(CBArgPos); getOrCreateAAFor<AANoAlias>(CBArgPos);
// Call site argument attribute "dereferenceable". // Call site argument attribute "dereferenceable".
getOrCreateAAFor<AADereferenceable>(CBArgPos); getOrCreateAAFor<AADereferenceable>(CBArgPos);
// Call site argument attribute "align". // Call site argument attribute "align".
getOrCreateAAFor<AAAlign>(CBArgPos); getOrCreateAAFor<AAAlign>(CBArgPos);
// Call site argument attribute // Call site argument attribute
// "readnone/readonly/writeonly/..." // "readnone/readonly/writeonly/..."
getOrCreateAAFor<AAMemoryBehavior>(CBArgPos); getOrCreateAAFor<AAMemoryBehavior>(CBArgPos);
// Call site argument attribute "nofree". // Call site argument attribute "nofree".
getOrCreateAAFor<AANoFree>(CBArgPos); getOrCreateAAFor<AANoFree>(CBArgPos);
// Call site argument attribute "noundef".
getOrCreateAAFor<AANoUndef>(CBArgPos);
} }
return true; return true;
}; };
auto &OpcodeInstMap = InfoCache.getOpcodeInstMapForFunction(F); auto &OpcodeInstMap = InfoCache.getOpcodeInstMapForFunction(F);
bool Success; bool Success;
Success = checkForAllInstructionsImpl( Success = checkForAllInstructionsImpl(
nullptr, OpcodeInstMap, CallSitePred, nullptr, nullptr, nullptr, OpcodeInstMap, CallSitePred, nullptr, nullptr,
▲ Show 20 Lines • Show All 412 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll

Show All 33 Lines
define void @no_promote(<4 x i64>* %arg) #1 { define void @no_promote(<4 x i64>* %arg) #1 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_promote ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_promote
; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_promote ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_promote
; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <4 x i64>, align 32 %tmp = alloca <4 x i64>, align 32
%tmp2 = alloca <4 x i64>, align 32 %tmp2 = alloca <4 x i64>, align 32
Show All 33 Lines
define void @promote(<4 x i64>* %arg) #0 { define void @promote(<4 x i64>* %arg) #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@promote ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@promote
; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@promote ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@promote
; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<4 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[TMP]], align 32
; IS__TUNIT_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@promote ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@promote
; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@promote
; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <4 x i64>, align 32 %tmp = alloca <4 x i64>, align 32
%tmp2 = alloca <4 x i64>, align 32 %tmp2 = alloca <4 x i64>, align 32
Show All 14 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll

Show All 38 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer512
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 36 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 36 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer512_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 36 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal512_prefer512
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 34 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal256_prefer256_call_avx512_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 34 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx512_legal512_prefer256_call_avx512_legal256_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 36 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal256_prefer256_call_avx2_legal512_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 36 Lines
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: bb: ; IS__TUNIT_OPM-NEXT: bb:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__TUNIT_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (<8 x i64>* nocapture writeonly [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: bb: ; IS__TUNIT_NPM-NEXT: bb:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 32 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[TMP]], align 64
; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) ; IS__TUNIT_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]])
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_OPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly inlinehint norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@avx2_legal512_prefer256_call_avx2_legal256_prefer256
; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) ; IS__CGSCC_NPM-SAME: (<8 x i64>* nocapture nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]])
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <8 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 0, i64 32, i1 false) ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture noundef nonnull writeonly align 64 dereferenceable(64) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false)
; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) ; IS__CGSCC_NPM-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(<8 x i64>* noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64>* noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]])
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64 ; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = load <8 x i64>, <8 x i64>* [[TMP2]], align 64
; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2 ; IS__CGSCC_NPM-NEXT: store <8 x i64> [[TMP4]], <8 x i64>* [[ARG]], align 2
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
bb: bb:
%tmp = alloca <8 x i64>, align 32 %tmp = alloca <8 x i64>, align 32
%tmp2 = alloca <8 x i64>, align 32 %tmp2 = alloca <8 x i64>, align 32
Show All 17 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
; Don't drop 'byval' on %X here. ; Don't drop 'byval' on %X here.
define internal i32 @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind { define internal i32 @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree nonnull byval align 4 dereferenceable(4) [[X:%.*]], i32 [[I:%.*]]) ; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree nonnull byval align 4 dereferenceable(4) [[X:%.*]], i32 noundef [[I:%.*]])
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS:%.*]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
; IS__TUNIT_OPM-NEXT: ret i32 [[A]] ; IS__TUNIT_OPM-NEXT: ret i32 [[A]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[I:%.*]]) ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 noundef [[I:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[X:%.*]]) ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[X:%.*]])
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__TUNIT_OPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval align 4 [[X]], i32 zeroext 0) ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval align 4 [[X]], i32 noundef zeroext 0)
; IS__TUNIT_OPM-NEXT: ret i32 [[C]] ; IS__TUNIT_OPM-NEXT: ret i32 [[C]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[X:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[X:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 2, i64* [[TMP4]], align 4
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]], i32 [[TMP2]], i32 zeroext 0) ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]], i32 [[TMP2]], i32 noundef zeroext 0)
; IS__TUNIT_NPM-NEXT: ret i32 [[C]] ; IS__TUNIT_NPM-NEXT: ret i32 [[C]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[X:%.*]]) ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[X:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
Show All 34 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
define internal i32 @callee(i1 %C, i32* %P) { define internal i32 @callee(i1 %C, i32* %P) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) ; IS__TUNIT_OPM-SAME: (i1 noundef [[C:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]])
; IS__TUNIT_OPM-NEXT: br label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[F:%.*]]
; IS__TUNIT_OPM: T: ; IS__TUNIT_OPM: T:
; IS__TUNIT_OPM-NEXT: unreachable ; IS__TUNIT_OPM-NEXT: unreachable
; IS__TUNIT_OPM: F: ; IS__TUNIT_OPM: F:
; IS__TUNIT_OPM-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4 ; IS__TUNIT_OPM-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[X]] ; IS__TUNIT_OPM-NEXT: ret i32 [[X]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]], i32 [[TMP0:%.*]]) ; IS__TUNIT_NPM-SAME: (i1 noundef [[C:%.*]], i32 [[TMP0:%.*]])
; IS__TUNIT_NPM-NEXT: [[P_PRIV:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[P_PRIV:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: br label [[F:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[F:%.*]]
; IS__TUNIT_NPM: T: ; IS__TUNIT_NPM: T:
; IS__TUNIT_NPM-NEXT: unreachable ; IS__TUNIT_NPM-NEXT: unreachable
; IS__TUNIT_NPM: F: ; IS__TUNIT_NPM: F:
; IS__TUNIT_NPM-NEXT: [[X:%.*]] = load i32, i32* [[P_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: [[X:%.*]] = load i32, i32* [[P_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[X]] ; IS__TUNIT_NPM-NEXT: ret i32 [[X]]
Show All 18 LinesF: ; preds = %0
ret i32 %X ret i32 %X
} }
define i32 @foo() { define i32 @foo() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@foo() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@foo()
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: store i32 17, i32* [[A]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 17, i32* [[A]], align 4
; IS__TUNIT_OPM-NEXT: [[X:%.*]] = call i32 @callee(i1 false, i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]]) ; IS__TUNIT_OPM-NEXT: [[X:%.*]] = call i32 @callee(i1 noundef false, i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]])
; IS__TUNIT_OPM-NEXT: ret i32 [[X]] ; IS__TUNIT_OPM-NEXT: ret i32 [[X]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@foo() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@foo()
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 17, i32* [[A]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 17, i32* [[A]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT_NPM-NEXT: [[X:%.*]] = call i32 @callee(i1 false, i32 [[TMP1]]) ; IS__TUNIT_NPM-NEXT: [[X:%.*]] = call i32 @callee(i1 noundef false, i32 [[TMP1]])
; IS__TUNIT_NPM-NEXT: ret i32 [[X]] ; IS__TUNIT_NPM-NEXT: ret i32 [[X]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo() ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo()
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: store i32 17, i32* [[A]], align 4 ; IS__CGSCC____-NEXT: store i32 17, i32* [[A]], align 4
; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]]) ; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]])
; IS__CGSCC____-NEXT: ret i32 [[X]] ; IS__CGSCC____-NEXT: ret i32 [[X]]
; ;
%A = alloca i32 ; <i32*> [#uses=2] %A = alloca i32 ; <i32*> [#uses=2]
store i32 17, i32* %A store i32 17, i32* %A
%X = call i32 @callee( i1 false, i32* %A ) ; <i32> [#uses=1] %X = call i32 @callee( i1 false, i32* %A ) ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }

llvm/test/Transforms/Attributor/ArgumentPromotion/dbg.ll

Show All 18 Lines;
call void @sink(i32 %2) call void @sink(i32 %2)
ret void ret void
} }
%struct.pair = type { i32, i32 } %struct.pair = type { i32, i32 }
define internal void @test_byval(%struct.pair* byval %P) { define internal void @test_byval(%struct.pair* byval %P) {
; CHECK-LABEL: define {{[^@]+}}@test_byval() ; CHECK-LABEL: define {{[^@]+}}@test_byval()
; CHECK-NEXT: call void @sink(i32 0) ; CHECK-NEXT: call void @sink(i32 noundef 0)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @sink(i32 0) call void @sink(i32 0)
ret void ret void
} }
define void @caller(i32** %Y, %struct.pair* %P) { define void @caller(i32** %Y, %struct.pair* %P) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller
Show All 27 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/musttail.ll

Show First 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]]) ; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]])
; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3 ; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2 ; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]] ; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: [[CA:%.*]] = musttail call i32 @foo(%T* undef, i32 [[V]]) ; IS__CGSCC____-NEXT: [[CA:%.*]] = musttail call noundef i32 @foo(%T* undef, i32 [[V]])
; IS__CGSCC____-NEXT: ret i32 [[CA]] ; IS__CGSCC____-NEXT: ret i32 [[CA]]
; ;
%a.gep = getelementptr %T, %T* %p, i64 0, i32 3 %a.gep = getelementptr %T, %T* %p, i64 0, i32 3
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
%ca = musttail call i32 @foo(%T* undef, i32 %v) %ca = musttail call i32 @foo(%T* undef, i32 %v)
ret i32 %ca ret i32 %ca
} }
define i32 @caller2(%T* %g) { define i32 @caller2(%T* %g) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2
; IS__TUNIT____-SAME: (%T* nocapture nofree readnone [[G:%.*]]) ; IS__TUNIT____-SAME: (%T* nocapture nofree readnone [[G:%.*]])
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly align 4 [[G:%.*]]) ; IS__CGSCC____-SAME: (%T* nocapture nofree readonly align 4 [[G:%.*]])
; IS__CGSCC____-NEXT: [[V:%.*]] = call i32 @test2(%T* nocapture nofree readonly [[G]], i32 0) ; IS__CGSCC____-NEXT: [[V:%.*]] = call noundef i32 @test2(%T* nocapture nofree readonly [[G]], i32 noundef 0)
; IS__CGSCC____-NEXT: ret i32 [[V]] ; IS__CGSCC____-NEXT: ret i32 [[V]]
; ;
%v = call i32 @test2(%T* %g, i32 0) %v = call i32 @test2(%T* %g, i32 0)
ret i32 %v ret i32 %v
} }
; In the version above we can remove the call to foo completely. ; In the version above we can remove the call to foo completely.
; In the version below we keep the call and verify the return value ; In the version below we keep the call and verify the return value
Show All 34 Lines
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2b ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2b
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]]) ; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]])
; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3 ; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2 ; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]] ; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: [[CA:%.*]] = musttail call i32 @bar(%T* undef, i32 [[V]]) ; IS__CGSCC____-NEXT: [[CA:%.*]] = musttail call noundef i32 @bar(%T* undef, i32 [[V]])
; IS__CGSCC____-NEXT: ret i32 [[CA]] ; IS__CGSCC____-NEXT: ret i32 [[CA]]
; ;
%a.gep = getelementptr %T, %T* %p, i64 0, i32 3 %a.gep = getelementptr %T, %T* %p, i64 0, i32 3
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
%ca = musttail call i32 @bar(%T* undef, i32 %v) %ca = musttail call i32 @bar(%T* undef, i32 %v)
ret i32 %ca ret i32 %ca
} }
define i32 @caller2b(%T* %g) { define i32 @caller2b(%T* %g) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2b ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2b
; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[G:%.*]]) ; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[G:%.*]])
; IS__TUNIT____-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 undef) ; IS__TUNIT____-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 undef)
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2b ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2b
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly align 4 [[G:%.*]]) ; IS__CGSCC____-SAME: (%T* nocapture nofree readonly align 4 [[G:%.*]])
; IS__CGSCC____-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 0) ; IS__CGSCC____-NEXT: [[V:%.*]] = call noundef i32 @test2b(%T* nocapture nofree readonly [[G]], i32 noundef 0)
; IS__CGSCC____-NEXT: ret i32 [[V]] ; IS__CGSCC____-NEXT: ret i32 [[V]]
; ;
%v = call i32 @test2b(%T* %g, i32 0) %v = call i32 @test2b(%T* %g, i32 0)
ret i32 %v ret i32 %v
} }

llvm/test/Transforms/Attributor/ArgumentPromotion/variadic.ll

Show All 28 Linesentry:
ret i32 0 ret i32 0
} }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...) { define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee_t0f ; IS__TUNIT____-LABEL: define {{[^@]+}}@callee_t0f
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull readnone [[TP13:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP14:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP15:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP16:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP17:%.*]], ...) ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull readnone [[TP13:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP14:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP15:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP16:%.*]], i8* noalias nocapture nofree nonnull readnone [[TP17:%.*]], ...)
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: call void @sink(i32 0) ; IS__TUNIT____-NEXT: call void @sink(i32 noundef 0)
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee_t0f ; IS__CGSCC____-LABEL: define {{[^@]+}}@callee_t0f
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone [[TP13:%.*]], i8* nocapture nofree nonnull readnone [[TP14:%.*]], i8* nocapture nofree nonnull readnone [[TP15:%.*]], i8* nocapture nofree nonnull readnone [[TP16:%.*]], i8* nocapture nofree nonnull readnone [[TP17:%.*]], ...) ; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone [[TP13:%.*]], i8* nocapture nofree nonnull readnone [[TP14:%.*]], i8* nocapture nofree nonnull readnone [[TP15:%.*]], i8* nocapture nofree nonnull readnone [[TP16:%.*]], i8* nocapture nofree nonnull readnone [[TP17:%.*]], ...)
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: call void @sink(i32 0) ; IS__CGSCC____-NEXT: call void @sink(i32 noundef 0)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
call void @sink(i32 0) call void @sink(i32 0)
ret void ret void
} }
declare void @sink(i32) declare void @sink(i32)

llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll

Show All 11 Lines
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2() ; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2()
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 undef) [[ATTR0:#.*]], [[RNG0:!range !.*]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 undef) [[ATTR0:#.*]], [[RNG0:!range !.*]]
; IS__TUNIT____-NEXT: ret i64 [[CALL2]] ; IS__TUNIT____-NEXT: ret i64 [[CALL2]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2() ; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2()
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 undef) ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 undef)
jdoerfertUnsubmitted
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Hm,... I think this exposes a problem. Could you take a look why we get a noundef here?

jdoerfert: Hm,... I think this exposes a problem. Could you take a look why we get a noundef here?
okuraAuthorUnsubmitted
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I overlooked this problem, thanks.
In this case, I expected that we indicate a pessimistic fixpoint for %div = sdiv ... in genericValueTraversal because we cannot strip value even once.
A simplified value for %div does not have value (i.e. llvm::None) because the assumed range is empty. (we can intentionally reduce undef to 0 there.)
Therefore, a callback is not called in genericValueTraversal and it returns true. That's why we got a noundef here.
We can avoid this by changing manifest not to manifest for such positions.

okura: I overlooked this problem, thanks. In this case, I expected that we indicate a pessimistic…
okuraAuthorUnsubmitted
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I made a new patch for this. D86835
However, I'm worried that a similar problem will emerge again when another AA has the possibility to change values to undef.
I think implementing a new interface of Attributor to query if a position will be changed to undef is one of the possible solutions. But it would not be trivial change because we should manage the order of manifestation. (i.e. we should process noundef manifestation at last.)
How do you think about this?

okura: I made a new patch for this. D86835 However, I'm worried that a similar problem will emerge…
jdoerfertUnsubmitted
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It seems I did not properly read what was happening. sdiv .., undef is UB. So deriving noundef for the result is OK. Eventually we should replace this with unreachable but not here.

jdoerfert: It seems I did not properly read what was happening. `sdiv .., undef` is UB. So deriving…
; IS__CGSCC____-NEXT: ret i64 [[CALL2]] ; IS__CGSCC____-NEXT: ret i64 [[CALL2]]
; ;
entry: entry:
%conv = sext i32 undef to i64 %conv = sext i32 undef to i64
%div = sdiv i64 8, %conv %div = sdiv i64 8, %conv
%call2 = call i64 @fn1(i64 %div) %call2 = call i64 @fn1(i64 %div)
ret i64 %call2 ret i64 %call2
} }
Show All 23 Linesentry:
%call2 = call i64 @fn1(i64 %div) %call2 = call i64 @fn1(i64 %div)
ret i64 %call2 ret i64 %call2
} }
define i64 @fn2c() { define i64 @fn2c() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2c() ; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2c()
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 42) [[ATTR0]], [[RNG0]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 noundef 42) [[ATTR0]], [[RNG0]]
; IS__TUNIT____-NEXT: ret i64 [[CALL2]] ; IS__TUNIT____-NEXT: ret i64 [[CALL2]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2c() ; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2c()
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i64 42 ; IS__CGSCC____-NEXT: ret i64 42
; ;
entry: entry:
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llvm/test/Transforms/Attributor/IPConstantProp/arg-count-mismatch.ll

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; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) ; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]])
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 @bar() ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 @bar()
; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) ; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]])
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 @bar() ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noundef i16 @bar()
; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
%call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16) *)(i16 %a) %call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16) *)(i16 %a)
ret i16 %call ret i16 %call
} }
define internal i16 @bar(i16 %p1, i16 %p2) { define internal i16 @bar(i16 %p1, i16 %p2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
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;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
; Additional tests to verify that we still optimize when having a mismatch ; Additional tests to verify that we still optimize when having a mismatch
; in argument count due to varargs (as long as all non-variadic arguments have ; in argument count due to varargs (as long as all non-variadic arguments have
; been provided), ; been provided),
define dso_local i16 @vararg_tests(i16 %a) { define dso_local i16 @vararg_tests(i16 %a) {
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_tests ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_tests
; NOT_CGSCC_OPM-SAME: (i16 [[A:%.*]]) ; NOT_CGSCC_OPM-SAME: (i16 [[A:%.*]])
; NOT_CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 7) ; NOT_CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7)
; NOT_CGSCC_OPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]] ; NOT_CGSCC_OPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]]
; NOT_CGSCC_OPM-NEXT: ret i16 [[ADD]] ; NOT_CGSCC_OPM-NEXT: ret i16 [[ADD]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_tests ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_tests
; IS__CGSCC_OPM-SAME: (i16 [[A:%.*]]) ; IS__CGSCC_OPM-SAME: (i16 [[A:%.*]])
; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i16 (i16, ...) @vararg_prop(i16 7, i16 8, i16 [[A]]) ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i16 (i16, ...) @vararg_prop(i16 noundef 7, i16 noundef 8, i16 [[A]])
; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 7) ; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7)
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i16 [[CALL1]], [[CALL2]] ; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i16 [[CALL1]], [[CALL2]]
; IS__CGSCC_OPM-NEXT: ret i16 [[ADD]] ; IS__CGSCC_OPM-NEXT: ret i16 [[ADD]]
; ;
%call1 = call i16 (i16, ...) @vararg_prop(i16 7, i16 8, i16 %a) %call1 = call i16 (i16, ...) @vararg_prop(i16 7, i16 8, i16 %a)
%call2 = call i16 bitcast (i16 (i16, i16, ...) * @vararg_no_prop to i16 (i16) *) (i16 7) %call2 = call i16 bitcast (i16 (i16, i16, ...) * @vararg_no_prop to i16 (i16) *) (i16 7)
%add = add i16 %call1, %call2 %add = add i16 %call1, %call2
ret i16 %add ret i16 %add
} }
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llvm/test/Transforms/Attributor/IPConstantProp/multiple_callbacks.ll

Show First 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
; ;
entry: entry:
ret i32 %zero ret i32 %zero
} }
define internal i32 @cb1(i32 %unknown) { define internal i32 @cb1(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@cb1
; IS__TUNIT____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@cb1
; IS__CGSCC____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]] ; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb2(i32 %unknown) { define internal i32 @cb2(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@cb2
; IS__TUNIT____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@cb2
; IS__CGSCC____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]] ; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
%call = call i32 @cb0(i32 0) %call = call i32 @cb0(i32 0)
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb3(i32 %unknown) { define internal i32 @cb3(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@cb3
; IS__TUNIT____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@cb3
; IS__CGSCC____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]] ; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb4(i32 %unknown) { define internal i32 @cb4(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@cb4
; IS__TUNIT____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@cb4
; IS__CGSCC____-SAME: (i32 returned [[UNKNOWN:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]])
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]] ; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define void @foo() { define void @foo() {
; CHECK-LABEL: define {{[^@]+}}@foo() ; CHECK-LABEL: define {{[^@]+}}@foo()
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb0, i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb0, i32 0, i32 1) ; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb0, i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb0, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb2, i32 0, i32 1) ; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb2, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb3, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb3, i32 0, i32 1) ; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb3, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb3, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 0, i32 1) ; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%call = call i32 @cb0(i32 0) %call = call i32 @cb0(i32 0)
%call1 = call i32 @cb3(i32 1) %call1 = call i32 @cb3(i32 1)
call void @broker(i32 (i32)* nonnull @cb0, i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb0, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb0, i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb0, i32 0, i32 1)
call void @broker(i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb2, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb2, i32 0, i32 1)
call void @broker(i32 (i32)* nonnull @cb3, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb3, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb3, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb3, i32 0, i32 1)
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llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll

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; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@foo ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@foo
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) ; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]])
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__TUNIT_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__TUNIT_OPM-NEXT: store float 3.000000e+00, float* [[P]], align 4 ; IS__TUNIT_OPM-NEXT: store float 3.000000e+00, float* [[P]], align 4
; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__TUNIT_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 undef) ; IS__TUNIT_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 undef)
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@foo ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@foo
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) ; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: store float 3.000000e+00, float* [[P]], align 4 ; IS__TUNIT_NPM-NEXT: store float 3.000000e+00, float* [[P]], align 4
; IS__TUNIT_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 undef) ; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 undef)
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) ; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__CGSCC_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: store float 3.000000e+00, float* [[P]], align 4 ; IS__CGSCC_OPM-NEXT: store float 3.000000e+00, float* [[P]], align 4
; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 4617315517961601024) ; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024)
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) ; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]])
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__CGSCC_NPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__CGSCC_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__CGSCC_NPM-NEXT: store float 3.000000e+00, float* [[P]], align 4 ; IS__CGSCC_NPM-NEXT: store float 3.000000e+00, float* [[P]], align 4
; IS__CGSCC_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__CGSCC_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 4617315517961601024) ; IS__CGSCC_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB1:@.*]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024)
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%N.addr = alloca i32, align 4 %N.addr = alloca i32, align 4
%p = alloca float, align 4 %p = alloca float, align 4
store i32 %N, i32* %N.addr, align 4 store i32 %N, i32* %N.addr, align 4
store float 3.000000e+00, float* %p, align 4 store float 3.000000e+00, float* %p, align 4
store i32 7, i32* %N.addr, align 4 store i32 7, i32* %N.addr, align 4
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; NOT_TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP]], 2 ; NOT_TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP]], 2
; NOT_TUNIT_NPM-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] ; NOT_TUNIT_NPM-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
; NOT_TUNIT_NPM: omp.precond.then: ; NOT_TUNIT_NPM: omp.precond.then:
; NOT_TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
; NOT_TUNIT_NPM-NEXT: store i32 [[SUB3]], i32* [[DOTOMP_UB]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 [[SUB3]], i32* [[DOTOMP_UB]], align 4
; NOT_TUNIT_NPM-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
; NOT_TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
; NOT_TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; NOT_TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; NOT_TUNIT_NPM-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB0:@.*]], i32 [[TMP5]], i32 34, i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 1, i32 1) ; NOT_TUNIT_NPM-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB0:@.*]], i32 [[TMP5]], i32 noundef 34, i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
; NOT_TUNIT_NPM-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 ; NOT_TUNIT_NPM-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
; NOT_TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], [[SUB3]] ; NOT_TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], [[SUB3]]
; NOT_TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; NOT_TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; NOT_TUNIT_NPM: cond.true: ; NOT_TUNIT_NPM: cond.true:
; NOT_TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; NOT_TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; NOT_TUNIT_NPM: cond.false: ; NOT_TUNIT_NPM: cond.false:
; NOT_TUNIT_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 ; NOT_TUNIT_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
; NOT_TUNIT_NPM-NEXT: br label [[COND_END]] ; NOT_TUNIT_NPM-NEXT: br label [[COND_END]]
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; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP]], 2 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP]], 2
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
; IS__TUNIT_NPM: omp.precond.then: ; IS__TUNIT_NPM: omp.precond.then:
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
; IS__TUNIT_NPM-NEXT: store i32 [[SUB3]], i32* [[DOTOMP_UB]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[SUB3]], i32* [[DOTOMP_UB]], align 4
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; IS__TUNIT_NPM-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB0:@.*]], i32 [[TMP5]], i32 34, i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 1, i32 1) ; IS__TUNIT_NPM-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) [[GLOB0:@.*]], i32 [[TMP5]], i32 noundef 34, i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], i32* noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], [[SUB3]] ; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], [[SUB3]]
; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__TUNIT_NPM: cond.true: ; IS__TUNIT_NPM: cond.true:
; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_NPM: cond.false: ; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
; IS__TUNIT_NPM-NEXT: br label [[COND_END]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
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llvm/test/Transforms/Attributor/IPConstantProp/return-argument.ll

Show First 20 Lines • Show All 47 Lines • ▼ Show 20 LinesF: ; preds = %0
ret i32* %V ret i32* %V
} }
;; This function returns its first argument as a part of a multiple return ;; This function returns its first argument as a part of a multiple return
;; value ;; value
define internal { i32, i32 } @foo(i32 %A, i32 %B) { define internal { i32, i32 } @foo(i32 %A, i32 %B) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]])
; IS__TUNIT____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0 ; IS__TUNIT____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0
; IS__TUNIT____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1 ; IS__TUNIT____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1
; IS__TUNIT____-NEXT: ret { i32, i32 } [[Z]] ; IS__TUNIT____-NEXT: ret { i32, i32 } [[Z]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]])
; IS__CGSCC____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]] ; IS__CGSCC____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0 ; IS__CGSCC____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0
; IS__CGSCC____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1 ; IS__CGSCC____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1
; IS__CGSCC____-NEXT: ret { i32, i32 } [[Z]] ; IS__CGSCC____-NEXT: ret { i32, i32 } [[Z]]
; ;
%X = add i32 %A, %B %X = add i32 %A, %B
%Y = insertvalue { i32, i32 } undef, i32 %A, 0 %Y = insertvalue { i32, i32 } undef, i32 %A, 0
%Z = insertvalue { i32, i32 } %Y, i32 %X, 1 %Z = insertvalue { i32, i32 } %Y, i32 %X, 1
ret { i32, i32 } %Z ret { i32, i32 } %Z
} }
define void @caller(i1 %C) personality i32 (...)* @__gxx_personality_v0 { define void @caller(i1 %C) personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) [[ATTR2:#.*]] personality i32 (...)* @__gxx_personality_v0 ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) [[ATTR2:#.*]] personality i32 (...)* @__gxx_personality_v0
; IS__TUNIT____-NEXT: [[Q:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[Q:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]]) ; IS__TUNIT____-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]])
; IS__TUNIT____-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 1, i32 2) ; IS__TUNIT____-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2)
; IS__TUNIT____-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0 ; IS__TUNIT____-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0
; IS__TUNIT____-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 3, i32 4) ; IS__TUNIT____-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4)
; IS__TUNIT____-NEXT: br label [[OK:%.*]] ; IS__TUNIT____-NEXT: br label [[OK:%.*]]
; IS__TUNIT____: OK: ; IS__TUNIT____: OK:
; IS__TUNIT____-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0 ; IS__TUNIT____-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0
; IS__TUNIT____-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]] ; IS__TUNIT____-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]]
; IS__TUNIT____-NEXT: store i32 [[Z]], i32* [[W]], align 4 ; IS__TUNIT____-NEXT: store i32 [[Z]], i32* [[W]], align 4
; IS__TUNIT____-NEXT: br label [[RET:%.*]] ; IS__TUNIT____-NEXT: br label [[RET:%.*]]
; IS__TUNIT____: LPAD: ; IS__TUNIT____: LPAD:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: RET: ; IS__TUNIT____: RET:
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) [[ATTR1:#.*]] personality i32 (...)* @__gxx_personality_v0 ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) [[ATTR1:#.*]] personality i32 (...)* @__gxx_personality_v0
; IS__CGSCC____-NEXT: [[Q:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[Q:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) [[Q]]) ; IS__CGSCC____-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) [[Q]])
; IS__CGSCC____-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 1, i32 2) ; IS__CGSCC____-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2)
; IS__CGSCC____-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0 ; IS__CGSCC____-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0
; IS__CGSCC____-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 3, i32 4) ; IS__CGSCC____-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4)
; IS__CGSCC____-NEXT: br label [[OK:%.*]] ; IS__CGSCC____-NEXT: br label [[OK:%.*]]
; IS__CGSCC____: OK: ; IS__CGSCC____: OK:
; IS__CGSCC____-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0 ; IS__CGSCC____-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0
; IS__CGSCC____-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]] ; IS__CGSCC____-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]]
; IS__CGSCC____-NEXT: store i32 [[Z]], i32* [[W]], align 4 ; IS__CGSCC____-NEXT: store i32 [[Z]], i32* [[W]], align 4
; IS__CGSCC____-NEXT: br label [[RET:%.*]] ; IS__CGSCC____-NEXT: br label [[RET:%.*]]
; IS__CGSCC____: LPAD: ; IS__CGSCC____: LPAD:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
Show All 30 Lines

llvm/test/Transforms/Attributor/callbacks.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; IS__CGSCC_OPM-SAME: (i32* align 256 [[A:%.*]]) ; IS__CGSCC_OPM-SAME: (i32* align 256 [[A:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t0_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t0_caller
; IS__CGSCC_NPM-SAME: (i32* align 256 [[A:%.*]]) ; IS__CGSCC_NPM-SAME: (i32* align 256 [[A:%.*]])
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* align 256 [[A]], i64 noundef 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%b = alloca i32, align 32 %b = alloca i32, align 32
%c = alloca i32*, align 64 %c = alloca i32*, align 64
%ptr = alloca i32, align 128 %ptr = alloca i32, align 128
%0 = bitcast i32* %b to i8* %0 = bitcast i32* %b to i8*
store i32 42, i32* %b, align 4 store i32 42, i32* %b, align 4
store i32* %b, i32** %c, align 8 store i32* %b, i32** %c, align 8
call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* null, i32* %ptr, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* %a, i64 99, i32** %c) call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t0_callback_broker(i32* null, i32* %ptr, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32**)* @t0_callback_callee to void (i32*, i32*, ...)*), i32* %a, i64 99, i32** %c)
ret void ret void
} }
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t0_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t0_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee ; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee
; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; NOT_TUNIT_NPM-NEXT: entry: ; NOT_TUNIT_NPM-NEXT: entry:
; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; NOT_TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]]) ; NOT_TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]])
; NOT_TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_NPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t0_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS__TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 99, i32* [[TMP0]]) ; IS__TUNIT_NPM-NEXT: tail call void @t0_check(i32* align 256 [[A]], i64 noundef 99, i32* [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
entry: entry:
%ptr_val = load i32, i32* %ptr, align 8 %ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null store i32 %ptr_val, i32* %is_not_null
%0 = load i32*, i32** %c, align 8 %0 = load i32*, i32** %c, align 8
tail call void @t0_check(i32* %a, i64 %b, i32* %0) tail call void @t0_check(i32* %a, i64 %b, i32* %0)
ret void ret void
Show All 37 Lines
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t1_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t1_caller
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%b = alloca i32, align 32 %b = alloca i32, align 32
%c = alloca i32*, align 64 %c = alloca i32*, align 64
%ptr = alloca i32, align 128 %ptr = alloca i32, align 128
%0 = bitcast i32* %b to i8* %0 = bitcast i32* %b to i8*
store i32 42, i32* %b, align 4 store i32 42, i32* %b, align 4
store i32* %b, i32** %c, align 8 store i32* %b, i32** %c, align 8
call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* null, i32* %ptr, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* %a, i64 99, i32** %c) call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t1_callback_broker(i32* null, i32* %ptr, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32**)* @t1_callback_callee to void (i32*, i32*, ...)*), i32* %a, i64 99, i32** %c)
ret void ret void
} }
; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below! ; Note that the first two arguments are provided by the callback_broker according to the callback in !1 below!
; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call. ; The others are annotated with alignment information, amongst others, or even replaced by the constants passed to the call.
define internal void @t1_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t1_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; NOT_TUNIT_NPM: Function Attrs: nosync ; NOT_TUNIT_NPM: Function Attrs: nosync
; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee ; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee
; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; NOT_TUNIT_NPM-NEXT: entry: ; NOT_TUNIT_NPM-NEXT: entry:
; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; NOT_TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; NOT_TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; NOT_TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_NPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nosync ; IS__TUNIT_NPM: Function Attrs: nosync
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t1_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* noalias nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* noalias nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS__TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; IS__TUNIT_NPM-NEXT: tail call void @t1_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
entry: entry:
%ptr_val = load i32, i32* %ptr, align 8 %ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null store i32 %ptr_val, i32* %is_not_null
%0 = load i32*, i32** %c, align 8 %0 = load i32*, i32** %c, align 8
tail call void @t1_check(i32* %a, i64 %b, i32* %0) tail call void @t1_check(i32* %a, i64 %b, i32* %0)
ret void ret void
Show All 36 Lines
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t2_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t2_caller
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t2_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t2_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%b = alloca i32, align 32 %b = alloca i32, align 32
%c = alloca i32*, align 64 %c = alloca i32*, align 64
%ptr = alloca i32, align 128 %ptr = alloca i32, align 128
%0 = bitcast i32* %b to i8* %0 = bitcast i32* %b to i8*
store i32 42, i32* %b, align 4 store i32 42, i32* %b, align 4
Show All 9 Lines
define internal void @t2_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t2_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee ; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee
; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; NOT_TUNIT_NPM-NEXT: entry: ; NOT_TUNIT_NPM-NEXT: entry:
; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; NOT_TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; NOT_TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; NOT_TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_NPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t2_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS__TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; IS__TUNIT_NPM-NEXT: tail call void @t2_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
entry: entry:
%ptr_val = load i32, i32* %ptr, align 8 %ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null store i32 %ptr_val, i32* %is_not_null
%0 = load i32*, i32** %c, align 8 %0 = load i32*, i32** %c, align 8
tail call void @t2_check(i32* %a, i64 %b, i32* %0) tail call void @t2_check(i32* %a, i64 %b, i32* %0)
ret void ret void
Show All 38 Lines
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_OPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_OPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_OPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* nocapture align 256 [[A]], i64 noundef 99, i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t3_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@t3_caller
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]]) ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture align 256 [[A:%.*]])
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32 ; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64 ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = alloca i32*, align 64
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128 ; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = alloca i32, align 128
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32 ; IS__CGSCC_NPM-NEXT: store i32 42, i32* [[B]], align 32
; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64 ; IS__CGSCC_NPM-NEXT: store i32* [[B]], i32** [[C]], align 64
; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]]) ; IS__CGSCC_NPM-NEXT: call void (i32*, i32*, void (i32*, i32*, ...)*, ...) @t3_callback_broker(i32* noalias nocapture noundef align 536870912 null, i32* noalias nocapture noundef nonnull align 128 dereferenceable(4) [[PTR]], void (i32*, i32*, ...)* nocapture noundef bitcast (void (i32*, i32*, i32*, i64, i32**)* @t3_callback_callee to void (i32*, i32*, ...)*), i32* noalias nocapture align 256 [[A]], i64 noundef 99, i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C]])
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%b = alloca i32, align 32 %b = alloca i32, align 32
%c = alloca i32*, align 64 %c = alloca i32*, align 64
%ptr = alloca i32, align 128 %ptr = alloca i32, align 128
%0 = bitcast i32* %b to i8* %0 = bitcast i32* %b to i8*
store i32 42, i32* %b, align 4 store i32 42, i32* %b, align 4
Show All 10 Lines
define internal void @t3_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) { define internal void @t3_callback_callee(i32* %is_not_null, i32* %ptr, i32* %a, i64 %b, i32** %c) {
; ;
; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee ; NOT_TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee
; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; NOT_TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; NOT_TUNIT_NPM-NEXT: entry: ; NOT_TUNIT_NPM-NEXT: entry:
; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; NOT_TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; NOT_TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; NOT_TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; NOT_TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; NOT_TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; NOT_TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_NPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@t3_callback_callee
; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[IS_NOT_NULL:%.*]], i32* nocapture nonnull readonly align 8 dereferenceable(4) [[PTR:%.*]], i32* nocapture align 256 [[A:%.*]], i64 [[B:%.*]], i32** noalias nocapture noundef nonnull readonly align 64 dereferenceable(8) [[C:%.*]])
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8 ; IS__TUNIT_NPM-NEXT: [[PTR_VAL:%.*]] = load i32, i32* [[PTR]], align 8
; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[PTR_VAL]], i32* [[IS_NOT_NULL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32*, i32** [[C]], align 64
; IS__TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 99, i32* nocapture [[TMP0]]) ; IS__TUNIT_NPM-NEXT: tail call void @t3_check(i32* nocapture align 256 [[A]], i64 noundef 99, i32* nocapture [[TMP0]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
entry: entry:
%ptr_val = load i32, i32* %ptr, align 8 %ptr_val = load i32, i32* %ptr, align 8
store i32 %ptr_val, i32* %is_not_null store i32 %ptr_val, i32* %is_not_null
%0 = load i32*, i32** %c, align 8 %0 = load i32*, i32** %c, align 8
tail call void @t3_check(i32* %a, i64 %b, i32* %0) tail call void @t3_check(i32* %a, i64 %b, i32* %0)
ret void ret void
} }
declare void @t3_check(i32* nocapture align 256, i64, i32* nocapture) declare void @t3_check(i32* nocapture align 256, i64, i32* nocapture)
declare !callback !0 void @t3_callback_broker(i32* nocapture , i32* nocapture , void (i32*, i32*, ...)* nocapture, ...) declare !callback !0 void @t3_callback_broker(i32* nocapture , i32* nocapture , void (i32*, i32*, ...)* nocapture, ...)
!0 = !{!1} !0 = !{!1}
!1 = !{i64 2, i64 -1, i64 -1, i1 true} !1 = !{i64 2, i64 -1, i64 -1, i1 true}

llvm/test/Transforms/Attributor/dereferenceable-1.ll

Show First 20 Lines • Show All 908 Lines • ▼ Show 20 Lines
; CHECK-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; CHECK: if.else3: ; CHECK: if.else3:
; CHECK-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0 ; CHECK-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0
; CHECK-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]]
; CHECK: if.then5: ; CHECK: if.then5:
; CHECK-NEXT: store i32 3, i32* [[PTR]], align 4 ; CHECK-NEXT: store i32 3, i32* [[PTR]], align 4
; CHECK-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; CHECK: if.else6: ; CHECK: if.else6:
; CHECK-NEXT: tail call void @rec-branch-2(i32 1, i32 1, i32 1, i32* nocapture nofree writeonly [[PTR]]) ; CHECK-NEXT: tail call void @rec-branch-2(i32 noundef 1, i32 noundef 1, i32 noundef 1, i32* nocapture nofree writeonly [[PTR]])
; CHECK-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; CHECK: if.end8: ; CHECK: if.end8:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%tobool = icmp eq i32 %a, 0 %tobool = icmp eq i32 %a, 0
br i1 %tobool, label %if.else3, label %if.then br i1 %tobool, label %if.else3, label %if.then
Show All 30 Lines
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #6 [ "nonnull"(i8* undef), "dereferenceable"(i8* undef, i64 1), "dereferenceable"(i8* undef, i64 2), "dereferenceable"(i8* undef, i64 101), "dereferenceable_or_null"(i8* undef, i64 31), "dereferenceable_or_null"(i8* undef, i64 42) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #6 [ "nonnull"(i8* undef), "dereferenceable"(i8* undef, i64 1), "dereferenceable"(i8* undef, i64 2), "dereferenceable"(i8* undef, i64 101), "dereferenceable_or_null"(i8* undef, i64 31), "dereferenceable_or_null"(i8* undef, i64 42) ]
; ATTRIBUTOR-NEXT: call void @unknown() ; ATTRIBUTOR-NEXT: call void @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) ; IS__TUNIT_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]])
; IS__TUNIT_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR6:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; IS__TUNIT_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR6:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS__TUNIT_OPM-NEXT: call void @unknown() ; IS__TUNIT_OPM-NEXT: call void @unknown()
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS________NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS________NPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) ; IS________NPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]])
; IS________NPM-NEXT: call void @llvm.assume(i1 true) [[ATTR7:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; IS________NPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR7:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS________NPM-NEXT: call void @unknown() ; IS________NPM-NEXT: call void @unknown()
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]])
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR8:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR8:#.*]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS__CGSCC_OPM-NEXT: call void @unknown() ; IS__CGSCC_OPM-NEXT: call void @unknown()
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @llvm.assume(i1 true) [ "nonnull"(i8* %arg3), "dereferenceable"(i8* %arg1, i64 1), "dereferenceable"(i8* %arg1, i64 2), "dereferenceable"(i8* %arg1, i64 101), "dereferenceable_or_null"(i8* %arg2, i64 31), "dereferenceable_or_null"(i8* %arg4, i64 42)] call void @llvm.assume(i1 true) [ "nonnull"(i8* %arg3), "dereferenceable"(i8* %arg1, i64 1), "dereferenceable"(i8* %arg1, i64 2), "dereferenceable"(i8* %arg1, i64 101), "dereferenceable_or_null"(i8* %arg2, i64 31), "dereferenceable_or_null"(i8* %arg4, i64 42)]
call void @unknown() call void @unknown()
ret void ret void
} }
define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3) { define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg
; ATTRIBUTOR-SAME: (i8* nocapture nofree readnone [[ARG1:%.*]], i8* nocapture nofree readnone [[ARG2:%.*]], i8* nocapture nofree readnone [[ARG3:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree readnone [[ARG1:%.*]], i8* nocapture nofree readnone [[ARG2:%.*]], i8* nocapture nofree readnone [[ARG3:%.*]])
; ATTRIBUTOR-NEXT: call void @unknown() ; ATTRIBUTOR-NEXT: call void @unknown()
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "dereferenceable"(i8* undef, i64 101), "dereferenceable"(i8* undef, i64 -2), "dereferenceable_or_null"(i8* undef, i64 31) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "dereferenceable"(i8* undef, i64 101), "dereferenceable"(i8* undef, i64 -2), "dereferenceable_or_null"(i8* undef, i64 31) ]
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg
; CHECK-SAME: (i8* nocapture nofree readnone [[ARG1:%.*]], i8* nocapture nofree readnone [[ARG2:%.*]], i8* nocapture nofree readnone [[ARG3:%.*]]) ; CHECK-SAME: (i8* nocapture nofree readnone [[ARG1:%.*]], i8* nocapture nofree readnone [[ARG2:%.*]], i8* nocapture nofree readnone [[ARG3:%.*]])
; CHECK-NEXT: call void @unknown() ; CHECK-NEXT: call void @unknown()
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable"(i8* [[ARG2]], i64 -2), "dereferenceable_or_null"(i8* [[ARG3]], i64 31) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable"(i8* [[ARG2]], i64 -2), "dereferenceable_or_null"(i8* [[ARG3]], i64 31) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @unknown() call void @unknown()
call void @llvm.assume(i1 true) ["dereferenceable"(i8* %arg1, i64 101), "dereferenceable"(i8* %arg2, i64 -2), "dereferenceable_or_null"(i8* %arg3, i64 31)] call void @llvm.assume(i1 true) ["dereferenceable"(i8* %arg1, i64 101), "dereferenceable"(i8* %arg2, i64 -2), "dereferenceable_or_null"(i8* %arg3, i64 31)]
ret void ret void
} }
define void @nonnull_assume_call(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_call(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_call ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_call
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; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]])
; CHECK-NEXT: call void @unknown() ; CHECK-NEXT: call void @unknown()
; CHECK-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() ; CHECK-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr()
; CHECK-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) ; CHECK-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]])
; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) ; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]])
; CHECK-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) ; CHECK-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]])
; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) ; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]])
; CHECK-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) ; CHECK-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i32* [[P]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i32* [[P]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; CHECK-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) ; CHECK-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]])
; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) ; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]])
; CHECK-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) ; CHECK-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]])
; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) ; CHECK-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]])
; CHECK-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) ; CHECK-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]])
; CHECK-NEXT: call void @unknown() ; CHECK-NEXT: call void @unknown()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
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llvm/test/Transforms/Attributor/heap_to_stack.ll

Show All 38 Lines;
tail call void @nofree_func(i8* %p1) tail call void @nofree_func(i8* %p1)
ret void ret void
} }
; TEST 1 - negative, pointer freed in another function. ; TEST 1 - negative, pointer freed in another function.
define void @test1() { define void @test1() {
; CHECK-LABEL: define {{[^@]+}}@test1() ; CHECK-LABEL: define {{[^@]+}}@test1()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @nocapture_func_frees_pointer(i8* noalias nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @nocapture_func_frees_pointer(i8* noalias nocapture [[TMP1]])
; CHECK-NEXT: tail call void (...) @func_throws() ; CHECK-NEXT: tail call void (...) @func_throws()
; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @nocapture_func_frees_pointer(i8* %1) tail call void @nocapture_func_frees_pointer(i8* %1)
tail call void (...) @func_throws() tail call void (...) @func_throws()
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 2 - negative, call to a sync function. ; TEST 2 - negative, call to a sync function.
define void @test2() { define void @test2() {
; CHECK-LABEL: define {{[^@]+}}@test2() ; CHECK-LABEL: define {{[^@]+}}@test2()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @sync_func(i8* [[TMP1]]) ; CHECK-NEXT: tail call void @sync_func(i8* [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @sync_func(i8* %1) tail call void @sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 3 - 1 malloc, 1 free ; TEST 3 - 1 malloc, 1 free
define void @test3() { define void @test3() {
; IS________OPM-LABEL: define {{[^@]+}}@test3() ; IS________OPM-LABEL: define {{[^@]+}}@test3()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test3() ; IS________NPM-LABEL: define {{[^@]+}}@test3()
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
define void @test3a(i8* %p) { define void @test3a(i8* %p) {
; IS________OPM-LABEL: define {{[^@]+}}@test3a ; IS________OPM-LABEL: define {{[^@]+}}@test3a
; IS________OPM-SAME: (i8* nocapture [[P:%.*]]) ; IS________OPM-SAME: (i8* nocapture [[P:%.*]])
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP1]], i8* nocapture [[P]]) ; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP1]], i8* nocapture [[P]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test3a ; IS________NPM-LABEL: define {{[^@]+}}@test3a
; IS________NPM-SAME: (i8* nocapture [[P:%.*]]) ; IS________NPM-SAME: (i8* nocapture [[P:%.*]])
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @nofree_arg_only(i8* noalias nocapture nofree [[TMP1]], i8* nocapture [[P]]) ; IS________NPM-NEXT: tail call void @nofree_arg_only(i8* noalias nocapture nofree [[TMP1]], i8* nocapture [[P]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @nofree_arg_only(i8* %1, i8* %p) tail call void @nofree_arg_only(i8* %1, i8* %p)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
declare noalias i8* @aligned_alloc(i64, i64) declare noalias i8* @aligned_alloc(i64, i64)
define void @test3b(i8* %p) { define void @test3b(i8* %p) {
; IS________OPM-LABEL: define {{[^@]+}}@test3b ; IS________OPM-LABEL: define {{[^@]+}}@test3b
; IS________OPM-SAME: (i8* nocapture [[P:%.*]]) ; IS________OPM-SAME: (i8* nocapture [[P:%.*]])
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @aligned_alloc(i64 32, i64 128) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @aligned_alloc(i64 noundef 32, i64 noundef 128)
; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP1]], i8* nocapture [[P]]) ; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP1]], i8* nocapture [[P]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test3b ; IS________NPM-LABEL: define {{[^@]+}}@test3b
; IS________NPM-SAME: (i8* nocapture [[P:%.*]]) ; IS________NPM-SAME: (i8* nocapture [[P:%.*]])
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 128, align 32 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 128, align 32
; IS________NPM-NEXT: tail call void @nofree_arg_only(i8* noalias nocapture nofree [[TMP1]], i8* nocapture [[P]]) ; IS________NPM-NEXT: tail call void @nofree_arg_only(i8* noalias nocapture nofree [[TMP1]], i8* nocapture [[P]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @aligned_alloc(i64 32, i64 128) %1 = tail call noalias i8* @aligned_alloc(i64 32, i64 128)
tail call void @nofree_arg_only(i8* %1, i8* %p) tail call void @nofree_arg_only(i8* %1, i8* %p)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; leave alone non-constant alignments. ; leave alone non-constant alignments.
define void @test3c(i64 %alignment) { define void @test3c(i64 %alignment) {
; CHECK-LABEL: define {{[^@]+}}@test3c ; CHECK-LABEL: define {{[^@]+}}@test3c
; CHECK-SAME: (i64 [[ALIGNMENT:%.*]]) ; CHECK-SAME: (i64 [[ALIGNMENT:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @aligned_alloc(i64 [[ALIGNMENT]], i64 128) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @aligned_alloc(i64 [[ALIGNMENT]], i64 noundef 128)
; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @aligned_alloc(i64 %alignment, i64 128) %1 = tail call noalias i8* @aligned_alloc(i64 %alignment, i64 128)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
declare noalias i8* @calloc(i64, i64) declare noalias i8* @calloc(i64, i64)
define void @test0() { define void @test0() {
; IS________OPM-LABEL: define {{[^@]+}}@test0() ; IS________OPM-LABEL: define {{[^@]+}}@test0()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 2, i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 noundef 2, i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test0() ; IS________NPM-LABEL: define {{[^@]+}}@test0()
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 8, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 8, align 1
; IS________NPM-NEXT: [[CALLOC_BC:%.*]] = bitcast i8* [[TMP1]] to i8* ; IS________NPM-NEXT: [[CALLOC_BC:%.*]] = bitcast i8* [[TMP1]] to i8*
; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALLOC_BC]], i8 0, i64 8, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[CALLOC_BC]], i8 0, i64 8, i1 false)
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @calloc(i64 2, i64 4) %1 = tail call noalias i8* @calloc(i64 2, i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 4 ; TEST 4
define void @test4() { define void @test4() {
; IS________OPM-LABEL: define {{[^@]+}}@test4() ; IS________OPM-LABEL: define {{[^@]+}}@test4()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test4() ; IS________NPM-LABEL: define {{[^@]+}}@test4()
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @nofree_func(i8* %1) tail call void @nofree_func(i8* %1)
ret void ret void
} }
; TEST 5 - not all exit paths have a call to free, but all uses of malloc ; TEST 5 - not all exit paths have a call to free, but all uses of malloc
; are in nofree functions and are not captured ; are in nofree functions and are not captured
define void @test5(i32, i8* %p) { define void @test5(i32, i8* %p) {
; IS________OPM-LABEL: define {{[^@]+}}@test5 ; IS________OPM-LABEL: define {{[^@]+}}@test5
; IS________OPM-SAME: (i32 [[TMP0:%.*]], i8* nocapture [[P:%.*]]) ; IS________OPM-SAME: (i32 [[TMP0:%.*]], i8* nocapture [[P:%.*]])
; IS________OPM-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0
; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]]
; IS________OPM: 4: ; IS________OPM: 4:
; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP2]]) ; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP2]])
; IS________OPM-NEXT: br label [[TMP6:%.*]] ; IS________OPM-NEXT: br label [[TMP6:%.*]]
; IS________OPM: 5: ; IS________OPM: 5:
; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP2]], i8* nocapture [[P]]) ; IS________OPM-NEXT: tail call void @nofree_arg_only(i8* nocapture nofree [[TMP2]], i8* nocapture [[P]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]])
Show All 32 Lines6: ; preds = %5, %4
ret void ret void
} }
; TEST 6 - all exit paths have a call to free ; TEST 6 - all exit paths have a call to free
define void @test6(i32) { define void @test6(i32) {
; IS________OPM-LABEL: define {{[^@]+}}@test6 ; IS________OPM-LABEL: define {{[^@]+}}@test6
; IS________OPM-SAME: (i32 [[TMP0:%.*]]) ; IS________OPM-SAME: (i32 [[TMP0:%.*]])
; IS________OPM-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0
; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]]
; IS________OPM: 4: ; IS________OPM: 4:
; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP2]]) ; IS________OPM-NEXT: tail call void @nofree_func(i8* noalias nocapture nofree [[TMP2]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]])
; IS________OPM-NEXT: br label [[TMP6:%.*]] ; IS________OPM-NEXT: br label [[TMP6:%.*]]
; IS________OPM: 5: ; IS________OPM: 5:
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture [[TMP2]])
Show All 31 Lines6: ; preds = %5, %4
ret void ret void
} }
; TEST 7 - free is dead. ; TEST 7 - free is dead.
define void @test7() { define void @test7() {
; IS________OPM: Function Attrs: noreturn ; IS________OPM: Function Attrs: noreturn
; IS________OPM-LABEL: define {{[^@]+}}@test7() ; IS________OPM-LABEL: define {{[^@]+}}@test7()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[TMP2:%.*]] = tail call i32 @no_return_call() ; IS________OPM-NEXT: [[TMP2:%.*]] = tail call i32 @no_return_call()
; IS________OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS________NPM: Function Attrs: noreturn ; IS________NPM: Function Attrs: noreturn
; IS________NPM-LABEL: define {{[^@]+}}@test7() ; IS________NPM-LABEL: define {{[^@]+}}@test7()
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: [[TMP2:%.*]] = tail call i32 @no_return_call() ; IS________NPM-NEXT: [[TMP2:%.*]] = tail call i32 @no_return_call()
; IS________NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call i32 @no_return_call() tail call i32 @no_return_call()
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 8 - Negative: bitcast pointer used in capture function ; TEST 8 - Negative: bitcast pointer used in capture function
define void @test8() { define void @test8() {
; CHECK-LABEL: define {{[^@]+}}@test8() ; CHECK-LABEL: define {{[^@]+}}@test8()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @foo(i32* align 4 [[TMP2]]) ; CHECK-NEXT: tail call void @foo(i32* align 4 [[TMP2]])
; CHECK-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @foo(i32* %2) tail call void @foo(i32* %2)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 9 - FIXME: malloc should be converted. ; TEST 9 - FIXME: malloc should be converted.
define void @test9() { define void @test9() {
; CHECK-LABEL: define {{[^@]+}}@test9() ; CHECK-LABEL: define {{[^@]+}}@test9()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @foo_nounw(i32* nofree align 4 [[TMP2]]) ; CHECK-NEXT: tail call void @foo_nounw(i32* nofree align 4 [[TMP2]])
; CHECK-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @foo_nounw(i32* %2) tail call void @foo_nounw(i32* %2)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 10 - 1 malloc, 1 free ; TEST 10 - 1 malloc, 1 free
define i32 @test10() { define i32 @test10() {
; IS________OPM-LABEL: define {{[^@]+}}@test10() ; IS________OPM-LABEL: define {{[^@]+}}@test10()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: ret i32 [[TMP3]] ; IS________OPM-NEXT: ret i32 [[TMP3]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test10() ; IS________NPM-LABEL: define {{[^@]+}}@test10()
Show All 10 Lines;
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_lifetime() { define i32 @test_lifetime() {
; IS________OPM-LABEL: define {{[^@]+}}@test_lifetime() ; IS________OPM-LABEL: define {{[^@]+}}@test_lifetime()
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________OPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________OPM-NEXT: ret i32 [[TMP3]] ; IS________OPM-NEXT: ret i32 [[TMP3]]
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test_lifetime() ; IS________NPM-LABEL: define {{[^@]+}}@test_lifetime()
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; IS________NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; IS________NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: store i32 10, i32* [[TMP2]], align 4
; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________NPM-NEXT: ret i32 [[TMP3]] ; IS________NPM-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
call void @llvm.lifetime.start.p0i8(i64 4, i8* %1) call void @llvm.lifetime.start.p0i8(i64 4, i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
; TEST 11 ; TEST 11
define void @test11() { define void @test11() {
; CHECK-LABEL: define {{[^@]+}}@test11() ; CHECK-LABEL: define {{[^@]+}}@test11()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @sync_will_return(i8* [[TMP1]]) ; CHECK-NEXT: tail call void @sync_will_return(i8* [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
tail call void @sync_will_return(i8* %1) tail call void @sync_will_return(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
; TEST 12 ; TEST 12
define i32 @irreducible_cfg(i32 %0) { define i32 @irreducible_cfg(i32 %0) {
; IS________OPM-LABEL: define {{[^@]+}}@irreducible_cfg ; IS________OPM-LABEL: define {{[^@]+}}@irreducible_cfg
; IS________OPM-SAME: (i32 [[TMP0:%.*]]) ; IS________OPM-SAME: (i32 [[TMP0:%.*]])
; IS________OPM-NEXT: [[TMP2:%.*]] = call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP2:%.*]] = call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32* ; IS________OPM-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to i32*
; IS________OPM-NEXT: store i32 10, i32* [[TMP3]], align 4 ; IS________OPM-NEXT: store i32 10, i32* [[TMP3]], align 4
; IS________OPM-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP0]], 1 ; IS________OPM-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP0]], 1
; IS________OPM-NEXT: br i1 [[TMP4]], label [[TMP5:%.*]], label [[TMP7:%.*]] ; IS________OPM-NEXT: br i1 [[TMP4]], label [[TMP5:%.*]], label [[TMP7:%.*]]
; IS________OPM: 5: ; IS________OPM: 5:
; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], 5 ; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], 5
; IS________OPM-NEXT: br label [[TMP13:%.*]] ; IS________OPM-NEXT: br label [[TMP13:%.*]]
; IS________OPM: 7: ; IS________OPM: 7:
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 Lines
; IS________OPM-NEXT: br label [[TMP4:%.*]] ; IS________OPM-NEXT: br label [[TMP4:%.*]]
; IS________OPM: 4: ; IS________OPM: 4:
; IS________OPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS________OPM-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP5]], -1 ; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP5]], -1
; IS________OPM-NEXT: store i32 [[TMP6]], i32* [[TMP2]], align 4 ; IS________OPM-NEXT: store i32 [[TMP6]], i32* [[TMP2]], align 4
; IS________OPM-NEXT: [[TMP7:%.*]] = icmp sgt i32 [[TMP6]], 0 ; IS________OPM-NEXT: [[TMP7:%.*]] = icmp sgt i32 [[TMP6]], 0
; IS________OPM-NEXT: br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP11:%.*]] ; IS________OPM-NEXT: br i1 [[TMP7]], label [[TMP8:%.*]], label [[TMP11:%.*]]
; IS________OPM: 8: ; IS________OPM: 8:
; IS________OPM-NEXT: [[TMP9:%.*]] = call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP9:%.*]] = call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32* ; IS________OPM-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
; IS________OPM-NEXT: store i32 1, i32* [[TMP10]], align 8 ; IS________OPM-NEXT: store i32 1, i32* [[TMP10]], align 8
; IS________OPM-NEXT: br label [[TMP4]] ; IS________OPM-NEXT: br label [[TMP4]]
; IS________OPM: 11: ; IS________OPM: 11:
; IS________OPM-NEXT: ret i32 5 ; IS________OPM-NEXT: ret i32 5
; ;
; IS________NPM-LABEL: define {{[^@]+}}@malloc_in_loop ; IS________NPM-LABEL: define {{[^@]+}}@malloc_in_loop
; IS________NPM-SAME: (i32 [[TMP0:%.*]]) ; IS________NPM-SAME: (i32 [[TMP0:%.*]])
Show All 35 Lines
11: ; preds = %4 11: ; preds = %4
ret i32 5 ret i32 5
} }
; Malloc/Calloc too large ; Malloc/Calloc too large
define i32 @test13() { define i32 @test13() {
; CHECK-LABEL: define {{[^@]+}}@test13() ; CHECK-LABEL: define {{[^@]+}}@test13()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 256) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 256)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 256) %1 = tail call noalias i8* @malloc(i64 256)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_sle() { define i32 @test_sle() {
; CHECK-LABEL: define {{[^@]+}}@test_sle() ; CHECK-LABEL: define {{[^@]+}}@test_sle()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 -1) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef -1)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @malloc(i64 -1) %1 = tail call noalias i8* @malloc(i64 -1)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define i32 @test_overflow() { define i32 @test_overflow() {
; CHECK-LABEL: define {{[^@]+}}@test_overflow() ; CHECK-LABEL: define {{[^@]+}}@test_overflow()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 65537, i64 65537) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 noundef 65537, i64 noundef 65537)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i32*
; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4 ; CHECK-NEXT: store i32 10, i32* [[TMP2]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture nonnull align 4 dereferenceable(4) [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = tail call noalias i8* @calloc(i64 65537, i64 65537) %1 = tail call noalias i8* @calloc(i64 65537, i64 65537)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
%2 = bitcast i8* %1 to i32* %2 = bitcast i8* %1 to i32*
store i32 10, i32* %2 store i32 10, i32* %2
%3 = load i32, i32* %2 %3 = load i32, i32* %2
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret i32 %3 ret i32 %3
} }
define void @test14() { define void @test14() {
; CHECK-LABEL: define {{[^@]+}}@test14() ; CHECK-LABEL: define {{[^@]+}}@test14()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 64, i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @calloc(i64 noundef 64, i64 noundef 4)
; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* noalias nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @calloc(i64 64, i64 4) %1 = tail call noalias i8* @calloc(i64 64, i64 4)
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
Show All 11 Lines;
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
define void @test16a(i8 %v, i8** %P) { define void @test16a(i8 %v, i8** %P) {
; IS________OPM-LABEL: define {{[^@]+}}@test16a ; IS________OPM-LABEL: define {{[^@]+}}@test16a
; IS________OPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) ; IS________OPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]])
; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1 ; IS________OPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]]) ; IS________OPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull dereferenceable(1) [[TMP1]]) ; IS________OPM-NEXT: tail call void @free(i8* noalias nocapture nonnull dereferenceable(1) [[TMP1]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS________NPM-LABEL: define {{[^@]+}}@test16a ; IS________NPM-LABEL: define {{[^@]+}}@test16a
; IS________NPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]]) ; IS________NPM-SAME: (i8 [[V:%.*]], i8** nocapture nofree readnone [[P:%.*]])
; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 4, align 1
; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1 ; IS________NPM-NEXT: store i8 [[V]], i8* [[TMP1]], align 1
; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]]) ; IS________NPM-NEXT: tail call void @no_sync_func(i8* noalias nocapture nofree nonnull dereferenceable(1) [[TMP1]])
; IS________NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8 %v, i8* %1 store i8 %v, i8* %1
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* nonnull dereferenceable(1) %1) tail call void @free(i8* nonnull dereferenceable(1) %1)
ret void ret void
} }
define void @test16b(i8 %v, i8** %P) { define void @test16b(i8 %v, i8** %P) {
; CHECK-LABEL: define {{[^@]+}}@test16b ; CHECK-LABEL: define {{[^@]+}}@test16b
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]]) ; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8
; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8* %1, i8** %P store i8* %1, i8** %P
tail call void @no_sync_func(i8* %1) tail call void @no_sync_func(i8* %1)
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
define void @test16c(i8 %v, i8** %P) { define void @test16c(i8 %v, i8** %P) {
; CHECK-LABEL: define {{[^@]+}}@test16c ; CHECK-LABEL: define {{[^@]+}}@test16c
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]]) ; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8
; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]]) ; CHECK-NEXT: tail call void @no_sync_func(i8* nocapture nofree [[TMP1]])
; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]]) ; CHECK-NEXT: tail call void @free(i8* nocapture [[TMP1]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8* %1, i8** %P store i8* %1, i8** %P
tail call void @no_sync_func(i8* %1) nounwind tail call void @no_sync_func(i8* %1) nounwind
tail call void @free(i8* %1) tail call void @free(i8* %1)
ret void ret void
} }
define void @test16d(i8 %v, i8** %P) { define void @test16d(i8 %v, i8** %P) {
; CHECK-LABEL: define {{[^@]+}}@test16d ; CHECK-LABEL: define {{[^@]+}}@test16d
; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]]) ; CHECK-SAME: (i8 [[V:%.*]], i8** nocapture writeonly [[P:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[TMP1]], i8** [[P]], align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8* %1, i8** %P store i8* %1, i8** %P
ret void ret void
} }

llvm/test/Transforms/Attributor/internalize.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
; Deep Wrapper disabled ; Deep Wrapper disabled
; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM,CHECK_DISABLED,NOT_CGSCC_NPM_DISABLED,NOT_CGSCC_OPM_DISABLED,NOT_TUNIT_NPM_DISABLED,IS__TUNIT_____DISABLED,IS________OPM_DISABLED,IS__TUNIT_OPM_DISABLED ; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM,CHECK_DISABLED,NOT_CGSCC_NPM_DISABLED,NOT_CGSCC_OPM_DISABLED,NOT_TUNIT_NPM_DISABLED,IS__TUNIT_____DISABLED,IS________OPM_DISABLED,IS__TUNIT_OPM_DISABLED
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM,CHECK_DISABLED,NOT_CGSCC_OPM_DISABLED,NOT_CGSCC_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,IS__TUNIT_____DISABLED,IS________NPM_DISABLED,IS__TUNIT_NPM_DISABLED ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM,CHECK_DISABLED,NOT_CGSCC_OPM_DISABLED,NOT_CGSCC_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,IS__TUNIT_____DISABLED,IS________NPM_DISABLED,IS__TUNIT_NPM_DISABLED
; RUN: opt -attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM,CHECK_DISABLED,NOT_TUNIT_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,NOT_CGSCC_NPM_DISABLED,IS__CGSCC_____DISABLED,IS________OPM_DISABLED,IS__CGSCC_OPM_DISABLED ; RUN: opt -attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM,CHECK_DISABLED,NOT_TUNIT_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,NOT_CGSCC_NPM_DISABLED,IS__CGSCC_____DISABLED,IS________OPM_DISABLED,IS__CGSCC_OPM_DISABLED
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM,CHECK_DISABLED,NOT_TUNIT_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,NOT_CGSCC_OPM_DISABLED,IS__CGSCC_____DISABLED,IS________NPM_DISABLED,IS__CGSCC_NPM_DISABLED ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM,CHECK_DISABLED,NOT_TUNIT_NPM_DISABLED,NOT_TUNIT_OPM_DISABLED,NOT_CGSCC_OPM_DISABLED,IS__CGSCC_____DISABLED,IS________NPM_DISABLED,IS__CGSCC_NPM_DISABLED
; Deep Wrapper enabled ; Deep Wrapper enabled
; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM,CHECK_ENABLED,NOT_CGSCC_NPM_ENABLED,NOT_CGSCC_OPM_ENABLED,NOT_TUNIT_NPM_ENABLED,IS__TUNIT_____ENABLED,IS________OPM_ENABLED,IS__TUNIT_OPM_ENABLED ; RUN: opt -attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM,CHECK_ENABLED,NOT_CGSCC_NPM_ENABLED,NOT_CGSCC_OPM_ENABLED,NOT_TUNIT_NPM_ENABLED,IS__TUNIT_____ENABLED,IS________OPM_ENABLED,IS__TUNIT_OPM_ENABLED
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM,CHECK_ENABLED,NOT_CGSCC_OPM_ENABLED,NOT_CGSCC_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,IS__TUNIT_____ENABLED,IS________NPM_ENABLED,IS__TUNIT_NPM_ENABLED ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM,CHECK_ENABLED,NOT_CGSCC_OPM_ENABLED,NOT_CGSCC_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,IS__TUNIT_____ENABLED,IS________NPM_ENABLED,IS__TUNIT_NPM_ENABLED
; RUN: opt -attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM,CHECK_ENABLED,NOT_TUNIT_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,NOT_CGSCC_NPM_ENABLED,IS__CGSCC_____ENABLED,IS________OPM_ENABLED,IS__CGSCC_OPM_ENABLED ; RUN: opt -attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM,CHECK_ENABLED,NOT_TUNIT_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,NOT_CGSCC_NPM_ENABLED,IS__CGSCC_____ENABLED,IS________OPM_ENABLED,IS__CGSCC_OPM_ENABLED
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM,CHECK_ENABLED,NOT_TUNIT_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,NOT_CGSCC_OPM_ENABLED,IS__CGSCC_____ENABLED,IS________NPM_ENABLED,IS__CGSCC_NPM_ENABLED ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -attributor-allow-deep-wrappers -disable-inlining -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM,CHECK_ENABLED,NOT_TUNIT_NPM_ENABLED,NOT_TUNIT_OPM_ENABLED,NOT_CGSCC_OPM_ENABLED,IS__CGSCC_____ENABLED,IS________NPM_ENABLED,IS__CGSCC_NPM_ENABLED
; RUN: opt -attributor -attributor-cgscc -disable-inlining -attributor-allow-deep-wrappers -S < %s | FileCheck %s --check-prefix=DWRAPPER ; RUN: opt -attributor -attributor-cgscc -disable-inlining -attributor-allow-deep-wrappers -S < %s | FileCheck %s --check-prefix=DWRAPPER
; TEST 1: This function is of linkage `linkonce`, we cannot internalize this ; TEST 1: This function is of linkage `linkonce`, we cannot internalize this
; function and use information derived from it ; function and use information derived from it
; ;
; DWRAPPER-NOT: Function Attrs ; DWRAPPER-NOT: Function Attrs
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; DWRAPPER: call i32 @inner2 ; DWRAPPER: call i32 @inner2
; DWRAPPER-NOT: call i32 @inner3 ; DWRAPPER-NOT: call i32 @inner3
; DWRAPPER: call i32 @inner3.internalized ; DWRAPPER: call i32 @inner3.internalized
; DWRAPPER-NOT: call i32 @inner4 ; DWRAPPER-NOT: call i32 @inner4
; DWRAPPER: call i32 @inner4.internalized ; DWRAPPER: call i32 @inner4.internalized
define i32 @outer1() { define i32 @outer1() {
; CHECK_DISABLED-LABEL: define {{[^@]+}}@outer1() ; CHECK_DISABLED-LABEL: define {{[^@]+}}@outer1()
; CHECK_DISABLED-NEXT: entry: ; CHECK_DISABLED-NEXT: entry:
; CHECK_DISABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 1, i32 2) ; CHECK_DISABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2)
; CHECK_DISABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 1, i32 2) ; CHECK_DISABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2)
; CHECK_DISABLED-NEXT: [[RET3:%.*]] = call i32 @inner3(i32 [[RET1]], i32 [[RET2]]) ; CHECK_DISABLED-NEXT: [[RET3:%.*]] = call i32 @inner3(i32 [[RET1]], i32 [[RET2]])
; CHECK_DISABLED-NEXT: [[RET4:%.*]] = call i32 @inner4(i32 [[RET3]], i32 [[RET3]]) ; CHECK_DISABLED-NEXT: [[RET4:%.*]] = call i32 @inner4(i32 [[RET3]], i32 [[RET3]])
; CHECK_DISABLED-NEXT: ret i32 [[RET4]] ; CHECK_DISABLED-NEXT: ret i32 [[RET4]]
; ;
; CHECK_ENABLED-LABEL: define {{[^@]+}}@outer1() ; CHECK_ENABLED-LABEL: define {{[^@]+}}@outer1()
; CHECK_ENABLED-NEXT: entry: ; CHECK_ENABLED-NEXT: entry:
; CHECK_ENABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 1, i32 2) ; CHECK_ENABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2)
; CHECK_ENABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 1, i32 2) ; CHECK_ENABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2)
; CHECK_ENABLED-NEXT: [[RET3:%.*]] = call i32 @inner3.internalized(i32 [[RET1]], i32 [[RET2]]) ; CHECK_ENABLED-NEXT: [[RET3:%.*]] = call i32 @inner3.internalized(i32 [[RET1]], i32 [[RET2]])
; CHECK_ENABLED-NEXT: [[RET4:%.*]] = call i32 @inner4.internalized(i32 [[RET3]], i32 [[RET3]]) ; CHECK_ENABLED-NEXT: [[RET4:%.*]] = call i32 @inner4.internalized(i32 [[RET3]], i32 [[RET3]])
; CHECK_ENABLED-NEXT: ret i32 [[RET4]] ; CHECK_ENABLED-NEXT: ret i32 [[RET4]]
; ;
entry: entry:
%ret1 = call i32 @inner1(i32 1, i32 2) %ret1 = call i32 @inner1(i32 1, i32 2)
%ret2 = call i32 @inner2(i32 1, i32 2) %ret2 = call i32 @inner2(i32 1, i32 2)
%ret3 = call i32 @inner3(i32 %ret1, i32 %ret2) %ret3 = call i32 @inner3(i32 %ret1, i32 %ret2)
%ret4 = call i32 @inner4(i32 %ret3, i32 %ret3) %ret4 = call i32 @inner4(i32 %ret3, i32 %ret3)
ret i32 %ret4 ret i32 %ret4
} }
define linkonce_odr void @unused_arg(i8) { define linkonce_odr void @unused_arg(i8) {
; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg ; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg
; CHECK_DISABLED-SAME: (i8 [[TMP0:%.*]]) ; CHECK_DISABLED-SAME: (i8 [[TMP0:%.*]])
; CHECK_DISABLED-NEXT: unreachable ; CHECK_DISABLED-NEXT: unreachable
; ;
unreachable unreachable
} }
define void @unused_arg_caller() { define void @unused_arg_caller() {
; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg_caller() ; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg_caller()
; CHECK_DISABLED-NEXT: call void @unused_arg(i8 0) ; CHECK_DISABLED-NEXT: call void @unused_arg(i8 noundef 0)
; CHECK_DISABLED-NEXT: ret void ; CHECK_DISABLED-NEXT: ret void
; ;
; IS__TUNIT_____ENABLED: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; IS__TUNIT_____ENABLED: Function Attrs: nofree noreturn nosync nounwind readnone willreturn
; IS__TUNIT_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller() ; IS__TUNIT_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller()
; IS__TUNIT_____ENABLED-NEXT: unreachable ; IS__TUNIT_____ENABLED-NEXT: unreachable
; ;
; IS__CGSCC_____ENABLED: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn ; IS__CGSCC_____ENABLED: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller() ; IS__CGSCC_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller()
Show All 9 Lines

llvm/test/Transforms/Attributor/liveness.ll

Show First 20 Lines • Show All 1,914 Lines • ▼ Show 20 Lines
; CHECK: for.cond.0: ; CHECK: for.cond.0:
; CHECK-NEXT: [[G_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY_0:%.*]] ] ; CHECK-NEXT: [[G_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY_0:%.*]] ]
; CHECK-NEXT: [[CMP_0:%.*]] = icmp ult i32 [[G_0]], 100 ; CHECK-NEXT: [[CMP_0:%.*]] = icmp ult i32 [[G_0]], 100
; CHECK-NEXT: br i1 [[CMP_0]], label [[FOR_BODY_0]], label [[FOR_END_0:%.*]] ; CHECK-NEXT: br i1 [[CMP_0]], label [[FOR_BODY_0]], label [[FOR_END_0:%.*]]
; CHECK: for.body.0: ; CHECK: for.body.0:
; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[G_0]], 1 ; CHECK-NEXT: [[INC]] = add nuw nsw i32 [[G_0]], 1
; CHECK-NEXT: br label [[FOR_COND_0]] ; CHECK-NEXT: br label [[FOR_COND_0]]
; CHECK: for.end.0: ; CHECK: for.end.0:
; CHECK-NEXT: [[CALL:%.*]] = call i8* @malloc(i64 8) ; CHECK-NEXT: [[CALL:%.*]] = call i8* @malloc(i64 noundef 8)
; CHECK-NEXT: store i8* [[CALL]], i8** bitcast (%struct.a** @e to i8**), align 8 ; CHECK-NEXT: store i8* [[CALL]], i8** bitcast (%struct.a** @e to i8**), align 8
; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[CALL]] to %struct.a** ; CHECK-NEXT: [[B:%.*]] = bitcast i8* [[CALL]] to %struct.a**
; CHECK-NEXT: store %struct.a* null, %struct.a** [[B]], align 8 ; CHECK-NEXT: store %struct.a* null, %struct.a** [[B]], align 8
; CHECK-NEXT: br label [[FOR_COND_1:%.*]] ; CHECK-NEXT: br label [[FOR_COND_1:%.*]]
; CHECK: for.cond.1: ; CHECK: for.cond.1:
; CHECK-NEXT: [[G_1:%.*]] = phi i32 [ 0, [[FOR_END_0]] ], [ [[INC6:%.*]], [[FOR_BODY_1:%.*]] ] ; CHECK-NEXT: [[G_1:%.*]] = phi i32 [ 0, [[FOR_END_0]] ], [ [[INC6:%.*]], [[FOR_BODY_1:%.*]] ]
; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[G_1]], 100 ; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i32 [[G_1]], 100
; CHECK-NEXT: br i1 [[CMP_1]], label [[FOR_BODY_1]], label [[FOR_END_1:%.*]] ; CHECK-NEXT: br i1 [[CMP_1]], label [[FOR_BODY_1]], label [[FOR_END_1:%.*]]
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@p = global i8 0 @p = global i8 0
define void @bad_gep() { define void @bad_gep() {
; CHECK: Function Attrs: nounwind readnone willreturn ; CHECK: Function Attrs: nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@bad_gep() ; CHECK-LABEL: define {{[^@]+}}@bad_gep()
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[N:%.*]] = alloca i8, align 1 ; CHECK-NEXT: [[N:%.*]] = alloca i8, align 1
; CHECK-NEXT: [[M:%.*]] = alloca i8, align 1 ; CHECK-NEXT: [[M:%.*]] = alloca i8, align 1
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 1, i8* noalias nocapture noundef nonnull dereferenceable(1) [[N]]) ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture noundef nonnull dereferenceable(1) [[N]])
; CHECK-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; CHECK: while.body: ; CHECK: while.body:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: if.then: ; CHECK: if.then:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: if.end: ; CHECK: if.end:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 1, i8* noalias nocapture noundef nonnull dereferenceable(1) [[N]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture noundef nonnull dereferenceable(1) [[N]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%n = alloca i8 %n = alloca i8
%m = alloca i8 %m = alloca i8
call void @llvm.lifetime.start.p0i8(i64 1, i8* %n) call void @llvm.lifetime.start.p0i8(i64 1, i8* %n)
br label %exit br label %exit
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llvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll

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; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[I]], -42 ; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[I]], -42
; CHECK-NEXT: br i1 [[C1]], label [[EXIT2:%.*]], label [[EXIT]] ; CHECK-NEXT: br i1 [[C1]], label [[EXIT2:%.*]], label [[EXIT]]
; CHECK: cont: ; CHECK: cont:
; CHECK-NEXT: call void @dummy(i1 [[F]]) ; CHECK-NEXT: call void @dummy(i1 [[F]])
; CHECK-NEXT: br label [[EXIT2]] ; CHECK-NEXT: br label [[EXIT2]]
; CHECK: do: ; CHECK: do:
; CHECK-NEXT: call void @dummy(i1 [[F]]) ; CHECK-NEXT: call void @dummy(i1 [[F]])
; CHECK-NEXT: [[CONSUME:%.*]] = call i32 @exit() ; CHECK-NEXT: [[CONSUME:%.*]] = call i32 @exit()
; CHECK-NEXT: call void @llvm.assume(i1 [[F]]) ; CHECK-NEXT: call void @llvm.assume(i1 noundef [[F]])
; CHECK-NEXT: [[COND:%.*]] = icmp eq i1 [[F]], false ; CHECK-NEXT: [[COND:%.*]] = icmp eq i1 [[F]], false
; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[CONT:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[CONT:%.*]]
; CHECK: exit2: ; CHECK: exit2:
; CHECK-NEXT: ret i32 30 ; CHECK-NEXT: ret i32 30
; ;
entry: entry:
%c = icmp ne i32 %i, -2134 %c = icmp ne i32 %i, -2134
br i1 %c, label %do, label %exit br i1 %c, label %do, label %exit
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llvm/test/Transforms/Attributor/memory_locations.ll

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} }
define dso_local i8* @internal_argmem_only_write(i32* %arg) { define dso_local i8* @internal_argmem_only_write(i32* %arg) {
; CHECK: Function Attrs: inaccessiblemem_or_argmemonly ; CHECK: Function Attrs: inaccessiblemem_or_argmemonly
; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_write ; CHECK-LABEL: define {{[^@]+}}@internal_argmem_only_write
; CHECK-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[ARG:%.*]]) ; CHECK-SAME: (i32* nocapture nonnull writeonly align 4 dereferenceable(4) [[ARG:%.*]])
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i32 10, i32* [[ARG]], align 4 ; CHECK-NEXT: store i32 10, i32* [[ARG]], align 4
; CHECK-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(10) i8* @malloc(i64 10) ; CHECK-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(10) i8* @malloc(i64 noundef 10)
; CHECK-NEXT: ret i8* [[CALL]] ; CHECK-NEXT: ret i8* [[CALL]]
; ;
entry: entry:
store i32 10, i32* %arg, align 4 store i32 10, i32* %arg, align 4
%call = call dereferenceable_or_null(10) i8* @malloc(i64 10) %call = call dereferenceable_or_null(10) i8* @malloc(i64 10)
ret i8* %call ret i8* %call
} }
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define i8 @recursive_not_readnone(i8* %ptr, i1 %c) { define i8 @recursive_not_readnone(i8* %ptr, i1 %c) {
; CHECK: Function Attrs: argmemonly nofree nosync nounwind ; CHECK: Function Attrs: argmemonly nofree nosync nounwind
; CHECK-LABEL: define {{[^@]+}}@recursive_not_readnone ; CHECK-LABEL: define {{[^@]+}}@recursive_not_readnone
; CHECK-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]]) ; CHECK-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]])
; CHECK-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; CHECK-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; CHECK: t:
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 false) ; CHECK-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false)
; CHECK-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1 ; CHECK-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1
; CHECK-NEXT: ret i8 [[R]] ; CHECK-NEXT: ret i8 [[R]]
; CHECK: f: ; CHECK: f:
; CHECK-NEXT: store i8 1, i8* [[PTR]], align 1 ; CHECK-NEXT: store i8 1, i8* [[PTR]], align 1
; CHECK-NEXT: ret i8 0 ; CHECK-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call i8 @recursive_not_readnone(i8* %alloc, i1 false) call i8 @recursive_not_readnone(i8* %alloc, i1 false)
%r = load i8, i8* %alloc %r = load i8, i8* %alloc
ret i8 %r ret i8 %r
f: f:
store i8 1, i8* %ptr store i8 1, i8* %ptr
ret i8 0 ret i8 0
} }
define internal i8 @recursive_not_readnone_internal(i8* %ptr, i1 %c) { define internal i8 @recursive_not_readnone_internal(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]])
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 false) ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false)
; IS__TUNIT____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1 ; IS__TUNIT____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT____-NEXT: ret i8 [[R]]
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal
; IS__CGSCC____-SAME: (i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 false) ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false)
; IS__CGSCC____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1 ; IS__CGSCC____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1
; IS__CGSCC____-NEXT: ret i8 [[R]] ; IS__CGSCC____-NEXT: ret i8 [[R]]
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
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define internal i8 @recursive_not_readnone_internal2(i8* %ptr, i1 %c) { define internal i8 @recursive_not_readnone_internal2(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal2
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]]) ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]])
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 false) ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false)
; IS__TUNIT____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1 ; IS__TUNIT____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT____-NEXT: ret i8 [[R]]
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal2
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 false) ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false)
; IS__CGSCC____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1 ; IS__CGSCC____-NEXT: [[R:%.*]] = load i8, i8* [[ALLOC]], align 1
; IS__CGSCC____-NEXT: ret i8 [[R]] ; IS__CGSCC____-NEXT: ret i8 [[R]]
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
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llvm/test/Transforms/Attributor/noalias.ll

Show All 12 Lines
; G = V; ; G = V;
; return V; ; return V;
; } ; }
@G = external global i8* @G = external global i8*
define i8* @foo() { define i8* @foo() {
; CHECK-LABEL: define {{[^@]+}}@foo() ; CHECK-LABEL: define {{[^@]+}}@foo()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: store i8* [[TMP1]], i8** @G, align 8 ; CHECK-NEXT: store i8* [[TMP1]], i8** @G, align 8
; CHECK-NEXT: ret i8* [[TMP1]] ; CHECK-NEXT: ret i8* [[TMP1]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
store i8* %1, i8** @G, align 8 store i8* %1, i8** @G, align 8
ret i8* %1 ret i8* %1
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
; TEST 2 ; TEST 2
; call noalias function in return instruction. ; call noalias function in return instruction.
define i8* @return_noalias(){ define i8* @return_noalias(){
; CHECK-LABEL: define {{[^@]+}}@return_noalias() ; CHECK-LABEL: define {{[^@]+}}@return_noalias()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: ret i8* [[TMP1]] ; CHECK-NEXT: ret i8* [[TMP1]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
ret i8* %1 ret i8* %1
} }
define void @nocapture(i8* %a){ define void @nocapture(i8* %a){
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nocapture ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nocapture
; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[A:%.*]]) ; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[A:%.*]])
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocapture ; IS__CGSCC____-LABEL: define {{[^@]+}}@nocapture
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[A:%.*]]) ; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[A:%.*]])
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
define i8* @return_noalias_looks_like_capture(){ define i8* @return_noalias_looks_like_capture(){
; CHECK-LABEL: define {{[^@]+}}@return_noalias_looks_like_capture() ; CHECK-LABEL: define {{[^@]+}}@return_noalias_looks_like_capture()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: ret i8* [[TMP1]] ; CHECK-NEXT: ret i8* [[TMP1]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
call void @nocapture(i8* %1) call void @nocapture(i8* %1)
ret i8* %1 ret i8* %1
} }
define i16* @return_noalias_casted(){ define i16* @return_noalias_casted(){
; CHECK-LABEL: define {{[^@]+}}@return_noalias_casted() ; CHECK-LABEL: define {{[^@]+}}@return_noalias_casted()
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP1]] to i16* ; CHECK-NEXT: [[C:%.*]] = bitcast i8* [[TMP1]] to i16*
; CHECK-NEXT: ret i16* [[C]] ; CHECK-NEXT: ret i16* [[C]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
%c = bitcast i8* %1 to i16* %c = bitcast i8* %1 to i16*
ret i16* %c ret i16* %c
} }
Show All 39 Lines
; CHECK-LABEL: define {{[^@]+}}@foo1 ; CHECK-LABEL: define {{[^@]+}}@foo1
; CHECK-SAME: (i32 [[TMP0:%.*]]) ; CHECK-SAME: (i32 [[TMP0:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]] ; CHECK-NEXT: br i1 [[TMP2]], label [[TMP5:%.*]], label [[TMP3:%.*]]
; CHECK: 3: ; CHECK: 3:
; CHECK-NEXT: [[TMP4:%.*]] = tail call i8* (...) @baz() ; CHECK-NEXT: [[TMP4:%.*]] = tail call i8* (...) @baz()
; CHECK-NEXT: br label [[TMP5]] ; CHECK-NEXT: br label [[TMP5]]
; CHECK: 5: ; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP6:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: ret i8* [[TMP6]] ; CHECK-NEXT: ret i8* [[TMP6]]
; ;
%2 = icmp eq i32 %0, 0 %2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3 br i1 %2, label %5, label %3
3: ; preds = %1 3: ; preds = %1
%4 = tail call i8* (...) @baz() %4 = tail call i8* (...) @baz()
br label %5 br label %5
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} }
; TEST 7 ; TEST 7
define i8* @test7() nounwind { define i8* @test7() nounwind {
; CHECK: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; CHECK-LABEL: define {{[^@]+}}@test7() ; CHECK-LABEL: define {{[^@]+}}@test7()
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[A:%.*]] = call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8* [[A]], null ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8* [[A]], null
; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL]], label [[RETURN:%.*]], label [[IF_END:%.*]]
; CHECK: if.end: ; CHECK: if.end:
; CHECK-NEXT: store i8 7, i8* [[A]], align 1 ; CHECK-NEXT: store i8 7, i8* [[A]], align 1
; CHECK-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; CHECK: return: ; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[A]], [[IF_END]] ], [ null, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i8* [ [[A]], [[IF_END]] ], [ null, [[ENTRY:%.*]] ]
; CHECK-NEXT: ret i8* [[RETVAL_0]] ; CHECK-NEXT: ret i8* [[RETVAL_0]]
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} }
; TEST 8 ; TEST 8
define i8* @test8(i32* %0) nounwind uwtable { define i8* @test8(i32* %0) nounwind uwtable {
; CHECK: Function Attrs: nounwind uwtable ; CHECK: Function Attrs: nounwind uwtable
; CHECK-LABEL: define {{[^@]+}}@test8 ; CHECK-LABEL: define {{[^@]+}}@test8
; CHECK-SAME: (i32* [[TMP0:%.*]]) ; CHECK-SAME: (i32* [[TMP0:%.*]])
; CHECK-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[TMP2:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32* [[TMP0]], null ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32* [[TMP0]], null
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
; CHECK: 4: ; CHECK: 4:
; CHECK-NEXT: store i8 10, i8* [[TMP2]], align 1 ; CHECK-NEXT: store i8 10, i8* [[TMP2]], align 1
; CHECK-NEXT: br label [[TMP5]] ; CHECK-NEXT: br label [[TMP5]]
; CHECK: 5: ; CHECK: 5:
; CHECK-NEXT: ret i8* [[TMP2]] ; CHECK-NEXT: ret i8* [[TMP2]]
; ;
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; TEST 12 ; TEST 12
; CallSite Argument ; CallSite Argument
declare void @use_nocapture(i8* nocapture) declare void @use_nocapture(i8* nocapture)
declare void @use(i8*) declare void @use(i8*)
define void @test12_1() { define void @test12_1() {
; CHECK-LABEL: define {{[^@]+}}@test12_1() ; CHECK-LABEL: define {{[^@]+}}@test12_1()
; CHECK-NEXT: [[A:%.*]] = alloca i8, align 4 ; CHECK-NEXT: [[A:%.*]] = alloca i8, align 4
; CHECK-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture noundef nonnull align 4 dereferenceable(1) [[A]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture noundef nonnull align 4 dereferenceable(1) [[A]])
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture noundef nonnull align 4 dereferenceable(1) [[A]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture noundef nonnull align 4 dereferenceable(1) [[A]])
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[B]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[B]])
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[B]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[B]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca i8, align 4 %A = alloca i8, align 4
%B = tail call noalias i8* @malloc(i64 4) %B = tail call noalias i8* @malloc(i64 4)
tail call void @use_nocapture(i8* %A) tail call void @use_nocapture(i8* %A)
tail call void @use_nocapture(i8* %A) tail call void @use_nocapture(i8* %A)
tail call void @use_nocapture(i8* %B) tail call void @use_nocapture(i8* %B)
tail call void @use_nocapture(i8* %B) tail call void @use_nocapture(i8* %B)
ret void ret void
} }
define void @test12_2(){ define void @test12_2(){
; CHECK-LABEL: define {{[^@]+}}@test12_2() ; CHECK-LABEL: define {{[^@]+}}@test12_2()
; CHECK-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[A]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[A]])
; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[A]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* noalias nocapture [[A]])
; CHECK-NEXT: tail call void @use(i8* [[A]]) ; CHECK-NEXT: tail call void @use(i8* [[A]])
; CHECK-NEXT: tail call void @use_nocapture(i8* nocapture [[A]]) ; CHECK-NEXT: tail call void @use_nocapture(i8* nocapture [[A]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; FIXME: This should be @use_nocapture(i8* noalias [[A]]) ; FIXME: This should be @use_nocapture(i8* noalias [[A]])
; FIXME: This should be @use_nocapture(i8* noalias nocapture [[A]]) ; FIXME: This should be @use_nocapture(i8* noalias nocapture [[A]])
%A = tail call noalias i8* @malloc(i64 4) %A = tail call noalias i8* @malloc(i64 4)
tail call void @use_nocapture(i8* %A) tail call void @use_nocapture(i8* %A)
tail call void @use_nocapture(i8* %A) tail call void @use_nocapture(i8* %A)
tail call void @use(i8* %A) tail call void @use(i8* %A)
tail call void @use_nocapture(i8* %A) tail call void @use_nocapture(i8* %A)
ret void ret void
} }
declare void @two_args(i8* nocapture , i8* nocapture) declare void @two_args(i8* nocapture , i8* nocapture)
define void @test12_3(){ define void @test12_3(){
; CHECK-LABEL: define {{[^@]+}}@test12_3() ; CHECK-LABEL: define {{[^@]+}}@test12_3()
; CHECK-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A]]) ; CHECK-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = tail call noalias i8* @malloc(i64 4) %A = tail call noalias i8* @malloc(i64 4)
tail call void @two_args(i8* %A, i8* %A) tail call void @two_args(i8* %A, i8* %A)
ret void ret void
} }
define void @test12_4(){ define void @test12_4(){
; IS________OPM-LABEL: define {{[^@]+}}@test12_4() ; IS________OPM-LABEL: define {{[^@]+}}@test12_4()
; IS________OPM-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS________OPM-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; IS________OPM-NEXT: [[A_0:%.*]] = getelementptr i8, i8* [[A]], i64 0 ; IS________OPM-NEXT: [[A_0:%.*]] = getelementptr i8, i8* [[A]], i64 0
; IS________OPM-NEXT: [[A_1:%.*]] = getelementptr i8, i8* [[A]], i64 1 ; IS________OPM-NEXT: [[A_1:%.*]] = getelementptr i8, i8* [[A]], i64 1
; IS________OPM-NEXT: [[B_0:%.*]] = getelementptr i8, i8* [[B]], i64 0 ; IS________OPM-NEXT: [[B_0:%.*]] = getelementptr i8, i8* [[B]], i64 0
; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[B]]) ; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[B]])
; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_0]]) ; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_0]])
; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_1]]) ; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_1]])
; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A_0]], i8* nocapture [[B_0]]) ; IS________OPM-NEXT: tail call void @two_args(i8* nocapture [[A_0]], i8* nocapture [[B_0]])
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@test12_4() ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@test12_4()
; NOT_TUNIT_OPM-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 4) ; NOT_TUNIT_OPM-NEXT: [[A:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; NOT_TUNIT_OPM-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 4) ; NOT_TUNIT_OPM-NEXT: [[B:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; NOT_TUNIT_OPM-NEXT: [[A_0:%.*]] = getelementptr i8, i8* [[A]], i64 0 ; NOT_TUNIT_OPM-NEXT: [[A_0:%.*]] = getelementptr i8, i8* [[A]], i64 0
; NOT_TUNIT_OPM-NEXT: [[A_1:%.*]] = getelementptr i8, i8* [[A]], i64 1 ; NOT_TUNIT_OPM-NEXT: [[A_1:%.*]] = getelementptr i8, i8* [[A]], i64 1
; NOT_TUNIT_OPM-NEXT: [[B_0:%.*]] = getelementptr i8, i8* [[B]], i64 0 ; NOT_TUNIT_OPM-NEXT: [[B_0:%.*]] = getelementptr i8, i8* [[B]], i64 0
; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* noalias nocapture [[A]], i8* noalias nocapture [[B]]) ; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* noalias nocapture [[A]], i8* noalias nocapture [[B]])
; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_0]]) ; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_0]])
; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_1]]) ; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A]], i8* nocapture [[A_1]])
; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A_0]], i8* nocapture [[B_0]]) ; NOT_TUNIT_OPM-NEXT: tail call void @two_args(i8* nocapture [[A_0]], i8* nocapture [[B_0]])
; NOT_TUNIT_OPM-NEXT: ret void ; NOT_TUNIT_OPM-NEXT: ret void
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; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @use_i8(i8* %a) call void @use_i8(i8* %a)
ret void ret void
} }
define void @test13_use_noalias(){ define void @test13_use_noalias(){
; CHECK-LABEL: define {{[^@]+}}@test13_use_noalias() ; CHECK-LABEL: define {{[^@]+}}@test13_use_noalias()
; CHECK-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16* ; CHECK-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16*
; CHECK-NEXT: [[C2:%.*]] = bitcast i16* [[C1]] to i8* ; CHECK-NEXT: [[C2:%.*]] = bitcast i16* [[C1]] to i8*
; CHECK-NEXT: call void @use_i8_internal(i8* noalias nocapture [[C2]]) ; CHECK-NEXT: call void @use_i8_internal(i8* noalias nocapture [[C2]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13_use_noalias() ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13_use_noalias()
; IS__CGSCC_OPM-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 4) ; IS__CGSCC_OPM-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 4)
; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16* ; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16*
; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = bitcast i16* [[C1]] to i8* ; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = bitcast i16* [[C1]] to i8*
; IS__CGSCC_OPM-NEXT: call void @use_i8_internal(i8* noalias [[C2]]) ; IS__CGSCC_OPM-NEXT: call void @use_i8_internal(i8* noalias [[C2]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
%m1 = tail call noalias i8* @malloc(i64 4) %m1 = tail call noalias i8* @malloc(i64 4)
%c1 = bitcast i8* %m1 to i16* %c1 = bitcast i8* %m1 to i16*
%c2 = bitcast i16* %c1 to i8* %c2 = bitcast i16* %c1 to i8*
call void @use_i8_internal(i8* %c2) call void @use_i8_internal(i8* %c2)
ret void ret void
} }
define void @test13_use_alias(){ define void @test13_use_alias(){
; CHECK-LABEL: define {{[^@]+}}@test13_use_alias() ; CHECK-LABEL: define {{[^@]+}}@test13_use_alias()
; CHECK-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 4) ; CHECK-NEXT: [[M1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16* ; CHECK-NEXT: [[C1:%.*]] = bitcast i8* [[M1]] to i16*
; CHECK-NEXT: [[C2A:%.*]] = bitcast i16* [[C1]] to i8* ; CHECK-NEXT: [[C2A:%.*]] = bitcast i16* [[C1]] to i8*
; CHECK-NEXT: [[C2B:%.*]] = bitcast i16* [[C1]] to i8* ; CHECK-NEXT: [[C2B:%.*]] = bitcast i16* [[C1]] to i8*
; CHECK-NEXT: call void @use_i8_internal(i8* nocapture [[C2A]]) ; CHECK-NEXT: call void @use_i8_internal(i8* nocapture [[C2A]])
; CHECK-NEXT: call void @use_i8_internal(i8* nocapture [[C2B]]) ; CHECK-NEXT: call void @use_i8_internal(i8* nocapture [[C2B]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%m1 = tail call noalias i8* @malloc(i64 4) %m1 = tail call noalias i8* @malloc(i64 4)
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; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
define internal fastcc double @strtox(i8* %s, i8** %p, i32 %prec) unnamed_addr { define internal fastcc double @strtox(i8* %s, i8** %p, i32 %prec) unnamed_addr {
; CHECK-LABEL: define {{[^@]+}}@strtox ; CHECK-LABEL: define {{[^@]+}}@strtox
; CHECK-SAME: (i8* [[S:%.*]]) unnamed_addr ; CHECK-SAME: (i8* [[S:%.*]]) unnamed_addr
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[F:%.*]] = alloca [[STRUCT__IO_FILE:%.*]], align 8 ; CHECK-NEXT: [[F:%.*]] = alloca [[STRUCT__IO_FILE:%.*]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct._IO_FILE* [[F]] to i8* ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct._IO_FILE* [[F]] to i8*
; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 144, i8* nocapture noundef nonnull align 8 dereferenceable(240) [[TMP0]]) ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 144, i8* nocapture noundef nonnull align 8 dereferenceable(240) [[TMP0]])
; CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull align 8 dereferenceable(240) [[F]], i8* [[S]]) ; CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull align 8 dereferenceable(240) [[F]], i8* [[S]])
; CHECK-NEXT: call void @__shlim(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i64 0) ; CHECK-NEXT: call void @__shlim(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i64 noundef 0)
; CHECK-NEXT: [[CALL1:%.*]] = call double @__floatscan(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i32 1, i32 1) ; CHECK-NEXT: [[CALL1:%.*]] = call double @__floatscan(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i32 noundef 1, i32 noundef 1)
; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 144, i8* nocapture noundef nonnull align 8 dereferenceable(240) [[TMP0]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 144, i8* nocapture noundef nonnull align 8 dereferenceable(240) [[TMP0]])
; CHECK-NEXT: ret double [[CALL1]] ; CHECK-NEXT: ret double [[CALL1]]
; ;
entry: entry:
%f = alloca %struct._IO_FILE, align 8 %f = alloca %struct._IO_FILE, align 8
%0 = bitcast %struct._IO_FILE* %f to i8* %0 = bitcast %struct._IO_FILE* %f to i8*
call void @llvm.lifetime.start.p0i8(i64 144, i8* nonnull %0) call void @llvm.lifetime.start.p0i8(i64 144, i8* nonnull %0)
%call = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull %f, i8* %s) %call = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull %f, i8* %s)
call void @__shlim(%struct._IO_FILE* nonnull %f, i64 0) call void @__shlim(%struct._IO_FILE* nonnull %f, i64 0)
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llvm/test/Transforms/Attributor/nocapture-1.ll

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store i32* %y, i32** @g store i32* %y, i32** @g
ret i32 %val ret i32 %val
} }
define void @nc2(i32* %p, i32* %q) { define void @nc2(i32* %p, i32* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2
; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) ; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]])
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 false) ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false)
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2
; IS__CGSCC____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) ; IS__CGSCC____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]])
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 false) ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0] %1 = call i32 @nc1(i32* %q, i32* %p, i1 0) ; <i32> [#uses=0]
ret void ret void
} }
define void @nc3(void ()* %p) { define void @nc3(void ()* %p) {
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; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call i8* @test1_2(i8* %x1_1, i8* %y1_1, i1 %c) call i8* @test1_2(i8* %x1_1, i8* %y1_1, i1 %c)
store i32* null, i32** @g store i32* null, i32** @g
ret void ret void
} }
define i8* @test1_2(i8* %x1_2, i8* %y1_2, i1 %c) { define i8* @test1_2(i8* %x1_2, i8* %y1_2, i1 %c) {
; CHECK: Function Attrs: nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: nofree nosync nounwind writeonly
; CHECK-LABEL: define {{[^@]+}}@test1_2 ; IS________OPM-LABEL: define {{[^@]+}}@test1_2
; CHECK-SAME: (i8* nocapture nofree readnone [[X1_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y1_2:%.*]], i1 [[C:%.*]]) ; IS________OPM-SAME: (i8* nocapture nofree readnone [[X1_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y1_2:%.*]], i1 [[C:%.*]])
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS________OPM: t:
; CHECK-NEXT: call void @test1_1(i8* noalias nocapture nofree readnone undef, i8* noalias nocapture nofree readnone [[Y1_2]], i1 [[C]]) ; IS________OPM-NEXT: call void @test1_1(i8* noalias nocapture nofree readnone undef, i8* noalias nocapture nofree readnone [[Y1_2]], i1 [[C]])
; CHECK-NEXT: store i32* null, i32** @g, align 8 ; IS________OPM-NEXT: store i32* null, i32** @g, align 8
; CHECK-NEXT: br label [[F]] ; IS________OPM-NEXT: br label [[F]]
; CHECK: f: ; IS________OPM: f:
; CHECK-NEXT: ret i8* [[Y1_2]] ; IS________OPM-NEXT: ret i8* [[Y1_2]]
;
; IS________NPM: Function Attrs: nofree nosync nounwind writeonly
; IS________NPM-LABEL: define {{[^@]+}}@test1_2
; IS________NPM-SAME: (i8* nocapture nofree readnone [[X1_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y1_2:%.*]], i1 [[C:%.*]])
; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS________NPM: t:
; IS________NPM-NEXT: call void @test1_1(i8* noalias nocapture nofree readnone undef, i8* noalias nocapture nofree readnone [[Y1_2]], i1 noundef [[C]])
; IS________NPM-NEXT: store i32* null, i32** @g, align 8
; IS________NPM-NEXT: br label [[F]]
; IS________NPM: f:
; IS________NPM-NEXT: ret i8* [[Y1_2]]
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call void @test1_1(i8* %x1_2, i8* %y1_2, i1 %c) call void @test1_1(i8* %x1_2, i8* %y1_2, i1 %c)
store i32* null, i32** @g store i32* null, i32** @g
br label %f br label %f
f: f:
ret i8* %y1_2 ret i8* %y1_2
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; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call i8* @test4_2(i8* %x4_1, i8* %x4_1, i8* %x4_1, i1 %c) call i8* @test4_2(i8* %x4_1, i8* %x4_1, i8* %x4_1, i1 %c)
store i32* null, i32** @g store i32* null, i32** @g
ret void ret void
} }
define i8* @test4_2(i8* %x4_2, i8* %y4_2, i8* %z4_2, i1 %c) { define i8* @test4_2(i8* %x4_2, i8* %y4_2, i8* %z4_2, i1 %c) {
; CHECK: Function Attrs: nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: nofree nosync nounwind writeonly
; CHECK-LABEL: define {{[^@]+}}@test4_2 ; IS________OPM-LABEL: define {{[^@]+}}@test4_2
; CHECK-SAME: (i8* nocapture nofree readnone [[X4_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y4_2:%.*]], i8* nocapture nofree readnone [[Z4_2:%.*]], i1 [[C:%.*]]) ; IS________OPM-SAME: (i8* nocapture nofree readnone [[X4_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y4_2:%.*]], i8* nocapture nofree readnone [[Z4_2:%.*]], i1 [[C:%.*]])
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS________OPM: t:
; CHECK-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 536870912 null, i1 [[C]]) ; IS________OPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 536870912 null, i1 [[C]])
; CHECK-NEXT: store i32* null, i32** @g, align 8 ; IS________OPM-NEXT: store i32* null, i32** @g, align 8
; CHECK-NEXT: br label [[F]] ; IS________OPM-NEXT: br label [[F]]
; CHECK: f: ; IS________OPM: f:
; CHECK-NEXT: ret i8* [[Y4_2]] ; IS________OPM-NEXT: ret i8* [[Y4_2]]
;
; IS________NPM: Function Attrs: nofree nosync nounwind writeonly
; IS________NPM-LABEL: define {{[^@]+}}@test4_2
; IS________NPM-SAME: (i8* nocapture nofree readnone [[X4_2:%.*]], i8* nofree readnone returned "no-capture-maybe-returned" [[Y4_2:%.*]], i8* nocapture nofree readnone [[Z4_2:%.*]], i1 [[C:%.*]])
; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS________NPM: t:
; IS________NPM-NEXT: call void @test4_1(i8* noalias nocapture nofree noundef readnone align 536870912 null, i1 noundef [[C]])
; IS________NPM-NEXT: store i32* null, i32** @g, align 8
; IS________NPM-NEXT: br label [[F]]
; IS________NPM: f:
; IS________NPM-NEXT: ret i8* [[Y4_2]]
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call void @test4_1(i8* null, i1 %c) call void @test4_1(i8* null, i1 %c)
store i32* null, i32** @g store i32* null, i32** @g
br label %f br label %f
f: f:
ret i8* %y4_2 ret i8* %y4_2
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llvm/test/Transforms/Attributor/nofree.ll

Show First 20 Lines • Show All 350 Lines • ▼ Show 20 Lines
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; ATTRIBUTOR-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]]) ; ATTRIBUTOR-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_pos ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_pos
; CHECK-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; CHECK-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [[ATTR11:#.*]] [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11:#.*]] [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; CHECK-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]]) ; CHECK-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)] call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)]
call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4)
ret void ret void
} }
define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg
; ATTRIBUTOR-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]])
; ATTRIBUTOR-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]]) ; ATTRIBUTOR-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg
; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]])
; CHECK-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]]) ; CHECK-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4)
call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)] call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)]
ret void ret void
} }
define void @nonnull_assume_call(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_call(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_call ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_call
Show All 11 Lines
; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nofree readnone [[ARG4]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nofree readnone [[ARG4]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_call ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_call
; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; CHECK-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]])
; CHECK-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]]) ; CHECK-NEXT: call void @unknown(i8* [[ARG1]], i8* [[ARG2]], i8* [[ARG3]], i8* [[ARG4]])
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG1]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG1]])
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG2]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG2]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG3]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG3]])
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG4]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture readnone [[ARG4]])
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG1]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG1]])
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture readnone [[ARG2]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture readnone [[ARG2]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG4]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG4]]) ]
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG3]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG3]])
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG4]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree readnone [[ARG4]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4)
call void @use_i8_ptr(i8* %arg1) call void @use_i8_ptr(i8* %arg1)
call void @use_i8_ptr(i8* %arg2) call void @use_i8_ptr(i8* %arg2)
call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)] call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)]
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llvm/test/Transforms/Attributor/nonnull.ll

Show All 36 Lines
define i8* @test2A(i1 %c, i8* %ret) { define i8* @test2A(i1 %c, i8* %ret) {
; ATTRIBUTOR: define nonnull i8* @test2A(i1 %c, i8* nofree nonnull readnone returned %ret) ; ATTRIBUTOR: define nonnull i8* @test2A(i1 %c, i8* nofree nonnull readnone returned %ret)
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2A ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2A
; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) ; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]])
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_OPM: A: ; NOT_CGSCC_OPM: A:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR11:#.*]] [ "nonnull"(i8* [[RET]]) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11:#.*]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]]
; NOT_CGSCC_OPM: B: ; NOT_CGSCC_OPM: B:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR11]] [ "nonnull"(i8* [[RET]]) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2A ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2A
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) ; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]])
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_OPM: A: ; IS__CGSCC_OPM: A:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR12:#.*]] [ "nonnull"(i8* [[RET]]) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR12:#.*]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_OPM: B: ; IS__CGSCC_OPM: B:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR12]] [ "nonnull"(i8* [[RET]]) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR12]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
} }
define i8* @test2B(i1 %c, i8* %ret) { define i8* @test2B(i1 %c, i8* %ret) {
; ATTRIBUTOR: define nonnull dereferenceable(4) i8* @test2B(i1 %c, i8* nofree nonnull readnone returned dereferenceable(4) %ret) ; ATTRIBUTOR: define nonnull dereferenceable(4) i8* @test2B(i1 %c, i8* nofree nonnull readnone returned dereferenceable(4) %ret)
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2B ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2B
; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) ; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]])
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_OPM: A: ; NOT_CGSCC_OPM: A:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]]
; NOT_CGSCC_OPM: B: ; NOT_CGSCC_OPM: B:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2B ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2B
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) ; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]])
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_OPM: A: ; IS__CGSCC_OPM: A:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_OPM: B: ; IS__CGSCC_OPM: B:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]] ; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
ret i8* %ret ret i8* %ret
} }
; Given an SCC where one of the functions can not be marked nonnull, ; Given an SCC where one of the functions can not be marked nonnull,
; can we still mark the other one which is trivially nonnull ; can we still mark the other one which is trivially nonnull
define i8* @scc_binder(i1 %c) { define i8* @scc_binder(i1 %c) {
; CHECK-LABEL: define {{[^@]+}}@scc_binder ; IS________OPM-LABEL: define {{[^@]+}}@scc_binder
; CHECK-SAME: (i1 [[C:%.*]]) ; IS________OPM-SAME: (i1 [[C:%.*]])
; CHECK-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; CHECK: rec: ; IS________OPM: rec:
; CHECK-NEXT: [[TMP1:%.*]] = call i8* @test3(i1 [[C]]) ; IS________OPM-NEXT: [[TMP1:%.*]] = call i8* @test3(i1 [[C]])
; CHECK-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; CHECK: end: ; IS________OPM: end:
; CHECK-NEXT: ret i8* null ; IS________OPM-NEXT: ret i8* null
;
; IS________NPM-LABEL: define {{[^@]+}}@scc_binder
; IS________NPM-SAME: (i1 [[C:%.*]])
; IS________NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS________NPM: rec:
; IS________NPM-NEXT: [[TMP1:%.*]] = call i8* @test3(i1 noundef [[C]])
; IS________NPM-NEXT: br label [[END]]
; IS________NPM: end:
; IS________NPM-NEXT: ret i8* null
; ;
br i1 %c, label %rec, label %end br i1 %c, label %rec, label %end
rec: rec:
call i8* @test3(i1 %c) call i8* @test3(i1 %c)
br label %end br label %end
end: end:
ret i8* null ret i8* null
} }
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} }
; ATTRIBUTOR_OPM: define i8* @test10 ; ATTRIBUTOR_OPM: define i8* @test10
; ATTRIBUTOR_NPM: define nonnull i8* @test10 ; ATTRIBUTOR_NPM: define nonnull i8* @test10
define i8* @test10(i8* %a, i64 %n) { define i8* @test10(i8* %a, i64 %n) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@test10 ; CHECK-LABEL: define {{[^@]+}}@test10
; CHECK-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) ; CHECK-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]])
; CHECK-NEXT: call void @llvm.assume(i1 true) ; CHECK-NEXT: call void @llvm.assume(i1 noundef true)
; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]] ; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; CHECK-NEXT: ret i8* [[B]] ; CHECK-NEXT: ret i8* [[B]]
; ;
%cmp = icmp ne i64 %n, 0 %cmp = icmp ne i64 %n, 0
call void @llvm.assume(i1 %cmp) call void @llvm.assume(i1 %cmp)
%b = getelementptr inbounds i8, i8* %a, i64 %n %b = getelementptr inbounds i8, i8* %a, i64 %n
ret i8* %b ret i8* %b
} }
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declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly
; We should not mark the return of @strrchr as `nonnull`, it may well be NULL! ; We should not mark the return of @strrchr as `nonnull`, it may well be NULL!
define i8* @mybasename(i8* nofree readonly %str) { define i8* @mybasename(i8* nofree readonly %str) {
; CHECK: Function Attrs: nofree nounwind readonly ; CHECK: Function Attrs: nofree nounwind readonly
; CHECK-LABEL: define {{[^@]+}}@mybasename ; CHECK-LABEL: define {{[^@]+}}@mybasename
; CHECK-SAME: (i8* nofree readonly [[STR:%.*]]) ; CHECK-SAME: (i8* nofree readonly [[STR:%.*]])
; CHECK-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 47) ; CHECK-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]]
; CHECK-NEXT: ret i8* [[COND]] ; CHECK-NEXT: ret i8* [[COND]]
; ;
%call = call i8* @strrchr(i8* %str, i32 47) %call = call i8* @strrchr(i8* %str, i32 47)
%tobool = icmp ne i8* %call, null %tobool = icmp ne i8* %call, null
%add.ptr = getelementptr inbounds i8, i8* %call, i64 1 %add.ptr = getelementptr inbounds i8, i8* %call, i64 1
%cond = select i1 %tobool, i8* %add.ptr, i8* %str %cond = select i1 %tobool, i8* %add.ptr, i8* %str
ret i8* %cond ret i8* %cond
} }
define void @nonnull_assume_pos(i8* %arg) { define void @nonnull_assume_pos(i8* %arg) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) ; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]])
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR11]] [ "nonnull"(i8* [[ARG]]) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR11]] [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; NOT_CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; NOT_CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; NOT_CGSCC_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]])
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 true) [[ATTR12]] [ "nonnull"(i8* [[ARG]]) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [[ATTR12]] [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
ret void ret void
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; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg
; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) ; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]])
; CHECK-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; CHECK-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; CHECK-NEXT: [[TMP2:%.*]] = call i8* @unknown() ; CHECK-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call i8* @unknown() call i8* @unknown()
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
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llvm/test/Transforms/Attributor/norecurse.ll

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; CHECK: Function Attrs ; CHECK: Function Attrs
; CHECK-NEXT: declare i32 @k() ; CHECK-NEXT: declare i32 @k()
declare i32 @k() readnone declare i32 @k() readnone
define void @intrinsic(i8* %dest, i8* %src, i32 %len) { define void @intrinsic(i8* %dest, i8* %src, i32 %len) {
; CHECK: Function Attrs: argmemonly nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nosync nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@intrinsic ; CHECK-LABEL: define {{[^@]+}}@intrinsic
; CHECK-SAME: (i8* nocapture writeonly [[DEST:%.*]], i8* nocapture readonly [[SRC:%.*]], i32 [[LEN:%.*]]) ; CHECK-SAME: (i8* nocapture writeonly [[DEST:%.*]], i8* nocapture readonly [[SRC:%.*]], i32 [[LEN:%.*]])
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly [[DEST]], i8* noalias nocapture readonly [[SRC]], i32 [[LEN]], i1 false) ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly [[DEST]], i8* noalias nocapture readonly [[SRC]], i32 [[LEN]], i1 noundef false)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 false)
ret void ret void
} }
; CHECK: Function Attrs ; CHECK: Function Attrs
; CHECK-NEXT: declare void @llvm.memcpy.p0i8.p0i8.i32 ; CHECK-NEXT: declare void @llvm.memcpy.p0i8.p0i8.i32
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; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@g() ; IS__TUNIT____-LABEL: define {{[^@]+}}@g()
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@g() ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@g()
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: call void @f(i32 0) ; IS__CGSCC_OPM-NEXT: call void @f(i32 noundef 0)
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@g() ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@g()
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
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llvm/test/Transforms/Attributor/nosync.ll

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; TEST 14 - negative, checking volatile intrinsics. ; TEST 14 - negative, checking volatile intrinsics.
; It is odd to add nocapture but a result of the llvm.memcpy nocapture. ; It is odd to add nocapture but a result of the llvm.memcpy nocapture.
; ;
define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) { define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) {
; CHECK: Function Attrs: argmemonly nounwind willreturn ; CHECK: Function Attrs: argmemonly nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@memcpy_volatile ; CHECK-LABEL: define {{[^@]+}}@memcpy_volatile
; CHECK-SAME: (i8* nocapture writeonly [[PTR1:%.*]], i8* nocapture readonly [[PTR2:%.*]]) ; CHECK-SAME: (i8* nocapture writeonly [[PTR1:%.*]], i8* nocapture readonly [[PTR2:%.*]])
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly [[PTR1]], i8* noalias nocapture readonly [[PTR2]], i32 8, i1 true) ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture writeonly [[PTR1]], i8* noalias nocapture readonly [[PTR2]], i32 noundef 8, i1 noundef true)
; CHECK-NEXT: ret i32 4 ; CHECK-NEXT: ret i32 4
; ;
call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1) call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1)
ret i32 4 ret i32 4
} }
; TEST 15 - positive, non-volatile intrinsic. ; TEST 15 - positive, non-volatile intrinsic.
; It is odd to add nocapture but a result of the llvm.memset nocapture. ; It is odd to add nocapture but a result of the llvm.memset nocapture.
; ;
define i32 @memset_non_volatile(i8* %ptr1, i8 %val) { define i32 @memset_non_volatile(i8* %ptr1, i8 %val) {
; CHECK: Function Attrs: argmemonly nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@memset_non_volatile ; CHECK-LABEL: define {{[^@]+}}@memset_non_volatile
; CHECK-SAME: (i8* nocapture writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) ; CHECK-SAME: (i8* nocapture writeonly [[PTR1:%.*]], i8 [[VAL:%.*]])
; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture writeonly [[PTR1]], i8 [[VAL]], i32 8, i1 false) ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false)
; CHECK-NEXT: ret i32 4 ; CHECK-NEXT: ret i32 4
; ;
call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0) call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0)
ret i32 4 ret i32 4
} }
; TEST 16 - negative, inline assembly. ; TEST 16 - negative, inline assembly.
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llvm/test/Transforms/Attributor/potential.ll

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; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) ; IS__TUNIT____-SAME: (i1 [[C:%.*]])
; IS__TUNIT____-NEXT: ret i1 false ; IS__TUNIT____-NEXT: ret i1 false
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[ARG:%.*]] = select i1 [[C]], i32 -1, i32 1 ; IS__CGSCC____-NEXT: [[ARG:%.*]] = select i1 [[C]], i32 -1, i32 1
; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @iszero1(i32 [[ARG]]) ; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @iszero1(i32 noundef [[ARG]])
; IS__CGSCC____-NEXT: ret i1 [[RET]] ; IS__CGSCC____-NEXT: ret i1 [[RET]]
; ;
%arg = select i1 %c, i32 -1, i32 1 %arg = select i1 %c, i32 -1, i32 1
%ret = call i1 @iszero1(i32 %arg) %ret = call i1 @iszero1(i32 %arg)
ret i1 %ret ret i1 %ret
} }
Show All 16 Lines;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define internal i32 @call_with_two_values(i32 %c) { define internal i32 @call_with_two_values(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_with_two_values ; IS__CGSCC____-LABEL: define {{[^@]+}}@call_with_two_values
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[C:%.*]])
; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @iszero2(i32 [[C]]) ; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @iszero2(i32 noundef [[C]])
; IS__CGSCC____-NEXT: [[MINUSC:%.*]] = sub i32 0, [[C]] ; IS__CGSCC____-NEXT: [[MINUSC:%.*]] = sub i32 0, [[C]]
; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @iszero2(i32 [[MINUSC]]) ; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @iszero2(i32 noundef [[MINUSC]])
; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[CSRET1]], [[CSRET2]] ; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[CSRET1]], [[CSRET2]]
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%csret1 = call i32 @iszero2(i32 %c) %csret1 = call i32 @iszero2(i32 %c)
%minusc = sub i32 0, %c %minusc = sub i32 0, %c
%csret2 = call i32 @iszero2(i32 %minusc) %csret2 = call i32 @iszero2(i32 %minusc)
%ret = add i32 %csret1, %csret2 %ret = add i32 %csret1, %csret2
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test2(i1 %c) { define i32 @potential_test2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) ; IS__TUNIT____-SAME: (i1 [[C:%.*]])
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @call_with_two_values(i32 1) ; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @call_with_two_values(i32 noundef 1)
; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @call_with_two_values(i32 -1) ; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @call_with_two_values(i32 noundef -1)
; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[CSRET1]], [[CSRET2]] ; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[CSRET1]], [[CSRET2]]
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%csret1 = call i32 @call_with_two_values(i32 1) %csret1 = call i32 @call_with_two_values(i32 1)
%csret2 = call i32 @call_with_two_values(i32 -1) %csret2 = call i32 @call_with_two_values(i32 -1)
%ret = add i32 %csret1, %csret2 %ret = add i32 %csret1, %csret2
ret i32 %ret ret i32 %ret
} }
; potential-test 3 ; potential-test 3
; ;
; potential values of returned value of f are {0,1} ; potential values of returned value of f are {0,1}
; potential values of argument of g are {0,1} ; potential values of argument of g are {0,1}
; potential value of returned value of g is 1 ; potential value of returned value of g is 1
; then returned value of g can be simplified ; then returned value of g can be simplified
; ;
; int zero_or_one(int c) { return c < 2; } ; int zero_or_one(int c) { return c < 2; }
; int potential_test3() { return zero_or_one(iszero(0))+zero_or_one(iszero(1)); } ; int potential_test3() { return zero_or_one(iszero(0))+zero_or_one(iszero(1)); }
define internal i32 @iszero3(i32 %c) { define internal i32 @iszero3(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@iszero3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@iszero3
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef [[C:%.*]])
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0 ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT____-NEXT: [[RET:%.*]] = zext i1 [[CMP]] to i32 ; IS__TUNIT____-NEXT: [[RET:%.*]] = zext i1 [[CMP]] to i32
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; IS__TUNIT____-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@iszero3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@iszero3
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[C:%.*]])
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: [[RET:%.*]] = zext i1 [[CMP]] to i32 ; IS__CGSCC____-NEXT: [[RET:%.*]] = zext i1 [[CMP]] to i32
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
Show All 16 Lines;
%cmp = icmp slt i32 %c, 2 %cmp = icmp slt i32 %c, 2
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test3() { define i32 @potential_test3() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test3() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test3()
; IS__TUNIT_OPM-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 0) ; IS__TUNIT_OPM-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 noundef 0)
; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]]) ; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]])
; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 1) ; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 noundef 1)
; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]]) ; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]])
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test3() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test3()
; IS__TUNIT_NPM-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 0) [[ATTR0:#.*]], [[RNG0:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 noundef 0) [[ATTR0:#.*]], [[RNG0:!range !.*]]
; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]]) [[ATTR0]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]]) [[ATTR0]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 1) [[ATTR0]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 noundef 1) [[ATTR0]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]]) [[ATTR0]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]]) [[ATTR0]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test3() ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test3()
; IS__CGSCC____-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 0) ; IS__CGSCC____-NEXT: [[CMP1:%.*]] = call i32 @iszero3(i32 noundef 0)
; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]]) ; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i32 @less_than_two(i32 [[CMP1]])
; IS__CGSCC____-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 1) ; IS__CGSCC____-NEXT: [[CMP2:%.*]] = call i32 @iszero3(i32 noundef 1)
; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]]) ; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i32 @less_than_two(i32 [[CMP2]])
; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]] ; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 [[TRUE1]], [[TRUE2]]
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%cmp1 = call i32 @iszero3(i32 0) %cmp1 = call i32 @iszero3(i32 0)
%true1 = call i32 @less_than_two(i32 %cmp1) %true1 = call i32 @less_than_two(i32 %cmp1)
%cmp2 = call i32 @iszero3(i32 1) %cmp2 = call i32 @iszero3(i32 1)
%true2 = call i32 @less_than_two(i32 %cmp2) %true2 = call i32 @less_than_two(i32 %cmp2)
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; ;
%cmp = icmp eq i32 %c, 4 %cmp = icmp eq i32 %c, 4
ret i1 %cmp ret i1 %cmp
} }
define internal i1 @wrapper(i32 %c) { define internal i1 @wrapper(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@wrapper ; IS__CGSCC____-LABEL: define {{[^@]+}}@wrapper
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[C:%.*]])
; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @cmp_with_four(i32 [[C]]) ; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @cmp_with_four(i32 noundef [[C]])
; IS__CGSCC____-NEXT: ret i1 [[RET]] ; IS__CGSCC____-NEXT: ret i1 [[RET]]
; ;
%ret = call i1 @cmp_with_four(i32 %c) %ret = call i1 @cmp_with_four(i32 %c)
ret i1 %ret ret i1 %ret
} }
define i1 @potential_test8() { define i1 @potential_test8() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test8() ; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test8()
; IS__TUNIT____-NEXT: ret i1 false ; IS__TUNIT____-NEXT: ret i1 false
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test8() ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test8()
; IS__CGSCC____-NEXT: [[RES1:%.*]] = call i1 @wrapper(i32 1) ; IS__CGSCC____-NEXT: [[RES1:%.*]] = call i1 @wrapper(i32 noundef 1)
; IS__CGSCC____-NEXT: [[RES3:%.*]] = call i1 @wrapper(i32 3) ; IS__CGSCC____-NEXT: [[RES3:%.*]] = call i1 @wrapper(i32 noundef 3)
; IS__CGSCC____-NEXT: [[RES5:%.*]] = call i1 @wrapper(i32 5) ; IS__CGSCC____-NEXT: [[RES5:%.*]] = call i1 @wrapper(i32 noundef 5)
; IS__CGSCC____-NEXT: [[RES13:%.*]] = or i1 [[RES1]], [[RES3]] ; IS__CGSCC____-NEXT: [[RES13:%.*]] = or i1 [[RES1]], [[RES3]]
; IS__CGSCC____-NEXT: [[RES135:%.*]] = or i1 [[RES13]], [[RES5]] ; IS__CGSCC____-NEXT: [[RES135:%.*]] = or i1 [[RES13]], [[RES5]]
; IS__CGSCC____-NEXT: ret i1 [[RES135]] ; IS__CGSCC____-NEXT: ret i1 [[RES135]]
; ;
%res1 = call i1 @wrapper(i32 1) %res1 = call i1 @wrapper(i32 1)
%res3 = call i1 @wrapper(i32 3) %res3 = call i1 @wrapper(i32 3)
%res5 = call i1 @wrapper(i32 5) %res5 = call i1 @wrapper(i32 5)
%res13 = or i1 %res1, %res3 %res13 = or i1 %res1, %res3
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ret i32 %poison ret i32 %poison
} }
; FIXME: returned value can be simplified to 0 ; FIXME: returned value can be simplified to 0
define i32 @potential_test12(i1 %c) { define i32 @potential_test12(i1 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test12 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test12
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]])
; IS__TUNIT_OPM-NEXT: [[ZERO:%.*]] = call i32 @optimize_poison_1(i1 [[C]]) [[ATTR0]], [[RNG3]] ; IS__TUNIT_OPM-NEXT: [[ZERO:%.*]] = call noundef i32 @optimize_poison_1(i1 [[C]]) [[ATTR0]], [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[ZERO]] ; IS__TUNIT_OPM-NEXT: ret i32 [[ZERO]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test12 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test12
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]])
; IS__TUNIT_NPM-NEXT: ret i32 0 ; IS__TUNIT_NPM-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test12 ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test12
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[ZERO:%.*]] = call i32 @optimize_poison_1(i1 [[C]]) ; IS__CGSCC____-NEXT: [[ZERO:%.*]] = call noundef i32 @optimize_poison_1(i1 [[C]])
; IS__CGSCC____-NEXT: ret i32 [[ZERO]] ; IS__CGSCC____-NEXT: ret i32 [[ZERO]]
; ;
%zero = call i32 @optimize_poison_1(i1 %c) %zero = call i32 @optimize_poison_1(i1 %c)
ret i32 %zero ret i32 %zero
} }
; Test 13 ; Test 13
; Do not simplify %ret in the callee to `%c`. ; Do not simplify %ret in the callee to `%c`.
Show All 15 Lines
; ;
%ret = and i32 %c, 3 %ret = and i32 %c, 3
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller1() { define i32 @potential_test13_caller1() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller1() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller1()
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 0) [[ATTR0]], [[RNG2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) [[ATTR0]], [[RNG2]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller1() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller1()
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 0) [[ATTR0]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) [[ATTR0]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test13_caller1() ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test13_caller1()
; IS__CGSCC____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 0) ; IS__CGSCC____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0)
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%ret = call i32 @potential_test13_callee(i32 0) %ret = call i32 @potential_test13_callee(i32 0)
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller2() { define i32 @potential_test13_caller2() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller2() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller2()
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 1) [[ATTR0]], [[RNG2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) [[ATTR0]], [[RNG2]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller2() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller2()
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 1) [[ATTR0]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) [[ATTR0]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test13_caller2() ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test13_caller2()
; IS__CGSCC____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 1) ; IS__CGSCC____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1)
; IS__CGSCC____-NEXT: ret i32 [[RET]] ; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%ret = call i32 @potential_test13_callee(i32 1) %ret = call i32 @potential_test13_callee(i32 1)
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller3() { define i32 @potential_test13_caller3() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
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llvm/test/Transforms/Attributor/range.ll

Show First 20 Lines • Show All 61 Lines • ▼ Show 20 Linesdefine void @test0-icmp-check(i32* %p){
; ret = [0, 10) ; ret = [0, 10)
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]])
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR3]], [[RNG0]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR3]], [[RNG0]]
; IS__TUNIT_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__TUNIT_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__TUNIT_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 ; IS__TUNIT_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 false) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__TUNIT_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 ; IS__TUNIT_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__TUNIT_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 ; IS__TUNIT_OPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 true) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true)
; IS__TUNIT_OPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 ; IS__TUNIT_OPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 false, i1 false, i1 [[CMP_UGT_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 false) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false)
; IS__TUNIT_OPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 ; IS__TUNIT_OPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9
; IS__TUNIT_OPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 true, i1 false) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false)
; IS__TUNIT_OPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 ; IS__TUNIT_OPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 false, i1 false, i1 [[CMP_SGT_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 true) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true)
; IS__TUNIT_OPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 ; IS__TUNIT_OPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9
; IS__TUNIT_OPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 true, i1 true) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true)
; IS__TUNIT_OPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 ; IS__TUNIT_OPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9
; IS__TUNIT_OPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 false, i1 false) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false)
; IS__TUNIT_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__TUNIT_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__TUNIT_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__TUNIT_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__TUNIT_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__TUNIT_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 true, i1 true, i1 [[CMP_LTE_3]]) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 false) ; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]])
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2]], [[RNG0]] ; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) [[ATTR2]], [[RNG0]]
; IS__TUNIT_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__TUNIT_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__TUNIT_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 ; IS__TUNIT_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__TUNIT_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 true) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true)
; IS__TUNIT_NPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 false, i1 false, i1 [[CMP_UGT_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 ; IS__TUNIT_NPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9
; IS__TUNIT_NPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 true, i1 false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 false, i1 false, i1 [[CMP_SGT_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 true) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true)
; IS__TUNIT_NPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 ; IS__TUNIT_NPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9
; IS__TUNIT_NPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 true, i1 true) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true)
; IS__TUNIT_NPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 ; IS__TUNIT_NPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9
; IS__TUNIT_NPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 false, i1 false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false)
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__TUNIT_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__TUNIT_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 true, i1 true, i1 [[CMP_LTE_3]]) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 false) ; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) ; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P:%.*]])
; IS__CGSCC____-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]]) ; IS__CGSCC____-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[P]])
; IS__CGSCC____-NEXT: [[CMP_EQ_1:%.*]] = icmp eq i32 [[RET]], 10 ; IS__CGSCC____-NEXT: [[CMP_EQ_1:%.*]] = icmp eq i32 [[RET]], 10
; IS__CGSCC____-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__CGSCC____-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__CGSCC____-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
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; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_1]], i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_1]], i1 [[CMP_NE_2]], i1 [[CMP_NE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 [[CMP_NE_6]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 [[CMP_NE_6]])
; IS__CGSCC____-NEXT: [[CMP_UGT_1:%.*]] = icmp ugt i32 [[RET]], 10 ; IS__CGSCC____-NEXT: [[CMP_UGT_1:%.*]] = icmp ugt i32 [[RET]], 10
; IS__CGSCC____-NEXT: [[CMP_UGT_2:%.*]] = icmp ugt i32 [[RET]], 9 ; IS__CGSCC____-NEXT: [[CMP_UGT_2:%.*]] = icmp ugt i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 ; IS__CGSCC____-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 ; IS__CGSCC____-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 ; IS__CGSCC____-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_1]], i1 [[CMP_UGT_2]], i1 [[CMP_UGT_3]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_1]], i1 [[CMP_UGT_2]], i1 [[CMP_UGT_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 false) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false)
; IS__CGSCC____-NEXT: [[CMP_UGE_1:%.*]] = icmp uge i32 [[RET]], 10 ; IS__CGSCC____-NEXT: [[CMP_UGE_1:%.*]] = icmp uge i32 [[RET]], 10
; IS__CGSCC____-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 ; IS__CGSCC____-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 ; IS__CGSCC____-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 ; IS__CGSCC____-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_UGE_6:%.*]] = icmp uge i32 [[RET]], -1 ; IS__CGSCC____-NEXT: [[CMP_UGE_6:%.*]] = icmp uge i32 [[RET]], -1
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_1]], i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_1]], i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 true, i1 [[CMP_UGE_6]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 [[CMP_UGE_6]])
; IS__CGSCC____-NEXT: [[CMP_SGT_1:%.*]] = icmp sgt i32 [[RET]], 10 ; IS__CGSCC____-NEXT: [[CMP_SGT_1:%.*]] = icmp sgt i32 [[RET]], 10
; IS__CGSCC____-NEXT: [[CMP_SGT_2:%.*]] = icmp sgt i32 [[RET]], 9 ; IS__CGSCC____-NEXT: [[CMP_SGT_2:%.*]] = icmp sgt i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 ; IS__CGSCC____-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 ; IS__CGSCC____-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 ; IS__CGSCC____-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0
; IS__CGSCC____-NEXT: [[CMP_SGT_6:%.*]] = icmp sgt i32 [[RET]], -1 ; IS__CGSCC____-NEXT: [[CMP_SGT_6:%.*]] = icmp sgt i32 [[RET]], -1
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_1]], i1 [[CMP_SGT_2]], i1 [[CMP_SGT_3]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_1]], i1 [[CMP_SGT_2]], i1 [[CMP_SGT_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 [[CMP_SGT_6]]) ; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 [[CMP_SGT_6]])
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entry: entry:
%call = tail call i32 @test4-f2(i32 %u) %call = tail call i32 @test4-f2(i32 %u)
ret i32 %call ret i32 %call
} }
define dso_local i32 @test-5() { define dso_local i32 @test-5() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5()
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @rec(i32 0), [[RNG3:!range !.*]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @rec(i32 noundef 0), [[RNG3:!range !.*]]
; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test-5() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test-5()
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @rec(i32 0), [[RNG4:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @rec(i32 noundef 0), [[RNG4:!range !.*]]
; IS__TUNIT_NPM-NEXT: ret i32 [[CALL]] ; IS__TUNIT_NPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test-5() ; IS__CGSCC____-LABEL: define {{[^@]+}}@test-5()
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @rec(i32 0) ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call noundef i32 @rec(i32 noundef 0)
; IS__CGSCC____-NEXT: ret i32 [[CALL]] ; IS__CGSCC____-NEXT: ret i32 [[CALL]]
; ;
entry: entry:
%call = call i32 @rec(i32 0) %call = call i32 @rec(i32 0)
ret i32 %call ret i32 %call
} }
define internal i32 @rec(i32 %depth) { define internal i32 @rec(i32 %depth) {
; CHECK-LABEL: define {{[^@]+}}@rec ; CHECK-LABEL: define {{[^@]+}}@rec
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define i32 @simplify_callsite_argument(i1 %d) { define i32 @simplify_callsite_argument(i1 %d) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]]) ; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]])
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 [[C]]) [[ATTR2]], [[RNG3]] ; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 noundef [[C]]) [[ATTR2]], [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 false) [[ATTR2]], [[RNG3]] ; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 noundef false) [[ATTR2]], [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__TUNIT_NPM-SAME: (i1 [[D:%.*]]) ; IS__TUNIT_NPM-SAME: (i1 [[D:%.*]])
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS__TUNIT_NPM: t:
; IS__TUNIT_NPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 true) [[ATTR1]], [[RNG4]] ; IS__TUNIT_NPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 noundef true) [[ATTR1]], [[RNG4]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET1]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RET1]]
; IS__TUNIT_NPM: f: ; IS__TUNIT_NPM: f:
; IS__TUNIT_NPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 false) [[ATTR1]], [[RNG4]] ; IS__TUNIT_NPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 noundef false) [[ATTR1]], [[RNG4]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET2]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RET2]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]]) ; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]])
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 [[C]]) ; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]])
; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 false) ; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false)
; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__CGSCC_NPM-SAME: (i1 [[D:%.*]]) ; IS__CGSCC_NPM-SAME: (i1 [[D:%.*]])
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t: ; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: [[RET1:%.*]] = call i32 @func(i1 true) ; IS__CGSCC_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true)
; IS__CGSCC_NPM-NEXT: ret i32 [[RET1]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RET1]]
; IS__CGSCC_NPM: f: ; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: [[RET2:%.*]] = call i32 @func(i1 false) ; IS__CGSCC_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false)
; IS__CGSCC_NPM-NEXT: ret i32 [[RET2]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RET2]]
; ;
%c = select i1 %d, i1 true, i1 false %c = select i1 %d, i1 true, i1 false
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%ret1 = call i32 @func(i1 %c) %ret1 = call i32 @func(i1 %c)
ret i32 %ret1 ret i32 %ret1
f: f:
Show All 35 Lines;
ret i1 %cmp ret i1 %cmp
} }
; FIXME: returned value can be simplified to i1 true ; FIXME: returned value can be simplified to i1 true
define i1 @check_divided_range(i32 %arg) { define i1 @check_divided_range(i32 %arg) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@check_divided_range ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@check_divided_range
; IS__TUNIT_OPM-SAME: (i32 [[ARG:%.*]]) ; IS__TUNIT_OPM-SAME: (i32 [[ARG:%.*]])
; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 0) ; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 noundef 0)
; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]]) ; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]])
; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]]) ; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]])
; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]]) ; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]])
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_OPM-NEXT: ret i1 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i1 [[RET]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@check_divided_range ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@check_divided_range
; IS__TUNIT_NPM-SAME: (i32 [[ARG:%.*]]) ; IS__TUNIT_NPM-SAME: (i32 [[ARG:%.*]])
; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 0) [[ATTR1]], [[RNG6:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 noundef 0) [[ATTR1]], [[RNG6:!range !.*]]
; IS__TUNIT_NPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]]) [[ATTR1]], [[RNG6]] ; IS__TUNIT_NPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]]) [[ATTR1]], [[RNG6]]
; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]]) ; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]])
; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]]) ; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]])
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_NPM-NEXT: ret i1 [[RET]] ; IS__TUNIT_NPM-NEXT: ret i1 [[RET]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@check_divided_range ; IS__CGSCC____-LABEL: define {{[^@]+}}@check_divided_range
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) ; IS__CGSCC____-SAME: (i32 [[ARG:%.*]])
; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 0) ; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @less_than_65536(i32 noundef 0)
; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]]) ; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @less_than_65536(i32 [[ARG]])
; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]]) ; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET1]])
; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]]) ; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_65536(i32 [[CSRET2]])
; IS__CGSCC____-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__CGSCC____-NEXT: [[RET:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__CGSCC____-NEXT: ret i1 [[RET]] ; IS__CGSCC____-NEXT: ret i1 [[RET]]
; ;
%csret1 = call i32 @less_than_65536(i32 0) %csret1 = call i32 @less_than_65536(i32 0)
%csret2 = call i32 @less_than_65536(i32 %arg) %csret2 = call i32 @less_than_65536(i32 %arg)
Show All 37 Lines;
ret i1 %cmp ret i1 %cmp
} }
; FIXME: returned value can be simplified to i1 true ; FIXME: returned value can be simplified to i1 true
define i1 @check_casted_range(i1 %c) { define i1 @check_casted_range(i1 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@check_casted_range ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@check_casted_range
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]])
; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @cast_and_return(i1 true) ; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @cast_and_return(i1 noundef true)
; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @cast_and_return(i1 [[C]]) ; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @cast_and_return(i1 [[C]])
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i32 [[CSRET1]], [[CSRET2]] ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i32 [[CSRET1]], [[CSRET2]]
; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i1 @is_less_than_3(i32 [[ADD]]) ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i1 @is_less_than_3(i32 [[ADD]])
; IS__TUNIT_OPM-NEXT: ret i1 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i1 [[RET]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@check_casted_range ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@check_casted_range
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]])
; IS__TUNIT_NPM-NEXT: ret i1 true ; IS__TUNIT_NPM-NEXT: ret i1 true
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@check_casted_range ; IS__CGSCC____-LABEL: define {{[^@]+}}@check_casted_range
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) ; IS__CGSCC____-SAME: (i1 [[C:%.*]])
; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @cast_and_return(i1 true) ; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @cast_and_return(i1 noundef true)
; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @cast_and_return(i1 [[C]]) ; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @cast_and_return(i1 [[C]])
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add i32 [[CSRET1]], [[CSRET2]] ; IS__CGSCC____-NEXT: [[ADD:%.*]] = add i32 [[CSRET1]], [[CSRET2]]
; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @is_less_than_3(i32 [[ADD]]) ; IS__CGSCC____-NEXT: [[RET:%.*]] = call i1 @is_less_than_3(i32 [[ADD]])
; IS__CGSCC____-NEXT: ret i1 [[RET]] ; IS__CGSCC____-NEXT: ret i1 [[RET]]
; ;
%csret1 = call i32 @cast_and_return(i1 true) %csret1 = call i32 @cast_and_return(i1 true)
%csret2 = call i32 @cast_and_return(i1 %c) %csret2 = call i32 @cast_and_return(i1 %c)
%add = add i32 %csret1, %csret2 %add = add i32 %csret1, %csret2
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Linesonsix:
ret i32 6 ret i32 6
otherwise: otherwise:
ret i32 99 ret i32 99
} }
define internal i1 @is_less_than_100_1(i32 %c) { define internal i1 @is_less_than_100_1(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_1
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[C:%.*]])
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100
; IS__CGSCC____-NEXT: ret i1 [[CMP]] ; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; ;
%cmp = icmp slt i32 %c, 100 %cmp = icmp slt i32 %c, 100
ret i1 %cmp ret i1 %cmp
} }
define i1 @propagate_range1(i32 %c){ define i1 @propagate_range1(i32 %c){
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range1
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) ; IS__TUNIT____-SAME: (i32 [[C:%.*]])
; IS__TUNIT____-NEXT: ret i1 true ; IS__TUNIT____-NEXT: ret i1 true
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range1
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 [[C:%.*]])
; IS__CGSCC____-NEXT: [[CSRET:%.*]] = call i32 @less_than_100_1(i32 [[C]]) ; IS__CGSCC____-NEXT: [[CSRET:%.*]] = call i32 @less_than_100_1(i32 [[C]])
; IS__CGSCC____-NEXT: [[TRUE:%.*]] = call i1 @is_less_than_100_1(i32 [[CSRET]]) ; IS__CGSCC____-NEXT: [[TRUE:%.*]] = call i1 @is_less_than_100_1(i32 noundef [[CSRET]])
; IS__CGSCC____-NEXT: ret i1 [[TRUE]] ; IS__CGSCC____-NEXT: ret i1 [[TRUE]]
; ;
%csret = call i32 @less_than_100_1(i32 %c) %csret = call i32 @less_than_100_1(i32 %c)
%true = call i1 @is_less_than_100_1(i32 %csret) %true = call i1 @is_less_than_100_1(i32 %csret)
ret i1 %true ret i1 %true
} }
define internal i32 @less_than_100_2(i32 %c) { define internal i32 @less_than_100_2(i32 %c) {
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Linesonsix:
ret i32 6 ret i32 6
otherwise: otherwise:
ret i32 99 ret i32 99
} }
define internal i1 @is_less_than_100_2(i32 %c) { define internal i1 @is_less_than_100_2(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@is_less_than_100_2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@is_less_than_100_2
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) ; IS__TUNIT____-SAME: (i32 noundef [[C:%.*]])
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100 ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100
; IS__TUNIT____-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 noundef [[C:%.*]])
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 [[C]], 100
; IS__CGSCC____-NEXT: ret i1 [[CMP]] ; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; ;
%cmp = icmp slt i32 %c, 100 %cmp = icmp slt i32 %c, 100
ret i1 %cmp ret i1 %cmp
} }
; FIXME: returned value can be simplified to i1 true ; FIXME: returned value can be simplified to i1 true
define i1 @propagate_range2(i32 %c) { define i1 @propagate_range2(i32 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@propagate_range2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@propagate_range2
; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]]) ; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]])
; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_100_2(i32 0) [[ATTR2]], [[RNG5:!range !.*]] ; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call noundef i32 @less_than_100_2(i32 noundef 0) [[ATTR2]], [[RNG5:!range !.*]]
; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET1]]) ; IS__TUNIT_OPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET1]])
; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_100_2(i32 [[C]]) [[ATTR2]], [[RNG5]] ; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call noundef i32 @less_than_100_2(i32 [[C]]) [[ATTR2]], [[RNG5]]
; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET2]]) ; IS__TUNIT_OPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET2]])
; IS__TUNIT_OPM-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_OPM-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_OPM-NEXT: ret i1 [[TRUE]] ; IS__TUNIT_OPM-NEXT: ret i1 [[TRUE]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@propagate_range2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@propagate_range2
; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]]) ; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]])
; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @less_than_100_2(i32 0) [[ATTR1]], [[RNG7:!range !.*]] ; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call noundef i32 @less_than_100_2(i32 noundef 0) [[ATTR1]], [[RNG7:!range !.*]]
; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET1]]) ; IS__TUNIT_NPM-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET1]])
; IS__TUNIT_NPM-NEXT: [[CSRET2:%.*]] = call i32 @less_than_100_2(i32 [[C]]) [[ATTR1]], [[RNG7]] ; IS__TUNIT_NPM-NEXT: [[CSRET2:%.*]] = call noundef i32 @less_than_100_2(i32 [[C]]) [[ATTR1]], [[RNG7]]
; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET2]]) ; IS__TUNIT_NPM-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET2]])
; IS__TUNIT_NPM-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__TUNIT_NPM-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__TUNIT_NPM-NEXT: ret i1 [[TRUE]] ; IS__TUNIT_NPM-NEXT: ret i1 [[TRUE]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range2
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) ; IS__CGSCC____-SAME: (i32 [[C:%.*]])
; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @less_than_100_2(i32 0) ; IS__CGSCC____-NEXT: [[CSRET1:%.*]] = call i32 @less_than_100_2(i32 noundef 0)
; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET1]]) ; IS__CGSCC____-NEXT: [[TRUE1:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET1]])
; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @less_than_100_2(i32 [[C]]) ; IS__CGSCC____-NEXT: [[CSRET2:%.*]] = call i32 @less_than_100_2(i32 [[C]])
; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 [[CSRET2]]) ; IS__CGSCC____-NEXT: [[TRUE2:%.*]] = call i1 @is_less_than_100_2(i32 noundef [[CSRET2]])
; IS__CGSCC____-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]] ; IS__CGSCC____-NEXT: [[TRUE:%.*]] = and i1 [[TRUE1]], [[TRUE2]]
; IS__CGSCC____-NEXT: ret i1 [[TRUE]] ; IS__CGSCC____-NEXT: ret i1 [[TRUE]]
; ;
%csret1 = call i32 @less_than_100_2(i32 0) %csret1 = call i32 @less_than_100_2(i32 0)
%true1 = call i1 @is_less_than_100_2(i32 %csret1) %true1 = call i1 @is_less_than_100_2(i32 %csret1)
%csret2 = call i32 @less_than_100_2(i32 %c) %csret2 = call i32 @less_than_100_2(i32 %c)
%true2 = call i1 @is_less_than_100_2(i32 %csret2) %true2 = call i1 @is_less_than_100_2(i32 %csret2)
%true = and i1 %true1, %true2 %true = and i1 %true1, %true2
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llvm/test/Transforms/Attributor/readattrs.ll

Show First 20 Lines • Show All 160 Lines • ▼ Show 20 Lines
declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>) declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>)
; CHECK-NOT: readnone ; CHECK-NOT: readnone
; CHECK-NOT: readonly ; CHECK-NOT: readonly
define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) { define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) {
; CHECK: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; CHECK-LABEL: define {{[^@]+}}@test9 ; CHECK-LABEL: define {{[^@]+}}@test9
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]])
; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 4, <4 x i1> <i1 true, i1 false, i1 true, i1 false>) ; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>) call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>)
ret void ret void
} }
; CHECK: declare <4 x i32> @llvm.masked.gather ; CHECK: declare <4 x i32> @llvm.masked.gather
declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>) declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>)
define <4 x i32> @test10(<4 x i32*> %ptrs) { define <4 x i32> @test10(<4 x i32*> %ptrs) {
; CHECK: Function Attrs: nounwind readonly willreturn ; CHECK: Function Attrs: nounwind readonly willreturn
; CHECK-LABEL: define {{[^@]+}}@test10 ; CHECK-LABEL: define {{[^@]+}}@test10
; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]])
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 4, <4 x i1> <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef)
; CHECK-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef) %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef)
ret <4 x i32> %res ret <4 x i32> %res
} }
; CHECK: declare <4 x i32> @test11_1 ; CHECK: declare <4 x i32> @test11_1
declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly
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llvm/test/Transforms/Attributor/returned.ll

Show First 20 Lines • Show All 1,351 Lines • ▼ Show 20 Lines
; We can use the alignment information of the weak function non_exact_3 argument ; We can use the alignment information of the weak function non_exact_3 argument
; because it was given to us and not derived. ; because it was given to us and not derived.
; We can use the return information of the weak function non_exact_4. ; We can use the return information of the weak function non_exact_4.
; FIXME: %c2 and %c3 should be replaced but not %c0 or %c1! ; FIXME: %c2 and %c3 should be replaced but not %c0 or %c1!
define i32 @exact(i32* align 8 %a, i32* align 8 %b) { define i32 @exact(i32* align 8 %a, i32* align 8 %b) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@exact ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@exact
; NOT_CGSCC_NPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]]) ; NOT_CGSCC_NPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]])
; NOT_CGSCC_NPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0() ; NOT_CGSCC_NPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0()
; NOT_CGSCC_NPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 1) ; NOT_CGSCC_NPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 noundef 1)
; NOT_CGSCC_NPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 2) ; NOT_CGSCC_NPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 noundef 2)
; NOT_CGSCC_NPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]]) ; NOT_CGSCC_NPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]])
; NOT_CGSCC_NPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]]) ; NOT_CGSCC_NPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]])
; NOT_CGSCC_NPM-NEXT: [[C3L:%.*]] = load i32, i32* [[C3]], align 32 ; NOT_CGSCC_NPM-NEXT: [[C3L:%.*]] = load i32, i32* [[C3]], align 32
; NOT_CGSCC_NPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16 ; NOT_CGSCC_NPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16
; NOT_CGSCC_NPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]] ; NOT_CGSCC_NPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]]
; NOT_CGSCC_NPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[C2]] ; NOT_CGSCC_NPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], [[C2]]
; NOT_CGSCC_NPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]] ; NOT_CGSCC_NPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]]
; NOT_CGSCC_NPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]] ; NOT_CGSCC_NPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]]
; NOT_CGSCC_NPM-NEXT: ret i32 [[ADD4]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[ADD4]]
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@exact ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@exact
; IS__CGSCC_NPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]]) ; IS__CGSCC_NPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]])
; IS__CGSCC_NPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0() ; IS__CGSCC_NPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0()
; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 1) ; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 noundef 1)
; IS__CGSCC_NPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 2) ; IS__CGSCC_NPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 noundef 2)
; IS__CGSCC_NPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]]) ; IS__CGSCC_NPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]])
; IS__CGSCC_NPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]]) ; IS__CGSCC_NPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]])
; IS__CGSCC_NPM-NEXT: [[C3L:%.*]] = load i32, i32* [[C3]], align 32 ; IS__CGSCC_NPM-NEXT: [[C3L:%.*]] = load i32, i32* [[C3]], align 32
; IS__CGSCC_NPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16 ; IS__CGSCC_NPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16
; IS__CGSCC_NPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]] ; IS__CGSCC_NPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]]
; IS__CGSCC_NPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], 2 ; IS__CGSCC_NPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], 2
; IS__CGSCC_NPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]] ; IS__CGSCC_NPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]]
; IS__CGSCC_NPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]] ; IS__CGSCC_NPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]]
▲ Show 20 Lines • Show All 102 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/value-simplify.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-attributes
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
declare void @f(i32) declare void @f(i32)
declare token @llvm.call.preallocated.setup(i32) declare token @llvm.call.preallocated.setup(i32)
declare i8* @llvm.call.preallocated.arg(token, i32) declare i8* @llvm.call.preallocated.arg(token, i32)
; Test1: Replace argument with constant ; Test1: Replace argument with constant
define internal void @test1(i32 %a) { define internal void @test1(i32 %a) {
; CHECK-LABEL: define {{[^@]+}}@test1() ; CHECK-LABEL: define {{[^@]+}}@test1()
; CHECK-NEXT: tail call void @f(i32 1) ; CHECK-NEXT: tail call void @f(i32 noundef 1)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
tail call void @f(i32 %a) tail call void @f(i32 %a)
ret void ret void
} }
define void @test1_helper() { define void @test1_helper() {
; CHECK-LABEL: define {{[^@]+}}@test1_helper() ; CHECK-LABEL: define {{[^@]+}}@test1_helper()
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; CHECK-SAME: (i1 [[C:%.*]]) ; CHECK-SAME: (i1 [[C:%.*]])
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; CHECK: if.true: ; CHECK: if.true:
; CHECK-NEXT: br label [[END:%.*]] ; CHECK-NEXT: br label [[END:%.*]]
; CHECK: if.false: ; CHECK: if.false:
; CHECK-NEXT: br label [[END]] ; CHECK-NEXT: br label [[END]]
; CHECK: end: ; CHECK: end:
; CHECK-NEXT: [[R:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ] ; CHECK-NEXT: [[R:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; CHECK-NEXT: tail call void @use(i32 1) ; CHECK-NEXT: tail call void @use(i32 noundef 1)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
br i1 %c, label %if.true, label %if.false br i1 %c, label %if.true, label %if.false
if.true: if.true:
br label %end br label %end
if.false: if.false:
%ret1 = tail call i32 @return1() %ret1 = tail call i32 @return1()
br label %end br label %end
end: end:
%r = phi i32 [ 1, %if.true ], [ %ret1, %if.false ] %r = phi i32 [ 1, %if.true ], [ %ret1, %if.false ]
tail call void @use(i32 %r) tail call void @use(i32 %r)
ret void ret void
} }
define void @test-select-phi(i1 %c) { define void @test-select-phi(i1 %c) {
; CHECK-LABEL: define {{[^@]+}}@test-select-phi ; CHECK-LABEL: define {{[^@]+}}@test-select-phi
; CHECK-SAME: (i1 [[C:%.*]]) ; CHECK-SAME: (i1 [[C:%.*]])
; CHECK-NEXT: tail call void @use(i32 1) ; CHECK-NEXT: tail call void @use(i32 noundef 1)
; CHECK-NEXT: [[SELECT_NOT_SAME:%.*]] = select i1 [[C]], i32 1, i32 0 ; CHECK-NEXT: [[SELECT_NOT_SAME:%.*]] = select i1 [[C]], i32 1, i32 0
; CHECK-NEXT: tail call void @use(i32 [[SELECT_NOT_SAME]]) ; CHECK-NEXT: tail call void @use(i32 noundef [[SELECT_NOT_SAME]])
; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; CHECK: if-true: ; CHECK: if-true:
; CHECK-NEXT: br label [[END:%.*]] ; CHECK-NEXT: br label [[END:%.*]]
; CHECK: if-false: ; CHECK: if-false:
; CHECK-NEXT: br label [[END]] ; CHECK-NEXT: br label [[END]]
; CHECK: end: ; CHECK: end:
; CHECK-NEXT: [[PHI_SAME:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ] ; CHECK-NEXT: [[PHI_SAME:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; CHECK-NEXT: [[PHI_NOT_SAME:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ] ; CHECK-NEXT: [[PHI_NOT_SAME:%.*]] = phi i32 [ 0, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; CHECK-NEXT: [[PHI_SAME_PROP:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ] ; CHECK-NEXT: [[PHI_SAME_PROP:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; CHECK-NEXT: [[PHI_SAME_UNDEF:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ undef, [[IF_FALSE]] ] ; CHECK-NEXT: [[PHI_SAME_UNDEF:%.*]] = phi i32 [ 1, [[IF_TRUE]] ], [ undef, [[IF_FALSE]] ]
; CHECK-NEXT: [[SELECT_NOT_SAME_UNDEF:%.*]] = select i1 [[C]], i32 [[PHI_NOT_SAME]], i32 undef ; CHECK-NEXT: [[SELECT_NOT_SAME_UNDEF:%.*]] = select i1 [[C]], i32 [[PHI_NOT_SAME]], i32 undef
; CHECK-NEXT: tail call void @use(i32 1) ; CHECK-NEXT: tail call void @use(i32 noundef 1)
; CHECK-NEXT: tail call void @use(i32 [[PHI_NOT_SAME]]) ; CHECK-NEXT: tail call void @use(i32 noundef [[PHI_NOT_SAME]])
; CHECK-NEXT: tail call void @use(i32 1) ; CHECK-NEXT: tail call void @use(i32 noundef 1)
; CHECK-NEXT: tail call void @use(i32 1) ; CHECK-NEXT: tail call void @use(i32 1)
; CHECK-NEXT: tail call void @use(i32 [[SELECT_NOT_SAME_UNDEF]]) ; CHECK-NEXT: tail call void @use(i32 [[SELECT_NOT_SAME_UNDEF]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%select-same = select i1 %c, i32 1, i32 1 %select-same = select i1 %c, i32 1, i32 1
tail call void @use(i32 %select-same) tail call void @use(i32 %select-same)
%select-not-same = select i1 %c, i32 1, i32 0 %select-not-same = select i1 %c, i32 1, i32 0
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define i1 @ipccp2() { define i1 @ipccp2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp2() ; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp2()
; IS__TUNIT____-NEXT: ret i1 true ; IS__TUNIT____-NEXT: ret i1 true
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2() ; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2()
; IS__CGSCC____-NEXT: [[R:%.*]] = call i1 @ipccp2i() ; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i1 @ipccp2i()
; IS__CGSCC____-NEXT: ret i1 [[R]] ; IS__CGSCC____-NEXT: ret i1 [[R]]
; ;
%r = call i1 @ipccp2i(i1 true) %r = call i1 @ipccp2i(i1 true)
ret i1 %r ret i1 %r
} }
define internal i1 @ipccp2ib(i1 %a) { define internal i1 @ipccp2ib(i1 %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
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define i32 @ipccp3() { define i32 @ipccp3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp3() ; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp3()
; IS__TUNIT____-NEXT: ret i32 7 ; IS__TUNIT____-NEXT: ret i32 7
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp3() ; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp3()
; IS__CGSCC____-NEXT: [[R:%.*]] = call i32 @ipccp3i() ; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i32 @ipccp3i()
; IS__CGSCC____-NEXT: ret i32 [[R]] ; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
%r = call i32 @ipccp3i(i32 7) %r = call i32 @ipccp3i(i32 7)
ret i32 %r ret i32 %r
} }
; Do not touch complicated arguments (for now) ; Do not touch complicated arguments (for now)
%struct.X = type { i8* } %struct.X = type { i8* }
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; IS__CGSCC____-SAME: (i32* noalias nofree noundef returned writeonly preallocated(i32) align 536870912 "no-capture-maybe-returned" [[A:%.*]]) ; IS__CGSCC____-SAME: (i32* noalias nofree noundef returned writeonly preallocated(i32) align 536870912 "no-capture-maybe-returned" [[A:%.*]])
; IS__CGSCC____-NEXT: ret i32* [[A]] ; IS__CGSCC____-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_preallocated() { define i32* @complicated_args_preallocated() {
; IS__TUNIT_OPM: Function Attrs: nounwind ; IS__TUNIT_OPM: Function Attrs: nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated() ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated()
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 1) ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1)
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR5:#.*]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR5:#.*]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nounwind ; IS__TUNIT_NPM: Function Attrs: nounwind
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated() ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated()
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 1) ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1)
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR4:#.*]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR4:#.*]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated() ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated()
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 1) ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1)
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR6:#.*]] [ "preallocated"(token [[C]]) ] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR6:#.*]] [ "preallocated"(token [[C]]) ]
; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated() ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated()
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 1) ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1)
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR5:#.*]] [ "preallocated"(token [[C]]) ] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 536870912 null) [[ATTR5:#.*]] [ "preallocated"(token [[C]]) ]
; IS__CGSCC_NPM-NEXT: ret i32* [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i32* [[CALL]]
; ;
%c = call token @llvm.call.preallocated.setup(i32 1) %c = call token @llvm.call.preallocated.setup(i32 1)
%call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)] %call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)]
ret i32* %call ret i32* %call
} }
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; Check we merge undef and a constant properly. ; Check we merge undef and a constant properly.
define i8 @caller0() { define i8 @caller0() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller0() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller0()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller0() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller0()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller1() { define i8 @caller1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller1() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller1()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller1() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller1()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller2() { define i8 @caller2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller_middle() { define i8 @caller_middle() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller_middle() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller_middle()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller_middle() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller_middle()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 42) %c = call i8 @callee(i8 42)
ret i8 %c ret i8 %c
} }
define i8 @caller3() { define i8 @caller3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller3() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller3()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller3() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller3()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller4() { define i8 @caller4() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller4() ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller4()
; IS__TUNIT____-NEXT: ret i8 49 ; IS__TUNIT____-NEXT: ret i8 49
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller4() ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller4()
; IS__CGSCC____-NEXT: [[C:%.*]] = call i8 @callee() ; IS__CGSCC____-NEXT: [[C:%.*]] = call noundef i8 @callee()
; IS__CGSCC____-NEXT: ret i8 [[C]] ; IS__CGSCC____-NEXT: ret i8 [[C]]
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define internal i8 @callee(i8 %a) { define internal i8 @callee(i8 %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee() ; IS__CGSCC____-LABEL: define {{[^@]+}}@callee()
; IS__CGSCC____-NEXT: ret i8 49 ; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = add i8 %a, 7 %c = add i8 %a, 7
ret i8 %c ret i8 %c
} }

llvm/test/Transforms/Attributor/willreturn.ll

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; } ; }
; void mutual_recursion2(){ ; void mutual_recursion2(){
; mutual_recursion1(); ; mutual_recursion1();
; } ; }
declare void @sink() nounwind willreturn nosync nofree declare void @sink() nounwind willreturn nosync nofree
define void @mutual_recursion1(i1 %c) #0 { define void @mutual_recursion1(i1 %c) #0 {
; CHECK: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; CHECK-LABEL: define {{[^@]+}}@mutual_recursion1 ; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion1
; CHECK-SAME: (i1 [[C:%.*]]) ; IS________OPM-SAME: (i1 [[C:%.*]])
; CHECK-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; CHECK: rec: ; IS________OPM: rec:
; CHECK-NEXT: call void @sink() ; IS________OPM-NEXT: call void @sink()
; CHECK-NEXT: call void @mutual_recursion2(i1 [[C]]) ; IS________OPM-NEXT: call void @mutual_recursion2(i1 [[C]])
; CHECK-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; CHECK: end: ; IS________OPM: end:
; CHECK-NEXT: ret void ; IS________OPM-NEXT: ret void
;
; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS________NPM-SAME: (i1 [[C:%.*]])
; IS________NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS________NPM: rec:
; IS________NPM-NEXT: call void @sink()
; IS________NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]])
; IS________NPM-NEXT: br label [[END]]
; IS________NPM: end:
; IS________NPM-NEXT: ret void
; ;
br i1 %c, label %rec, label %end br i1 %c, label %rec, label %end
rec: rec:
call void @sink() call void @sink()
call void @mutual_recursion2(i1 %c) call void @mutual_recursion2(i1 %c)
br label %end br label %end
end: end:
ret void ret void
Show All 16 Lines
; call exit/abort (has noreturn attribute) ; call exit/abort (has noreturn attribute)
; CHECK: Function Attrs: noreturn ; CHECK: Function Attrs: noreturn
; CHECK-NEXT: declare void @exit(i32) local_unnamed_add ; CHECK-NEXT: declare void @exit(i32) local_unnamed_add
declare void @exit(i32 %0) local_unnamed_addr noreturn declare void @exit(i32 %0) local_unnamed_addr noreturn
define void @only_exit() local_unnamed_addr #0 { define void @only_exit() local_unnamed_addr #0 {
; CHECK: Function Attrs: noinline noreturn nounwind uwtable ; CHECK: Function Attrs: noinline noreturn nounwind uwtable
; CHECK-LABEL: define {{[^@]+}}@only_exit() local_unnamed_addr ; CHECK-LABEL: define {{[^@]+}}@only_exit() local_unnamed_addr
; CHECK-NEXT: tail call void @exit(i32 0) ; CHECK-NEXT: tail call void @exit(i32 noundef 0)
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; ;
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
; conditional exit ; conditional exit
; void conditional_exit(int cond, int *p){ ; void conditional_exit(int cond, int *p){
; if(cond){ ; if(cond){
; exit(0); ; exit(0);
; } ; }
; if(*p){ ; if(*p){
; exit(1); ; exit(1);
; } ; }
; return; ; return;
; } ; }
define void @conditional_exit(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 { define void @conditional_exit(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 {
; CHECK: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; CHECK-LABEL: define {{[^@]+}}@conditional_exit ; CHECK-LABEL: define {{[^@]+}}@conditional_exit
; CHECK-SAME: (i32 [[TMP0:%.*]], i32* nocapture readonly [[TMP1:%.*]]) local_unnamed_addr ; CHECK-SAME: (i32 [[TMP0:%.*]], i32* nocapture readonly [[TMP1:%.*]]) local_unnamed_addr
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]]
; CHECK: 4: ; CHECK: 4:
; CHECK-NEXT: tail call void @exit(i32 0) ; CHECK-NEXT: tail call void @exit(i32 noundef 0)
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: 5: ; CHECK: 5:
; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0 ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; CHECK-NEXT: br i1 [[TMP7]], label [[TMP9:%.*]], label [[TMP8:%.*]] ; CHECK-NEXT: br i1 [[TMP7]], label [[TMP9:%.*]], label [[TMP8:%.*]]
; CHECK: 8: ; CHECK: 8:
; CHECK-NEXT: tail call void @exit(i32 1) ; CHECK-NEXT: tail call void @exit(i32 noundef 1)
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: 9: ; CHECK: 9:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%3 = icmp eq i32 %0, 0 %3 = icmp eq i32 %0, 0
br i1 %3, label %5, label %4 br i1 %3, label %5, label %4
; <label>:4: ; preds = %2 ; <label>:4: ; preds = %2
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} }
;15.2 ;15.2
define void @unreachable_exit_negative1() #0 { define void @unreachable_exit_negative1() #0 {
; CHECK: Function Attrs: noinline noreturn nounwind uwtable ; CHECK: Function Attrs: noinline noreturn nounwind uwtable
; CHECK-LABEL: define {{[^@]+}}@unreachable_exit_negative1() ; CHECK-LABEL: define {{[^@]+}}@unreachable_exit_negative1()
; CHECK-NEXT: tail call void @exit(i32 0) ; CHECK-NEXT: tail call void @exit(i32 noundef 0)
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: unreachable_label: ; CHECK: unreachable_label:
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; ;
tail call void @exit(i32 0) tail call void @exit(i32 0)
ret void ret void
unreachable_label: unreachable_label:
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