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[CSSPGO] MIR target-independent pseudo instruction for pseudo-probe intrinsic
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Authored by hoy on Aug 24 2020, 4:56 PM.

Details

Reviewers
davidxl
wmi
wenlei
Summary

This change introduces a MIR target-independent pseudo instruction corresponding to the IR intrinsic llvm.pseudoprobe for pseudo-probe block instrumentation. Please refer to https://reviews.llvm.org/D86193 for the whole story.

An llvm.pseudoprobe intrinsic call will be lowered into a target-independent operation named PSEUDO_PROBE. Given the following instrumented IR,

define internal void @foo2(i32 %x, void (i32)* %f) !dbg !4 {
bb0:
   %cmp = icmp eq i32 %x, 0
   call void @llvm.pseudoprobe(i64 837061429793323041, i64 1)
   br i1 %cmp, label %bb1, label %bb2
bb1:                                             
   call void @llvm.pseudoprobe(i64 837061429793323041, i64 2)
   br label %bb3
bb2:                                              
   call void @llvm.pseudoprobe(i64 837061429793323041, i64 3)
   br label %bb3
bb3:                                              
   call void @llvm.pseudoprobe(i64 837061429793323041, i64 4)
   ret void
}

the corresponding MIR is shown below. Note that block bb3 is duplicated into bb1 and bb2 where its probe is duplicated too. This allows for an accurate execution count to be collected for bb3, which is basically the sum of the counts of bb1 and bb2.

bb.0.bb0:
   frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
   TEST32rr killed renamable $edi, renamable $edi, implicit-def $eflags
   PSEUDO_PROBE 837061429793323041, 1, 0
   $edi = MOV32ri 1, debug-location !13; test.c:0
   JCC_1 %bb.1, 4, implicit $eflags

bb.2.bb2:
   PSEUDO_PROBE 837061429793323041, 3, 0
   PSEUDO_PROBE 837061429793323041, 4, 0
   $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp
   RETQ

bb.1.bb1:
   PSEUDO_PROBE 837061429793323041, 2, 0
   PSEUDO_PROBE 837061429793323041, 4, 0
   $rax = frame-destroy POP64r implicit-def $rsp, implicit $rsp
   RETQ

The target op PSEUDO_PROBE will be converted into a piece of binary data by the object emitter with no machine instructions generated. This is done in a different patch.

Diff Detail

Event Timeline

hoy created this revision.Aug 24 2020, 4:56 PM
Herald added a project: Restricted Project. · View Herald TranscriptAug 24 2020, 4:56 PM
hoy requested review of this revision.Aug 24 2020, 4:56 PM
hoy edited the summary of this revision. (Show Details)Aug 24 2020, 5:03 PM
hoy edited the summary of this revision. (Show Details)
hoy updated this revision to Diff 287524.Aug 24 2020, 5:14 PM

Updating D86495: [CSSPGO] MIR target-independent pseudo instruction for pseudo-probe intrinsic

hoy added a comment.Aug 24 2020, 5:26 PM

@wmi Do you know how to chain this patch with my previous patch https://reviews.llvm.org/D86490 so that the two patches can be tested together? Thanks.

I don't know since I don't use arc.

wmi added a comment.Sep 9 2020, 9:02 PM

It is better to have a MIR test.

hoy added a comment.Sep 9 2020, 9:46 PM
In D86495#2264868, @wmi wrote:

It is better to have a MIR test.

Yeah, the test is actually included in https://reviews.llvm.org/D86499. It tests both the IR and MIR change.

wmi added a comment.Sep 9 2020, 9:51 PM
In D86495#2264877, @hoy wrote:
In D86495#2264868, @wmi wrote:

It is better to have a MIR test.

Yeah, the test is actually included in https://reviews.llvm.org/D86499. It tests both the IR and MIR change.

I mean to have a .mir test which read MIR as input. That is to ensure llc read MIR text containing the new pseudo probe without problem.

hoy added a comment.Sep 10 2020, 11:03 AM
In D86495#2264881, @wmi wrote:
In D86495#2264877, @hoy wrote:
In D86495#2264868, @wmi wrote:

It is better to have a MIR test.

Yeah, the test is actually included in https://reviews.llvm.org/D86499. It tests both the IR and MIR change.

I mean to have a .mir test which read MIR as input. That is to ensure llc read MIR text containing the new pseudo probe without problem.

I see. Added a .mir test.

hoy updated this revision to Diff 291031.Sep 10 2020, 11:04 AM

Updating D86495: [CSSPGO] MIR target-independent pseudo instruction for pseudo-probe intrinsic