[x86] prevent 64b operands to "r" constrained inline asm for -m32

[nickdesaulniers]

Summary

As pointed out by David Woodhouse and Akira Hatanaka in
https://bugs.llvm.org/show_bug.cgi?id=33587, Clang was inconsistent with
GCC validating inline asm constraints for -m32. For -m32 Clang was
disallowing 64b inputs/outputs to inline asm with "q" constraints, but
not for "r" constraints. This change improves Clang's validations to
match GCC's.

Adds a test case in x86_32-inline-asm.c, and fixes up previous tests
that used "r"+64b operands+32b x86 targets.

[craig.topper]

I'm trying to catch up here. It looks like gcc has only started complaining about this from maybe version 7 on? And only as a warning?

The LLVM X86 backend used a 32-bit register for 'r' or 'R' on -m32 for 64-bit values. But the backend would fail for 'q' or 'Q' if the frontend check were not there.

Weirdly the backend fails for double with 'Q' in 64-bit mode. But does not fail with 'q' or 'r' or 'R'.

clang/lib/Basic/Targets/X86.h

int getEHDataRegisterNumber(unsigned RegNo) const override {
     return -1;
   }
 
   bool validateOperandSize(const llvm::StringMap<bool> &FeatureMap,
                            StringRef Constraint, unsigned Size) const override {
     switch (Constraint[0]) {
     default:
       break;
+    case 'r':
     case 'R':
     case 'q':
     case 'Q':
     case 'a':
     case 'b':
     case 'c':
     case 'd':
     case 'S':

clang/test/CodeGen/mult-alt-generic.c

void single_n()
   register int out0 = 0;
   // CHECK: call i32 asm "foo $1,$0", "=r,n[[CLOBBERS]](i32 1)
   asm("foo %1,%0" : "=r" (out0) : "n" (1));
 }
 
 // CHECK: @single_E
 void single_E()
 {
-  register double out0 = 0.0;
-  // CHECK: call double asm "foo $1,$0", "=r,E[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r" (out0) : "E" (1.0e+01));
+  register float out0 = 0.0f;
+  // CHECK: call float asm "foo $1,$0", "=r,E[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r" (out0) : "E" (1.0e+01f));
 }
 
 // CHECK: @single_F
 void single_F()
 {
-  register double out0 = 0.0;
-  // CHECK: call double asm "foo $1,$0", "=r,F[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r" (out0) : "F" (1.0));
+  register float out0 = 0.0f;
+  // CHECK: call float asm "foo $1,$0", "=r,F[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r" (out0) : "F" (1.0f));
 }
 
 // CHECK: @single_s
 void single_s()
 {
   register int out0 = 0;
   //asm("foo %1,%0" : "=r" (out0) : "s" (single_s));
 }
void multi_n()
   register int out0 = 0;
   // CHECK: call i32 asm "foo $1,$0", "=r|r,r|n[[CLOBBERS]](i32 1)
   asm("foo %1,%0" : "=r,r" (out0) : "r,n" (1));
 }
 
 // CHECK: @multi_E
 void multi_E()
 {
-  register double out0 = 0.0;
-  // CHECK: call double asm "foo $1,$0", "=r|r,r|E[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r,r" (out0) : "r,E" (1.0e+01));
+  register float out0 = 0.0f;
+  // CHECK: call float asm "foo $1,$0", "=r|r,r|E[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r,r" (out0) : "r,E" (1.0e+01f));
 }
 
 // CHECK: @multi_F
 void multi_F()
 {
-  register double out0 = 0.0;
-  // CHECK: call double asm "foo $1,$0", "=r|r,r|F[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r,r" (out0) : "r,F" (1.0));
+  register float out0 = 0.0f;
+  // CHECK: call float asm "foo $1,$0", "=r|r,r|F[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r,r" (out0) : "r,F" (1.0f));
 }
 
 // CHECK: @multi_s
 void multi_s()
 {
   register int out0 = 0;
   //asm("foo %1,%0" : "=r,r" (out0) : "r,s" (multi_s));
 }
void multi_X()
   // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](i32 {{[a-zA-Z0-9@%]+}})
   asm("foo %1,%0" : "=r,r" (out0) : "r,X" (in1));
   // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](i32 {{[a-zA-Z0-9@%]+}})
   asm("foo %1,%0" : "=r,r" (out0) : "r,X" (min1));
   // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](i32 1)
   asm("foo %1,%0" : "=r,r" (out0) : "r,X" (1));
   // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](i32* getelementptr inbounds ([2 x i32], [2 x i32]* {{[a-zA-Z0-9@%]+}}, i{{32|64}} 0, i{{32|64}} 0))
   asm("foo %1,%0" : "=r,r" (out0) : "r,X" (marray));
-  // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r,r" (out0) : "r,X" (1.0e+01));
-  // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](double {{[0-9.eE+-]+}})
-  asm("foo %1,%0" : "=r,r" (out0) : "r,X" (1.0));
+  // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r,r" (out0) : "r,X" (1.0e+01f));
+  // CHECK: call i32 asm "foo $1,$0", "=r|r,r|X[[CLOBBERS]](float {{[0-9.eE+-]+}})
+  asm("foo %1,%0" : "=r,r" (out0) : "r,X" (1.0f));
 }
 
 // CHECK: @multi_p
 void multi_p()
 {
   register int out0 = 0;
   // Constraint converted differently on different platforms moved to platform-specific.
   // : call i32 asm "foo $1,$0", "=r|r,r|im[[CLOBBERS]](i32* getelementptr inbounds ([2 x i32], [2 x i32]* {{[a-zA-Z0-9@%]+}}, {{i[0-9]*}} 0, {{i[0-9]*}} 0))
   asm("foo %1,%0" : "=r,r" (out0) : "r,p" (marray));
 }

clang/test/CodeGen/mult-alt-x86.c

 // RUN: %clang_cc1 -triple i686 -emit-llvm %s -o - | FileCheck %s
 // RUN: %clang_cc1 -triple x86_64 -emit-llvm %s -o - | FileCheck %s
 
 int mout0;
 int min1;
 int marray[2];
+float fout0;
+float fin1;
 double dout0;
 double din1;
 
 // CHECK: @single_R
 void single_R()
 {
   // CHECK: asm "foo $1,$0", "=R,R[[CLOBBERS:[a-zA-Z0-9@%{},~_ ]*\"]](i32 {{[a-zA-Z0-9@%]+}})
   asm("foo %1,%0" : "=R" (mout0) : "R" (min1));

 void multi_u()
 {
 //FIXME: I don't know how to do an 80387 floating point stack register operation, which I think is fp80.
 }
 
 // CHECK: @multi_y
 void multi_y()
 {
-  // CHECK: asm "foo $1,$0", "=*r|y|m,r|y|m[[CLOBBERS]](double* @dout0, double {{[a-zA-Z0-9@%]+}})
-  asm("foo %1,%0" : "=r,y,m" (dout0) : "r,y,m" (din1));
+  // CHECK: asm "foo $1,$0", "=*r|y|m,r|y|m[[CLOBBERS]](float* @fout0, float {{[a-zA-Z0-9@%]+}})
+  asm("foo %1,%0" : "=r,y,m" (fout0) : "r,y,m" (fin1));
 }
 
 // CHECK: @multi_x
 void multi_x()
 {
-  // CHECK: asm "foo $1,$0", "=*r|x|m,r|x|m[[CLOBBERS]](double* @dout0, double {{[a-zA-Z0-9@%]+}})
-  asm("foo %1,%0" : "=r,x,m" (dout0) : "r,x,m" (din1));
+  // CHECK: asm "foo $1,$0", "=*r|x|m,r|x|m[[CLOBBERS]](float* @fout0, float {{[a-zA-Z0-9@%]+}})
+  asm("foo %1,%0" : "=r,x,m" (fout0) : "r,x,m" (fin1));
 }
 
 // CHECK: @multi_Y
 void multi_Y0()
 {
   // Y constraint currently broken.
   //asm("foo %1,%0" : "=r,Y0,m" (mout0) : "r,Y0,m" (min1));
   //asm("foo %1,%0" : "=r,Yz,m" (mout0) : "r,Yz,m" (min1));

 {
   // CHECK: asm "foo $1,$0", "=*r|m|m,r|N|m[[CLOBBERS]](i32* @mout0, i32 1)
   asm("foo %1,%0" : "=r,m,m" (mout0) : "r,N,m" (1));
 }
 
 // CHECK: @multi_G
 void multi_G()
 {
-  // CHECK: asm "foo $1,$0", "=*r|m|m,r|G|m[[CLOBBERS]](i32* @mout0, double {{1.[0]+e[+]*[0]+}})
-  asm("foo %1,%0" : "=r,m,m" (mout0) : "r,G,m" (1.0));
+  // CHECK: asm "foo $1,$0", "=*r|m|m,r|G|m[[CLOBBERS]](i32* @mout0, float {{1.[0]+e[+]*[0]+}})
+  asm("foo %1,%0" : "=r,m,m" (mout0) : "r,G,m" (1.0f));
 }
 
 // CHECK: @multi_C
 void multi_C()
 {
-  // CHECK: asm "foo $1,$0", "=*r|m|m,r|C|m[[CLOBBERS]](i32* @mout0, double {{1.[0]+e[+]*[0]+}})
-  asm("foo %1,%0" : "=r,m,m" (mout0) : "r,C,m" (1.0));
+  // CHECK: asm "foo $1,$0", "=*r|m|m,r|C|m[[CLOBBERS]](i32* @mout0, float {{1.[0]+e[+]*[0]+}})
+  asm("foo %1,%0" : "=r,m,m" (mout0) : "r,C,m" (1.0f));
 }
 
 // CHECK: @multi_e
 void multi_e()
 {
   // CHECK: asm "foo $1,$0", "=*r|m|m,r|e|m[[CLOBBERS]](i32* @mout0, i32 1)
   asm("foo %1,%0" : "=r,m,m" (mout0) : "r,e,m" (1));
 }
 
 // CHECK: @multi_Z
 void multi_Z()
 {
   // CHECK: asm "foo $1,$0", "=*r|m|m,r|Z|m[[CLOBBERS]](i32* @mout0, i32 1)
   asm("foo %1,%0" : "=r,m,m" (mout0) : "r,Z,m" (1));
 }

clang/test/CodeGen/x86_32-inline-asm.c

__asm__ volatile("wrmsr"
                      "a" ((val & 0xFFFFFFFFUL)), // expected-error {{invalid input size for constraint 'a'}}
                      "d" (((val >> 32) & 0xFFFFFFFFUL)));
 
   // Don't error out if the size of the destination is <= 32 bits.
   unsigned char data;
   unsigned int port;
   __asm__ volatile("outb %0, %w1" : : "a" (data), "Nd" (port)); // No error expected.
 
+  __asm__ volatile("outb %0, %w1" : : "r" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'r'}}
   __asm__ volatile("outb %0, %w1" : : "R" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'R'}}
   __asm__ volatile("outb %0, %w1" : : "q" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'q'}}
   __asm__ volatile("outb %0, %w1" : : "Q" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'Q'}}
   __asm__ volatile("outb %0, %w1" : : "b" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'b'}}
   __asm__ volatile("outb %0, %w1" : : "c" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'c'}}
   __asm__ volatile("outb %0, %w1" : : "d" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'd'}}
   __asm__ volatile("outb %0, %w1" : : "S" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'S'}}
   __asm__ volatile("outb %0, %w1" : : "D" (val), "Nd" (port)); // expected-error {{invalid input size for constraint 'D'}}
   __asm__ volatile("foo1 %0" : : "A" (val128)); // expected-error {{invalid input size for constraint 'A'}}
   __asm__ volatile("foo1 %0" : : "f" (val256)); // expected-error {{invalid input size for constraint 'f'}}
   __asm__ volatile("foo1 %0" : : "t" (val256)); // expected-error {{invalid input size for constraint 't'}}
   __asm__ volatile("foo1 %0" : : "u" (val256)); // expected-error {{invalid input size for constraint 'u'}}
   __asm__ volatile("foo1 %0" : : "x" (val512)); // expected-error {{invalid input size for constraint 'x'}}
 
+  __asm__ volatile("foo1 %0" : "=r" (val)); // expected-error {{invalid output size for constraint '=r'}}
   __asm__ volatile("foo1 %0" : "=R" (val)); // expected-error {{invalid output size for constraint '=R'}}
   __asm__ volatile("foo1 %0" : "=q" (val)); // expected-error {{invalid output size for constraint '=q'}}
   __asm__ volatile("foo1 %0" : "=Q" (val)); // expected-error {{invalid output size for constraint '=Q'}}
   __asm__ volatile("foo1 %0" : "=a" (val)); // expected-error {{invalid output size for constraint '=a'}}
   __asm__ volatile("foo1 %0" : "=b" (val)); // expected-error {{invalid output size for constraint '=b'}}
   __asm__ volatile("foo1 %0" : "=c" (val)); // expected-error {{invalid output size for constraint '=c'}}
   __asm__ volatile("foo1 %0" : "=d" (val)); // expected-error {{invalid output size for constraint '=d'}}
   __asm__ volatile("foo1 %0" : "=S" (val)); // expected-error {{invalid output size for constraint '=S'}}

clang/test/Parser/no-gnu-inline-asm.c

 // RUN: %clang_cc1 %s -triple i686-apple-darwin -verify -fsyntax-only -fno-gnu-inline-asm
 
 #if __has_extension(gnu_asm)
 #error Expected extension 'gnu_asm' to be disabled
 #endif
 
 asm ("INST r1, 0"); // expected-error {{GNU-style inline assembly is disabled}}
 
 void foo() __asm("__foo_func"); // AsmLabel is OK
 int foo1 asm("bar1") = 0; // OK
 
 asm(" "); // Whitespace is OK
 
 void f (void) {
-  long long foo = 0, bar;
+  long foo = 0, bar;
   asm volatile("INST %0, %1" : "=r"(foo) : "r"(bar)); // expected-error {{GNU-style inline assembly is disabled}}
   asm (""); // Empty is OK
   return;
 }