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Differential D78401

[SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
ClosedPublic

Authored by sdesmalen on Apr 17 2020, 1:47 PM.

Details

Reviewers
efriedma
SjoerdMeijer
Commits
rG03f419f3eb0c: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd]
Summary

Some ACLE builtins leave out the argument to specify the predicate
pattern, which is expected to be expanded to an SV_ALL pattern.

This patch adds the flag IsInsertOp1SVALL to insert SV_ALL as the
second operand.

Diff Detail

Event Timeline

sdesmalen created this revision.Apr 17 2020, 1:47 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 17 2020, 1:47 PM
Herald added a subscriber: tschuett. · View Herald Transcript
sdesmalen added a parent revision: D77597: [SveEmitter] Add IsAppendSVALL and builtins for svptrue and svcnt[bhwd].Apr 17 2020, 1:47 PM
Harbormaster failed remote builds in B53778: Diff 258417!Apr 17 2020, 2:05 PM
SjoerdMeijer accepted this revision.Apr 20 2020, 6:47 AM

Looks reasonable

clang/include/clang/Basic/arm_sve.td
530

nit: just wondering if all these defs should be all capitals.

clang/lib/CodeGen/CGBuiltin.cpp
7684

would this be the most appropriate place to add the useful sentence from the description:

"Some ACLE builtins leave out the argument to specify the predicate
pattern, which is expected to be expanded to an SV_ALL pattern."

because that's what 31 is, right?

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
7

nit: used,unused -> "used/unused", or "used, unused"

This revision is now accepted and ready to land.Apr 20 2020, 6:47 AM
sdesmalen updated this revision to Diff 259554.Apr 23 2020, 6:55 AM
sdesmalen marked 3 inline comments as done.
  • Changed UNSIGNED_BYTE etc from upper-case to CamelCase.
  • Added comment explaining need to expand SV_ALL
clang/include/clang/Basic/arm_sve.td
530

They don't and I can see how this can be confused with intrinsics. I've changed it!

clang/lib/CodeGen/CGBuiltin.cpp
7684

Yes, good suggestion! I've added the comment.

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c
7

I'd rather not fix this for this patch, because it would need changing for all other test files as well.

Closed by commit rG03f419f3eb0c: [SveEmitter] IsInsertOp1SVALL and builtins for svqdec[bhwd] and svqinc[bhwd] (authored by sdesmalen). · Explain WhyApr 27 2020, 4:15 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
clang/
include/
clang/
Basic/
1 line
56 lines
lib/
CodeGen/
3 lines
test/
CodeGen/
aarch64-sve-intrinsics/
83 lines
115 lines
170 lines
115 lines
83 lines
115 lines
115 lines
115 lines
negative/
107 lines
155 lines
140 lines
155 lines
107 lines
155 lines
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155 lines
utils/
TableGen/
1 line

Diff 258417

clang/include/clang/Basic/TargetBuiltins.h

Show First 20 Lines • Show All 232 Lines • ▼ Show 20 Lines#undef LLVM_GET_SVE_IMMCHECKTYPES
bool isStructStore() const { return Flags & IsStructStore; } bool isStructStore() const { return Flags & IsStructStore; }
bool isZExtReturn() const { return Flags & IsZExtReturn; } bool isZExtReturn() const { return Flags & IsZExtReturn; }
bool isOverloadNone() const { return Flags & IsOverloadNone; } bool isOverloadNone() const { return Flags & IsOverloadNone; }
bool isOverloadWhile() const { return Flags & IsOverloadWhile; } bool isOverloadWhile() const { return Flags & IsOverloadWhile; }
bool isOverloadDefault() const { return !(Flags & OverloadKindMask); } bool isOverloadDefault() const { return !(Flags & OverloadKindMask); }
bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; } bool isOverloadWhileRW() const { return Flags & IsOverloadWhileRW; }
bool isOverloadCvt() const { return Flags & IsOverloadCvt; } bool isOverloadCvt() const { return Flags & IsOverloadCvt; }
bool isAppendSVALL() const { return Flags & IsAppendSVALL; } bool isAppendSVALL() const { return Flags & IsAppendSVALL; }
bool isInsertOp1SVALL() const { return Flags & IsInsertOp1SVALL; }
uint64_t getBits() const { return Flags; } uint64_t getBits() const { return Flags; }
bool isFlagSet(uint64_t Flag) const { return Flags & Flag; } bool isFlagSet(uint64_t Flag) const { return Flags & Flag; }
}; };
/// Hexagon builtins /// Hexagon builtins
namespace Hexagon { namespace Hexagon {
enum { enum {
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clang/include/clang/Basic/arm_sve.td

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// Prototype modifiers // Prototype modifiers
// ------------------- // -------------------
// prototype: return (arg, arg, ...) // prototype: return (arg, arg, ...)
// //
// u: vector of unsigned integers // u: vector of unsigned integers
// d: default // d: default
// c: const pointer type // c: const pointer type
// P: predicate type // P: predicate type
// s: scalar of element type
// a: scalar of element type (splat to vector type) // a: scalar of element type (splat to vector type)
// e: 1/2 width unsigned elements, 2x element count // e: 1/2 width unsigned elements, 2x element count
// h: 1/2 width elements, 2x element count // h: 1/2 width elements, 2x element count
// q: 1/4 width elements, 4x element count // q: 1/4 width elements, 4x element count
// o: 4x width elements, 1/4 element count // o: 4x width elements, 1/4 element count
// //
// i: constant uint64_t // i: constant uint64_t
// k: int32_t // k: int32_t
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
def IsStructStore : FlagType<0x00040000>; def IsStructStore : FlagType<0x00040000>;
def IsZExtReturn : FlagType<0x00080000>; // Return value is sign-extend by default def IsZExtReturn : FlagType<0x00080000>; // Return value is sign-extend by default
def IsOverloadNone : FlagType<0x00100000>; // Intrinsic does not take any overloaded types. def IsOverloadNone : FlagType<0x00100000>; // Intrinsic does not take any overloaded types.
def IsOverloadWhile : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types. def IsOverloadWhile : FlagType<0x00200000>; // Use {default type, typeof(operand1)} as overloaded types.
def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types. def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)} as overloaded types.
def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types. def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand)} as overloaded types.
def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type. def OverloadKindMask : FlagType<0x00E00000>; // When the masked values are all '0', the default type is used as overload type.
def IsAppendSVALL : FlagType<0x01000000>; // Appends SV_ALL as the last operand. def IsAppendSVALL : FlagType<0x01000000>; // Appends SV_ALL as the last operand.
def IsInsertOp1SVALL : FlagType<0x02000000>; // Inserts SV_ALL as the second operand.
// These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h // These must be kept in sync with the flags in include/clang/Basic/TargetBuiltins.h
class ImmCheckType<int val> { class ImmCheckType<int val> {
int Value = val; int Value = val;
} }
def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns) def ImmCheck0_31 : ImmCheckType<0>; // 0..31 (used for e.g. predicate patterns)
def ImmCheck1_16 : ImmCheckType<1>; // 1..16 def ImmCheck1_16 : ImmCheckType<1>; // 1..16
def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1) def ImmCheckExtract : ImmCheckType<2>; // 0..(2048/sizeinbits(elt) - 1)
▲ Show 20 Lines • Show All 308 Lines • ▼ Show 20 Lines
def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch64_sve_fcvtxnt_f32f64", [IsOverloadNone]>; def SVCVTXNT_F32 : SInst<"svcvtxnt_f32[_f64]", "MMPd", "d", MergeOp1, "aarch64_sve_fcvtxnt_f32f64", [IsOverloadNone]>;
// SVCVTXNT_X_F32 : Implemented as macro by SveEmitter.cpp // SVCVTXNT_X_F32 : Implemented as macro by SveEmitter.cpp
} }
def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>; def SVCADD_M : SInst<"svcadd[_{d}]", "dPddi", "hfd", MergeOp1, "aarch64_sve_fcadd", [], [ImmCheck<3, ImmCheckComplexRot90_270>]>;
def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>; def SVCMLA_M : SInst<"svcmla[_{d}]", "dPdddi", "hfd", MergeOp1, "aarch64_sve_fcmla", [], [ImmCheck<4, ImmCheckComplexRotAll90>]>;
////////////////////////////////////////////////////////////////////////////////
// Saturating scalar arithmetic
def SVQDECH_S : SInst<"svqdech_pat[_{d}]", "ddIi", "s", MergeNone, "aarch64_sve_sqdech", [], [ImmCheck<2, ImmCheck1_16>]>;
def SVQDECH_U : SInst<"svqdech_pat[_{d}]", "ddIi", "Us", MergeNone, "aarch64_sve_uqdech", [], [ImmCheck<2, ImmCheck1_16>]>;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// Predicate creation // Predicate creation
def SVPFALSE : SInst<"svpfalse[_b]", "P", "", MergeNone, "", [IsOverloadNone]>; def SVPFALSE : SInst<"svpfalse[_b]", "P", "", MergeNone, "", [IsOverloadNone]>;
def SVPTRUE_PAT : SInst<"svptrue_pat_{d}", "PI", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue">; def SVPTRUE_PAT : SInst<"svptrue_pat_{d}", "PI", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue">;
def SVPTRUE : SInst<"svptrue_{d}", "P", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue", [IsAppendSVALL]>; def SVPTRUE : SInst<"svptrue_{d}", "P", "PcPsPiPl", MergeNone, "aarch64_sve_ptrue", [IsAppendSVALL]>;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// Counting elements // Counting elements
def SVCNTB_PAT : SInst<"svcntb_pat", "nI", "", MergeNone, "aarch64_sve_cntb", [IsOverloadNone]>; def SVCNTB_PAT : SInst<"svcntb_pat", "nI", "", MergeNone, "aarch64_sve_cntb", [IsOverloadNone]>;
def SVCNTH_PAT : SInst<"svcnth_pat", "nI", "", MergeNone, "aarch64_sve_cnth", [IsOverloadNone]>; def SVCNTH_PAT : SInst<"svcnth_pat", "nI", "", MergeNone, "aarch64_sve_cnth", [IsOverloadNone]>;
def SVCNTW_PAT : SInst<"svcntw_pat", "nI", "", MergeNone, "aarch64_sve_cntw", [IsOverloadNone]>; def SVCNTW_PAT : SInst<"svcntw_pat", "nI", "", MergeNone, "aarch64_sve_cntw", [IsOverloadNone]>;
def SVCNTD_PAT : SInst<"svcntd_pat", "nI", "", MergeNone, "aarch64_sve_cntd", [IsOverloadNone]>; def SVCNTD_PAT : SInst<"svcntd_pat", "nI", "", MergeNone, "aarch64_sve_cntd", [IsOverloadNone]>;
def SVCNTB : SInst<"svcntb", "n", "", MergeNone, "aarch64_sve_cntb", [IsAppendSVALL, IsOverloadNone]>; def SVCNTB : SInst<"svcntb", "n", "", MergeNone, "aarch64_sve_cntb", [IsAppendSVALL, IsOverloadNone]>;
def SVCNTH : SInst<"svcnth", "n", "", MergeNone, "aarch64_sve_cnth", [IsAppendSVALL, IsOverloadNone]>; def SVCNTH : SInst<"svcnth", "n", "", MergeNone, "aarch64_sve_cnth", [IsAppendSVALL, IsOverloadNone]>;
def SVCNTW : SInst<"svcntw", "n", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone]>; def SVCNTW : SInst<"svcntw", "n", "", MergeNone, "aarch64_sve_cntw", [IsAppendSVALL, IsOverloadNone]>;
def SVCNTD : SInst<"svcntd", "n", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone]>; def SVCNTD : SInst<"svcntd", "n", "", MergeNone, "aarch64_sve_cntd", [IsAppendSVALL, IsOverloadNone]>;
////////////////////////////////////////////////////////////////////////////////
// Saturating scalar arithmetic
class sat_type<string u, string t> { string U = u; string T = t; }
def SIGNED_BYTE : sat_type<"", "c">;
SjoerdMeijerUnsubmitted
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nit: just wondering if all these defs should be all capitals.

SjoerdMeijer: nit: just wondering if all these defs should be all capitals.
sdesmalenAuthorUnsubmitted
Done
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They don't and I can see how this can be confused with intrinsics. I've changed it!

sdesmalen: They don't and I can see how this can be confused with intrinsics. I've changed it!
def SIGNED_HALF : sat_type<"", "s">;
def SIGNED_WORD : sat_type<"", "i">;
def SIGNED_DOUBLEWORD : sat_type<"", "l">;
def UNSIGNED_BYTE : sat_type<"U", "Uc">;
def UNSIGNED_HALF : sat_type<"U", "Us">;
def UNSIGNED_WORD : sat_type<"U", "Ui">;
def UNSIGNED_DOUBLEWORD : sat_type<"U", "Ul">;
multiclass SInst_SAT1<string name, string intrinsic, sat_type type> {
def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>;
def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>;
def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>;
def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>;
}
multiclass SInst_SAT2<string name, string intrinsic, sat_type type> {
def "" : SInst<name # "_pat[_{d}]", "ddIi", type.T, MergeNone, intrinsic, [], [ImmCheck<2, ImmCheck1_16>]>;
def _ALL : SInst<name # "[_{d}]", "ddi", type.T, MergeNone, intrinsic, [IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>;
def _N32 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>;
def _N64 : SInst<name # "_pat[_n_{d}]", "ssIi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone], [ImmCheck<2, ImmCheck1_16>]>;
def _N32_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "i", MergeNone, intrinsic # "_n32", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>;
def _N64_ALL : SInst<name # "[_n_{d}]", "ssi", type.U # "l", MergeNone, intrinsic # "_n64", [IsOverloadNone, IsInsertOp1SVALL], [ImmCheck<1, ImmCheck1_16>]>;
}
defm SVQDECB_S : SInst_SAT1<"svqdecb", "aarch64_sve_sqdecb", SIGNED_BYTE>;
defm SVQDECB_U : SInst_SAT1<"svqdecb", "aarch64_sve_uqdecb", UNSIGNED_BYTE>;
defm SVQDECH_S : SInst_SAT2<"svqdech", "aarch64_sve_sqdech", SIGNED_HALF>;
defm SVQDECH_U : SInst_SAT2<"svqdech", "aarch64_sve_uqdech", UNSIGNED_HALF>;
defm SVQDECW_S : SInst_SAT2<"svqdecw", "aarch64_sve_sqdecw", SIGNED_WORD>;
defm SVQDECW_U : SInst_SAT2<"svqdecw", "aarch64_sve_uqdecw", UNSIGNED_WORD>;
defm SVQDECD_S : SInst_SAT2<"svqdecd", "aarch64_sve_sqdecd", SIGNED_DOUBLEWORD>;
defm SVQDECD_U : SInst_SAT2<"svqdecd", "aarch64_sve_uqdecd", UNSIGNED_DOUBLEWORD>;
defm SVQINCB_S : SInst_SAT1<"svqincb", "aarch64_sve_sqincb", SIGNED_BYTE>;
defm SVQINCB_U : SInst_SAT1<"svqincb", "aarch64_sve_uqincb", UNSIGNED_BYTE>;
defm SVQINCH_S : SInst_SAT2<"svqinch", "aarch64_sve_sqinch", SIGNED_HALF>;
defm SVQINCH_U : SInst_SAT2<"svqinch", "aarch64_sve_uqinch", UNSIGNED_HALF>;
defm SVQINCW_S : SInst_SAT2<"svqincw", "aarch64_sve_sqincw", SIGNED_WORD>;
defm SVQINCW_U : SInst_SAT2<"svqincw", "aarch64_sve_uqincw", UNSIGNED_WORD>;
defm SVQINCD_S : SInst_SAT2<"svqincd", "aarch64_sve_sqincd", SIGNED_DOUBLEWORD>;
defm SVQINCD_U : SInst_SAT2<"svqincd", "aarch64_sve_uqincd", UNSIGNED_DOUBLEWORD>;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// Integer arithmetic // Integer arithmetic
def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_sdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; def SVDOT_LANE_S : SInst<"svdot_lane[_{d}]", "ddqqi", "il", MergeNone, "aarch64_sve_sdot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone, "aarch64_sve_udot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>; def SVDOT_LANE_U : SInst<"svdot_lane[_{d}]", "ddqqi", "UiUl", MergeNone, "aarch64_sve_udot_lane", [], [ImmCheck<3, ImmCheckLaneIndexDot, 2>]>;
//////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////
// SVE2 WhileGE/GT // SVE2 WhileGE/GT
let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in { let ArchGuard = "defined(__ARM_FEATURE_SVE2)" in {
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clang/lib/CodeGen/CGBuiltin.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 7,675 Lines • ▼ Show 20 Lines if (TypeFlags.getMergeType() == SVETypeFlags::MergeZeroExp)
InsertExplicitZeroOperand(Builder, Ty, Ops); InsertExplicitZeroOperand(Builder, Ty, Ops);
if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp) if (TypeFlags.getMergeType() == SVETypeFlags::MergeAnyExp)
InsertExplicitUndefOperand(Builder, Ty, Ops); InsertExplicitUndefOperand(Builder, Ty, Ops);
if (TypeFlags.isAppendSVALL()) if (TypeFlags.isAppendSVALL())
Ops.push_back(Builder.getInt32(31)); Ops.push_back(Builder.getInt32(31));
if (TypeFlags.isInsertOp1SVALL())
SjoerdMeijerUnsubmitted
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would this be the most appropriate place to add the useful sentence from the description:

"Some ACLE builtins leave out the argument to specify the predicate
pattern, which is expected to be expanded to an SV_ALL pattern."

because that's what 31 is, right?

SjoerdMeijer: would this be the most appropriate place to add the useful sentence from the description…
sdesmalenAuthorUnsubmitted
Done
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Yes, good suggestion! I've added the comment.

sdesmalen: Yes, good suggestion! I've added the comment.
Ops.insert(&Ops[1], Builder.getInt32(31));
// Predicates must match the main datatype. // Predicates must match the main datatype.
for (unsigned i = 0, e = Ops.size(); i != e; ++i) for (unsigned i = 0, e = Ops.size(); i != e; ++i)
if (auto PredTy = dyn_cast<llvm::VectorType>(Ops[i]->getType())) if (auto PredTy = dyn_cast<llvm::VectorType>(Ops[i]->getType()))
if (PredTy->getElementType()->isIntegerTy(1)) if (PredTy->getElementType()->isIntegerTy(1))
Ops[i] = EmitSVEPredicateCast(Ops[i], getSVEType(TypeFlags)); Ops[i] = EmitSVEPredicateCast(Ops[i], getSVEType(TypeFlags));
// Splat scalar operand to vector (intrinsics with _n infix) // Splat scalar operand to vector (intrinsics with _n infix)
if (TypeFlags.hasSplatOperand()) { if (TypeFlags.hasSplatOperand()) {
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clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
SjoerdMeijerUnsubmitted
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nit: used,unused -> "used/unused", or "used, unused"

SjoerdMeijer: nit: used,unused -> "used/unused", or "used, unused"
sdesmalenAuthorUnsubmitted
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I'd rather not fix this for this patch, because it would need changing for all other test files as well.

sdesmalen: I'd rather not fix this for this patch, because it would need changing for all other test files…
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqdecb_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecb_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 1);
}
int32_t test_svqdecb_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqdecb_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 16);
}
int64_t test_svqdecb_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecb_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb,_n_s64,,)(op, 1);
}
uint32_t test_svqdecb_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecb_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb,_n_u32,,)(op, 16);
}
uint64_t test_svqdecb_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecb_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb,_n_u64,,)(op, 1);
}
int32_t test_svqdecb_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecb_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 0, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb_pat,_n_s32,,)(op, SV_POW2, 16);
}
int64_t test_svqdecb_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecb_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 %op, i32 1, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb_pat,_n_s64,,)(op, SV_VL1, 1);
}
uint32_t test_svqdecb_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecb_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 %op, i32 2, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb_pat,_n_u32,,)(op, SV_VL2, 16);
}
uint64_t test_svqdecb_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecb_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 %op, i32 3, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecb_pat,_n_u64,,)(op, SV_VL3, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqdecd_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecd_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 1);
}
int32_t test_svqdecd_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqdecd_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 16);
}
int64_t test_svqdecd_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecd_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_n_s64,,)(op, 1);
}
uint32_t test_svqdecd_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecd_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_n_u32,,)(op, 16);
}
uint64_t test_svqdecd_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecd_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_n_u64,,)(op, 1);
}
int32_t test_svqdecd_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecd_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 4, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_n_s32,,)(op, SV_VL4, 16);
}
int64_t test_svqdecd_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecd_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 %op, i32 5, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_n_s64,,)(op, SV_VL5, 1);
}
uint32_t test_svqdecd_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecd_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 %op, i32 6, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_n_u32,,)(op, SV_VL6, 16);
}
uint64_t test_svqdecd_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecd_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 %op, i32 7, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_n_u64,,)(op, SV_VL7, 1);
}
svint64_t test_svqdecd_s64(svint64_t op)
{
// CHECK-LABEL: test_svqdecd_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqdecd.nxv2i64(<vscale x 2 x i64> %op, i32 31, i32 16)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_s64,,)(op, 16);
}
svuint64_t test_svqdecd_u64(svuint64_t op)
{
// CHECK-LABEL: test_svqdecd_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqdecd.nxv2i64(<vscale x 2 x i64> %op, i32 31, i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd,_u64,,)(op, 1);
}
svint64_t test_svqdecd_pat_s64(svint64_t op)
{
// CHECK-LABEL: test_svqdecd_pat_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqdecd.nxv2i64(<vscale x 2 x i64> %op, i32 8, i32 16)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_s64,,)(op, SV_VL8, 16);
}
svuint64_t test_svqdecd_pat_u64(svuint64_t op)
{
// CHECK-LABEL: test_svqdecd_pat_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqdecd.nxv2i64(<vscale x 2 x i64> %op, i32 9, i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecd_pat,_u64,,)(op, SV_VL16, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c

// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h> #include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS #ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin. // A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else #else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif #endif
svint16_t test_svqdech_pat_s16(svint16_t op) int32_t test_svqdech_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdech_pat_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqdech.nxv8i16(<vscale x 8 x i16> %op, i32 0, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return svqdech_pat_s16(op, SV_POW2, 1);
}
svint16_t test_svqdech_pat_s16_all(svint16_t op)
{
// CHECK-LABEL: test_svqdech_pat_s16_all
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqdech.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return svqdech_pat_s16(op, SV_ALL, 16);
}
svuint16_t test_svqdech_pat_u16_pow2(svuint16_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_pow2 // CHECK-LABEL: test_svqdech_n_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 0, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 31, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_POW2, 16); return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 1);
} }
svuint16_t test_svqdech_pat_u16_vl1(svuint16_t op) int32_t test_svqdech_n_s32_1(int32_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl1 // CHECK-LABEL: test_svqdech_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 1, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 31, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL1, 16); return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 16);
} }
svuint16_t test_svqdech_pat_u16_vl2(svuint16_t op) int64_t test_svqdech_n_s64(int64_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl2 // CHECK-LABEL: test_svqdech_n_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 2, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 %op, i32 31, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL2, 16); return SVE_ACLE_FUNC(svqdech,_n_s64,,)(op, 1);
} }
svuint16_t test_svqdech_pat_u16_vl3(svuint16_t op) uint32_t test_svqdech_n_u32(uint32_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl3 // CHECK-LABEL: test_svqdech_n_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 3, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 %op, i32 31, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL3, 16); return SVE_ACLE_FUNC(svqdech,_n_u32,,)(op, 16);
} }
svuint16_t test_svqdech_pat_u16_vl4(svuint16_t op) uint64_t test_svqdech_n_u64(uint64_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl4 // CHECK-LABEL: test_svqdech_n_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 4, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 %op, i32 31, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL4, 16); return SVE_ACLE_FUNC(svqdech,_n_u64,,)(op, 1);
} }
svuint16_t test_svqdech_pat_u16_vl5(svuint16_t op) int32_t test_svqdech_pat_n_s32(int32_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl5 // CHECK-LABEL: test_svqdech_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 5, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 10, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL5, 16); return SVE_ACLE_FUNC(svqdech_pat,_n_s32,,)(op, SV_VL32, 16);
} }
svuint16_t test_svqdech_pat_u16_vl6(svuint16_t op) int64_t test_svqdech_pat_n_s64(int64_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl6 // CHECK-LABEL: test_svqdech_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 6, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 %op, i32 11, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL6, 16); return SVE_ACLE_FUNC(svqdech_pat,_n_s64,,)(op, SV_VL64, 1);
} }
svuint16_t test_svqdech_pat_u16_vl7(svuint16_t op) uint32_t test_svqdech_pat_n_u32(uint32_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl7 // CHECK-LABEL: test_svqdech_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 7, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 %op, i32 12, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL7, 16); return SVE_ACLE_FUNC(svqdech_pat,_n_u32,,)(op, SV_VL128, 16);
} }
svuint16_t test_svqdech_pat_u16_vl8(svuint16_t op) uint64_t test_svqdech_pat_n_u64(uint64_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl8 // CHECK-LABEL: test_svqdech_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 8, i32 16) // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 %op, i32 13, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL8, 16); return SVE_ACLE_FUNC(svqdech_pat,_n_u64,,)(op, SV_VL256, 1);
} }
svuint16_t test_svqdech_pat_u16_vl16(svuint16_t op) svint16_t test_svqdech_s16(svint16_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_vl16 // CHECK-LABEL: test_svqdech_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 9, i32 16) // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqdech.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL16, 16);
}
svuint16_t test_svqdech_pat_u16_vl32(svuint16_t op)
{
// CHECK-LABEL: test_svqdech_pat_u16_vl32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 10, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL32, 16);
}
svuint16_t test_svqdech_pat_u16_vl64(svuint16_t op)
{
// CHECK-LABEL: test_svqdech_pat_u16_vl64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 11, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL64, 16);
}
svuint16_t test_svqdech_pat_u16_vl128(svuint16_t op)
{
// CHECK-LABEL: test_svqdech_pat_u16_vl128
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 12, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL128, 16);
}
svuint16_t test_svqdech_pat_u16_vl256(svuint16_t op)
{
// CHECK-LABEL: test_svqdech_pat_u16_vl256
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 13, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL256, 16); return SVE_ACLE_FUNC(svqdech,_s16,,)(op, 16);
} }
svuint16_t test_svqdech_pat_u16_mul4(svuint16_t op) svuint16_t test_svqdech_u16(svuint16_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_mul4 // CHECK-LABEL: test_svqdech_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 29, i32 16) // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_MUL4, 16); return SVE_ACLE_FUNC(svqdech,_u16,,)(op, 1);
} }
svuint16_t test_svqdech_pat_u16_mul3(svuint16_t op) svint16_t test_svqdech_pat_s16(svint16_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_mul3 // CHECK-LABEL: test_svqdech_pat_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 30, i32 16) // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqdech.nxv8i16(<vscale x 8 x i16> %op, i32 29, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_MUL3, 16); return SVE_ACLE_FUNC(svqdech_pat,_s16,,)(op, SV_MUL4, 16);
} }
svuint16_t test_svqdech_pat_u16_all(svuint16_t op) svuint16_t test_svqdech_pat_u16(svuint16_t op)
{ {
// CHECK-LABEL: test_svqdech_pat_u16_all // CHECK-LABEL: test_svqdech_pat_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 16) // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqdech.nxv8i16(<vscale x 8 x i16> %op, i32 30, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]] // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_ALL, 16); return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_MUL3, 1);
} }

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqdecw_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecw_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 1);
}
int32_t test_svqdecw_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqdecw_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 16);
}
int64_t test_svqdecw_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecw_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_n_s64,,)(op, 1);
}
uint32_t test_svqdecw_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecw_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_n_u32,,)(op, 16);
}
uint64_t test_svqdecw_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecw_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_n_u64,,)(op, 1);
}
int32_t test_svqdecw_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqdecw_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_n_s32,,)(op, SV_ALL, 16);
}
int64_t test_svqdecw_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqdecw_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 %op, i32 0, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_n_s64,,)(op, SV_POW2, 1);
}
uint32_t test_svqdecw_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqdecw_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 %op, i32 1, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_n_u32,,)(op, SV_VL1, 16);
}
uint64_t test_svqdecw_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqdecw_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 %op, i32 2, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_n_u64,,)(op, SV_VL2, 1);
}
svint32_t test_svqdecw_s32(svint32_t op)
{
// CHECK-LABEL: test_svqdecw_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqdecw.nxv4i32(<vscale x 4 x i32> %op, i32 31, i32 16)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_s32,,)(op, 16);
}
svuint32_t test_svqdecw_u32(svuint32_t op)
{
// CHECK-LABEL: test_svqdecw_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqdecw.nxv4i32(<vscale x 4 x i32> %op, i32 31, i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw,_u32,,)(op, 1);
}
svint32_t test_svqdecw_pat_s32(svint32_t op)
{
// CHECK-LABEL: test_svqdecw_pat_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqdecw.nxv4i32(<vscale x 4 x i32> %op, i32 3, i32 16)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_s32,,)(op, SV_VL3, 16);
}
svuint32_t test_svqdecw_pat_u32(svuint32_t op)
{
// CHECK-LABEL: test_svqdecw_pat_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqdecw.nxv4i32(<vscale x 4 x i32> %op, i32 4, i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqdecw_pat,_u32,,)(op, SV_VL4, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqincb_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincb_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 1);
}
int32_t test_svqincb_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqincb_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 16);
}
int64_t test_svqincb_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincb_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb,_n_s64,,)(op, 1);
}
uint32_t test_svqincb_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincb_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb,_n_u32,,)(op, 16);
}
uint64_t test_svqincb_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincb_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb,_n_u64,,)(op, 1);
}
int32_t test_svqincb_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincb_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 5, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb_pat,_n_s32,,)(op, SV_VL5, 16);
}
int64_t test_svqincb_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincb_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 %op, i32 6, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb_pat,_n_s64,,)(op, SV_VL6, 1);
}
uint32_t test_svqincb_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincb_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 %op, i32 7, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb_pat,_n_u32,,)(op, SV_VL7, 16);
}
uint64_t test_svqincb_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincb_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 %op, i32 8, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincb_pat,_n_u64,,)(op, SV_VL8, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqincd_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincd_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 1);
}
int32_t test_svqincd_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqincd_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 16);
}
int64_t test_svqincd_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincd_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_n_s64,,)(op, 1);
}
uint32_t test_svqincd_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincd_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_n_u32,,)(op, 16);
}
uint64_t test_svqincd_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincd_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_n_u64,,)(op, 1);
}
int32_t test_svqincd_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincd_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 9, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_n_s32,,)(op, SV_VL16, 16);
}
int64_t test_svqincd_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincd_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 %op, i32 10, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_n_s64,,)(op, SV_VL32, 1);
}
uint32_t test_svqincd_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincd_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %op, i32 11, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_n_u32,,)(op, SV_VL64, 16);
}
uint64_t test_svqincd_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincd_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %op, i32 12, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_n_u64,,)(op, SV_VL128, 1);
}
svint64_t test_svqincd_s64(svint64_t op)
{
// CHECK-LABEL: test_svqincd_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqincd.nxv2i64(<vscale x 2 x i64> %op, i32 31, i32 16)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_s64,,)(op, 16);
}
svuint64_t test_svqincd_u64(svuint64_t op)
{
// CHECK-LABEL: test_svqincd_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %op, i32 31, i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd,_u64,,)(op, 1);
}
svint64_t test_svqincd_pat_s64(svint64_t op)
{
// CHECK-LABEL: test_svqincd_pat_s64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqincd.nxv2i64(<vscale x 2 x i64> %op, i32 13, i32 16)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_s64,,)(op, SV_VL256, 16);
}
svuint64_t test_svqincd_pat_u64(svuint64_t op)
{
// CHECK-LABEL: test_svqincd_pat_u64
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %op, i32 29, i32 1)
// CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincd_pat,_u64,,)(op, SV_MUL4, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqinch_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqinch_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 1);
}
int32_t test_svqinch_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqinch_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 16);
}
int64_t test_svqinch_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqinch_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_n_s64,,)(op, 1);
}
uint32_t test_svqinch_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqinch_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_n_u32,,)(op, 16);
}
uint64_t test_svqinch_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqinch_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_n_u64,,)(op, 1);
}
int32_t test_svqinch_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqinch_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 30, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_n_s32,,)(op, SV_MUL3, 16);
}
int64_t test_svqinch_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqinch_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_n_s64,,)(op, SV_ALL, 1);
}
uint32_t test_svqinch_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqinch_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 0, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_n_u32,,)(op, SV_POW2, 16);
}
uint64_t test_svqinch_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqinch_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 1, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_n_u64,,)(op, SV_VL1, 1);
}
svint16_t test_svqinch_s16(svint16_t op)
{
// CHECK-LABEL: test_svqinch_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_s16,,)(op, 16);
}
svuint16_t test_svqinch_u16(svuint16_t op)
{
// CHECK-LABEL: test_svqinch_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqinch.nxv8i16(<vscale x 8 x i16> %op, i32 31, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch,_u16,,)(op, 1);
}
svint16_t test_svqinch_pat_s16(svint16_t op)
{
// CHECK-LABEL: test_svqinch_pat_s16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %op, i32 2, i32 16)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_s16,,)(op, SV_VL2, 16);
}
svuint16_t test_svqinch_pat_u16(svuint16_t op)
{
// CHECK-LABEL: test_svqinch_pat_u16
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqinch.nxv8i16(<vscale x 8 x i16> %op, i32 3, i32 1)
// CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqinch_pat,_u16,,)(op, SV_VL3, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
#include <arm_sve.h>
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
int32_t test_svqincw_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincw_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 31, i32 1)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 1);
}
int32_t test_svqincw_n_s32_1(int32_t op)
{
// CHECK-LABEL: test_svqincw_n_s32_1
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 16);
}
int64_t test_svqincw_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincw_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 1);
}
uint32_t test_svqincw_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincw_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 %op, i32 31, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 16);
}
uint64_t test_svqincw_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincw_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 %op, i32 31, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 1);
}
int32_t test_svqincw_pat_n_s32(int32_t op)
{
// CHECK-LABEL: test_svqincw_pat_n_s32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 4, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL4, 16);
}
int64_t test_svqincw_pat_n_s64(int64_t op)
{
// CHECK-LABEL: test_svqincw_pat_n_s64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 %op, i32 5, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL5, 1);
}
uint32_t test_svqincw_pat_n_u32(uint32_t op)
{
// CHECK-LABEL: test_svqincw_pat_n_u32
// CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 %op, i32 6, i32 16)
// CHECK: ret i32 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_n_u32,,)(op, SV_VL6, 16);
}
uint64_t test_svqincw_pat_n_u64(uint64_t op)
{
// CHECK-LABEL: test_svqincw_pat_n_u64
// CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 %op, i32 7, i32 1)
// CHECK: ret i64 %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_n_u64,,)(op, SV_VL7, 1);
}
svint32_t test_svqincw_s32(svint32_t op)
{
// CHECK-LABEL: test_svqincw_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqincw.nxv4i32(<vscale x 4 x i32> %op, i32 31, i32 16)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_s32,,)(op, 16);
}
svuint32_t test_svqincw_u32(svuint32_t op)
{
// CHECK-LABEL: test_svqincw_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqincw.nxv4i32(<vscale x 4 x i32> %op, i32 31, i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw,_u32,,)(op, 1);
}
svint32_t test_svqincw_pat_s32(svint32_t op)
{
// CHECK-LABEL: test_svqincw_pat_s32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqincw.nxv4i32(<vscale x 4 x i32> %op, i32 8, i32 16)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_s32,,)(op, SV_VL8, 16);
}
svuint32_t test_svqincw_pat_u32(svuint32_t op)
{
// CHECK-LABEL: test_svqincw_pat_u32
// CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqincw.nxv4i32(<vscale x 4 x i32> %op, i32 9, i32 1)
// CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
return SVE_ACLE_FUNC(svqincw_pat,_u32,,)(op, SV_VL16, 1);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqdecb_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 0);
}
int32_t test_svqdecb_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 17);
}
int64_t test_svqdecb_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_s64,,)(op, 0);
}
int64_t test_svqdecb_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_s64,,)(op, 17);
}
uint32_t test_svqdecb_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_u32,,)(op, 0);
}
uint32_t test_svqdecb_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_u32,,)(op, 17);
}
uint64_t test_svqdecb_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_u64,,)(op, 0);
}
uint64_t test_svqdecb_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb,_n_u64,,)(op, 17);
}
int32_t test_svqdecb_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqdecb_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqdecb_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqdecb_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqdecb_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqdecb_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqdecb_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqdecb_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecb_pat,_n_u64,,)(op, SV_VL7, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecd.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqdecd_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 0);
}
int32_t test_svqdecd_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 17);
}
int64_t test_svqdecd_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_s64,,)(op, 0);
}
int64_t test_svqdecd_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_s64,,)(op, 17);
}
uint32_t test_svqdecd_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_u32,,)(op, 0);
}
uint32_t test_svqdecd_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_u32,,)(op, 17);
}
uint64_t test_svqdecd_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_u64,,)(op, 0);
}
uint64_t test_svqdecd_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_n_u64,,)(op, 17);
}
int32_t test_svqdecd_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqdecd_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqdecd_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqdecd_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqdecd_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqdecd_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqdecd_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqdecd_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint64_t test_svqdecd_s64(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_s64,,)(op, 0);
}
svint64_t test_svqdecd_s64_1(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_s64,,)(op, 17);
}
svuint64_t test_svqdecd_u64(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_u64,,)(op, 0);
}
svuint64_t test_svqdecd_u64_1(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd,_u64,,)(op, 17);
}
svint64_t test_svqdecd_pat_s64(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_s64,,)(op, SV_VL8, 0);
}
svint64_t test_svqdecd_pat_s64_1(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_s64,,)(op, SV_VL16, 17);
}
svuint64_t test_svqdecd_pat_u64(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_u64,,)(op, SV_VL32, 0);
}
svuint64_t test_svqdecd_pat_u64_1(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecd_pat,_u64,,)(op, SV_VL64, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdech.c

// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS #ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin. // A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else #else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif #endif
#include <arm_sve.h> #include <arm_sve.h>
int32_t test_svqdech_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 0);
}
int32_t test_svqdech_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 17);
}
int64_t test_svqdech_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_s64,,)(op, 0);
}
int64_t test_svqdech_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_s64,,)(op, 17);
}
uint32_t test_svqdech_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_u32,,)(op, 0);
}
uint32_t test_svqdech_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_u32,,)(op, 17);
}
uint64_t test_svqdech_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_u64,,)(op, 0);
}
uint64_t test_svqdech_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_n_u64,,)(op, 17);
}
int32_t test_svqdech_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqdech_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqdech_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqdech_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqdech_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqdech_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqdech_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqdech_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint16_t test_svqdech_s16(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_s16,,)(op, 0);
}
svint16_t test_svqdech_s16_1(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_s16,,)(op, 17);
}
svuint16_t test_svqdech_u16(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_u16,,)(op, 0);
}
svuint16_t test_svqdech_u16_1(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdech,_u16,,)(op, 17);
}
svint16_t test_svqdech_pat_s16(svint16_t op) svint16_t test_svqdech_pat_s16(svint16_t op)
{ {
// expected-error@+1 {{argument value 0 is outside the valid range [1, 16]}} // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return svqdech_pat_s16(op, SV_VL8, 0); return SVE_ACLE_FUNC(svqdech_pat,_s16,,)(op, SV_VL8, 0);
} }
svint16_t test_svqdech_pat_s16_2(svint16_t op) svint16_t test_svqdech_pat_s16_1(svint16_t op)
{ {
// expected-error@+1 {{argument value 17 is outside the valid range [1, 16]}} // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return svqdech_pat_s16(op, SV_VL16, 17); return SVE_ACLE_FUNC(svqdech_pat,_s16,,)(op, SV_VL16, 17);
} }
svuint16_t test_svqdech_pat_u16(svuint16_t op) svuint16_t test_svqdech_pat_u16(svuint16_t op)
{ {
// expected-error@+1 {{argument value 0 is outside the valid range [1, 16]}} // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return svqdech_pat_u16(op, SV_VL32, 0); return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL32, 0);
} }
svuint16_t test_svqdech_pat_u16_2(svuint16_t op) svuint16_t test_svqdech_pat_u16_1(svuint16_t op)
{ {
// expected-error@+1 {{argument value 17 is outside the valid range [1, 16]}} // expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return svqdech_pat_u16(op, SV_VL64, 17); return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_VL64, 17);
} }

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecw.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqdecw_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 0);
}
int32_t test_svqdecw_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 17);
}
int64_t test_svqdecw_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_s64,,)(op, 0);
}
int64_t test_svqdecw_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_s64,,)(op, 17);
}
uint32_t test_svqdecw_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_u32,,)(op, 0);
}
uint32_t test_svqdecw_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_u32,,)(op, 17);
}
uint64_t test_svqdecw_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_u64,,)(op, 0);
}
uint64_t test_svqdecw_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_n_u64,,)(op, 17);
}
int32_t test_svqdecw_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqdecw_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqdecw_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqdecw_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqdecw_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqdecw_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqdecw_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqdecw_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint32_t test_svqdecw_s32(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_s32,,)(op, 0);
}
svint32_t test_svqdecw_s32_1(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_s32,,)(op, 17);
}
svuint32_t test_svqdecw_u32(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_u32,,)(op, 0);
}
svuint32_t test_svqdecw_u32_1(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw,_u32,,)(op, 17);
}
svint32_t test_svqdecw_pat_s32(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_s32,,)(op, SV_VL8, 0);
}
svint32_t test_svqdecw_pat_s32_1(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_s32,,)(op, SV_VL16, 17);
}
svuint32_t test_svqdecw_pat_u32(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_u32,,)(op, SV_VL32, 0);
}
svuint32_t test_svqdecw_pat_u32_1(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqdecw_pat,_u32,,)(op, SV_VL64, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincb.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqincb_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 0);
}
int32_t test_svqincb_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 17);
}
int64_t test_svqincb_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_s64,,)(op, 0);
}
int64_t test_svqincb_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_s64,,)(op, 17);
}
uint32_t test_svqincb_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_u32,,)(op, 0);
}
uint32_t test_svqincb_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_u32,,)(op, 17);
}
uint64_t test_svqincb_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_u64,,)(op, 0);
}
uint64_t test_svqincb_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb,_n_u64,,)(op, 17);
}
int32_t test_svqincb_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqincb_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqincb_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqincb_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqincb_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqincb_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqincb_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqincb_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincb_pat,_n_u64,,)(op, SV_VL7, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincd.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqincd_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 0);
}
int32_t test_svqincd_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 17);
}
int64_t test_svqincd_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_s64,,)(op, 0);
}
int64_t test_svqincd_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_s64,,)(op, 17);
}
uint32_t test_svqincd_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_u32,,)(op, 0);
}
uint32_t test_svqincd_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_u32,,)(op, 17);
}
uint64_t test_svqincd_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_u64,,)(op, 0);
}
uint64_t test_svqincd_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_n_u64,,)(op, 17);
}
int32_t test_svqincd_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqincd_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqincd_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqincd_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqincd_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqincd_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqincd_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqincd_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint64_t test_svqincd_s64(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_s64,,)(op, 0);
}
svint64_t test_svqincd_s64_1(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_s64,,)(op, 17);
}
svuint64_t test_svqincd_u64(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_u64,,)(op, 0);
}
svuint64_t test_svqincd_u64_1(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd,_u64,,)(op, 17);
}
svint64_t test_svqincd_pat_s64(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_s64,,)(op, SV_VL8, 0);
}
svint64_t test_svqincd_pat_s64_1(svint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_s64,,)(op, SV_VL16, 17);
}
svuint64_t test_svqincd_pat_u64(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_u64,,)(op, SV_VL32, 0);
}
svuint64_t test_svqincd_pat_u64_1(svuint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincd_pat,_u64,,)(op, SV_VL64, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qinch.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqinch_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 0);
}
int32_t test_svqinch_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 17);
}
int64_t test_svqinch_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_s64,,)(op, 0);
}
int64_t test_svqinch_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_s64,,)(op, 17);
}
uint32_t test_svqinch_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_u32,,)(op, 0);
}
uint32_t test_svqinch_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_u32,,)(op, 17);
}
uint64_t test_svqinch_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_u64,,)(op, 0);
}
uint64_t test_svqinch_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_n_u64,,)(op, 17);
}
int32_t test_svqinch_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqinch_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqinch_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqinch_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqinch_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqinch_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqinch_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqinch_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint16_t test_svqinch_s16(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_s16,,)(op, 0);
}
svint16_t test_svqinch_s16_1(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_s16,,)(op, 17);
}
svuint16_t test_svqinch_u16(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_u16,,)(op, 0);
}
svuint16_t test_svqinch_u16_1(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch,_u16,,)(op, 17);
}
svint16_t test_svqinch_pat_s16(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_s16,,)(op, SV_VL8, 0);
}
svint16_t test_svqinch_pat_s16_1(svint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_s16,,)(op, SV_VL16, 17);
}
svuint16_t test_svqinch_pat_u16(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_u16,,)(op, SV_VL32, 0);
}
svuint16_t test_svqinch_pat_u16_1(svuint16_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqinch_pat,_u16,,)(op, SV_VL64, 17);
}

clang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c

  • This file was added.
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify %s
#ifdef SVE_OVERLOADED_FORMS
// A simple used,unused... macro, long enough to represent any SVE builtin.
#define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
#else
#define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
#endif
#include <arm_sve.h>
int32_t test_svqincw_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 0);
}
int32_t test_svqincw_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 17);
}
int64_t test_svqincw_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 0);
}
int64_t test_svqincw_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 17);
}
uint32_t test_svqincw_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 0);
}
uint32_t test_svqincw_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 17);
}
uint64_t test_svqincw_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 0);
}
uint64_t test_svqincw_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 17);
}
int32_t test_svqincw_pat_n_s32(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_POW2, 0);
}
int32_t test_svqincw_pat_n_s32_1(int32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL1, 17);
}
int64_t test_svqincw_pat_n_s64(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL2, 0);
}
int64_t test_svqincw_pat_n_s64_1(int64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL3, 17);
}
uint32_t test_svqincw_pat_n_u32(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_u32,,)(op, SV_VL4, 0);
}
uint32_t test_svqincw_pat_n_u32_1(uint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_u32,,)(op, SV_VL5, 17);
}
uint64_t test_svqincw_pat_n_u64(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_u64,,)(op, SV_VL6, 0);
}
uint64_t test_svqincw_pat_n_u64_1(uint64_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_n_u64,,)(op, SV_VL7, 17);
}
svint32_t test_svqincw_s32(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_s32,,)(op, 0);
}
svint32_t test_svqincw_s32_1(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_s32,,)(op, 17);
}
svuint32_t test_svqincw_u32(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_u32,,)(op, 0);
}
svuint32_t test_svqincw_u32_1(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw,_u32,,)(op, 17);
}
svint32_t test_svqincw_pat_s32(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_s32,,)(op, SV_VL8, 0);
}
svint32_t test_svqincw_pat_s32_1(svint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_s32,,)(op, SV_VL16, 17);
}
svuint32_t test_svqincw_pat_u32(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_u32,,)(op, SV_VL32, 0);
}
svuint32_t test_svqincw_pat_u32_1(svuint32_t op)
{
// expected-error-re@+1 {{argument value {{[0-9]+}} is outside the valid range [1, 16]}}
return SVE_ACLE_FUNC(svqincw_pat,_u32,,)(op, SV_VL64, 17);
}

clang/utils/TableGen/SveEmitter.cpp

Show First 20 Lines • Show All 496 Lines • ▼ Show 20 Lines case 'o':
break; break;
case 'P': case 'P':
Signed = true; Signed = true;
Float = false; Float = false;
Predicate = true; Predicate = true;
Bitwidth = 16; Bitwidth = 16;
ElementBitwidth = 1; ElementBitwidth = 1;
break; break;
case 's':
case 'a': case 'a':
Bitwidth = ElementBitwidth; Bitwidth = ElementBitwidth;
NumVectors = 0; NumVectors = 0;
break; break;
case 'u': case 'u':
Predicate = false; Predicate = false;
Signed = false; Signed = false;
Float = false; Float = false;
▲ Show 20 Lines • Show All 684 Lines • Show Last 20 Lines