Add -debugify-and-strip-all to add debug info before a pass and remove it after

[dsanders]

Summary

This allows us to test each backend pass under the presence
of debug info using pre-existing tests. The tests should not
fail as a result of this so long as it's true that debug info
does not affect CodeGen.

In practice, a few tests are sensitive to this:

• Tests that check the pass structure (e.g. O0-pipeline.ll)
• Tests that check --debug output. Specifically instruction dumps containing MMO's (e.g. prelegalizercombiner-extends.ll)
• Tests that contain debugify metadata as mir-strip-debug will remove it (e.g. fastisel-debugvalue-undef.ll)
• Tests with partial debug info (e.g. patchable-function-entry-empty.mir had debug info but no !llvm.dbg.cu)
• Tests that check optimization remarks overly strictly (e.g. prologue-epilogue-remarks.mir)
• Tests that would inject the pass in an unsafe region (e.g. seqpairspill.mir would inject between register alloc and virt reg rewriter)

In all cases, the checks can either be updated or
--debugify-and-strip-all-safe=0 can be used to avoid being
affected by something like llvm-lit -Dllc='llc --debugify-and-strip-all-safe'

I tested this without the lost debug locations verifier to
confirm that AArch64 behaviour is unaffected (with the fixes
in this patch) and with it to confirm it finds the problems
without the additional RUN lines we had before.

Depends on D77886, D77887, D77747

[vsk]

This is really nice!

llvm/lib/CodeGen/TargetPassConfig.cpp

818

Period after 're-run'?

827

I'm confused by this: the comment says that "GlobalISel with the fallback path disabled and -run-pass seem to be unaffected". But here, IIUC if the fallback path is disabled (!isGlobalISelAbortEnabled), debugify is not safe. Is this a contradiction, or have I misunderstood what isGlobalISelAbortEnabled means?

[dsanders]

llvm/lib/CodeGen/TargetPassConfig.cpp

827

IIUC if the fallback path is disabled (!isGlobalISelAbortEnabled)

It's a bit unfortunate that we usually talk about the fallback path being enabled/disabled but the code says whether aborting is enabled. !isGlobalISelAbortEnabled means that aborting is disabled so we can continue into the fallback path

[vsk]

Lgtm, thanks!

llvm/lib/CodeGen/TargetPassConfig.cpp

827

Got it.

llvm/include/llvm/CodeGen/TargetPassConfig.h

private:
   unsigned StopBeforeCount = 0;
 
   unsigned StopAfterInstanceNum = 0;
   unsigned StopAfterCount = 0;
 
   bool Started = true;
   bool Stopped = false;
   bool AddingMachinePasses = false;
+  bool DebugifyIsSafe = true;
 
   /// Set the StartAfter, StartBefore and StopAfter passes to allow running only
   /// a portion of the normal code-gen pass sequence.
   ///
   /// If the StartAfter and StartBefore pass ID is zero, then compilation will
   /// begin at the normal point; otherwise, clear the Started flag to indicate
   /// that passes should not be added until the starting pass is seen.  If the
   /// Stop pass ID is zero, then compilation will continue to the end.
public:
 
   /// Add a pass to print the machine function if printing is enabled.
   void addPrintPass(const std::string &Banner);
 
   /// Add a pass to perform basic verification of the machine function if
   /// verification is enabled.
   void addVerifyPass(const std::string &Banner);
 
+  /// Add a pass to add synthesized debug info to the MIR.
+  void addDebugifyPass();
+
+  /// Add a pass to remove debug info from the MIR.
+  void addStripDebugPass();
+
   /// Add standard passes before a pass that's about to be added. For example,
   /// the DebugifyMachineModulePass if it is enabled.
-  void addMachinePrePasses();
+  void addMachinePrePasses(bool AllowDebugify = true);
 
   /// Add standard passes after a pass that has just been added. For example,
   /// the MachineVerifier if it is enabled.
   void addMachinePostPasses(const std::string &Banner, bool AllowPrint = true,
-                            bool AllowVerify = true);
+                            bool AllowVerify = true, bool AllowStrip = true);
 
   /// Check whether or not GlobalISel should abort on error.
   /// When this is disabled, GlobalISel will fall back on SDISel instead of
   /// erroring out.
   bool isGlobalISelAbortEnabled() const;
 
   /// Check whether or not a diagnostic should be emitted when GlobalISel
   /// uses the fallback path. In other words, it will emit a diagnostic

llvm/lib/CodeGen/MachineDebugify.cpp

return applyDebugifyMetadata(
         });
   }
 
   DebugifyMachineModule() : ModulePass(ID) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<MachineModuleInfoWrapperPass>();
     AU.addPreserved<MachineModuleInfoWrapperPass>();
+    AU.setPreservesCFG();
   }
 
   static char ID; // Pass identification.
 };
 char DebugifyMachineModule::ID = 0;
 
 } // end anonymous namespace
 
 INITIALIZE_PASS_BEGIN(DebugifyMachineModule, DEBUG_TYPE,
                       "Machine Debugify Module", false, false)
 INITIALIZE_PASS_END(DebugifyMachineModule, DEBUG_TYPE,
                     "Machine Debugify Module", false, false)
 
-ModulePass *createDebugifyMachineModulePass() {
+ModulePass *llvm::createDebugifyMachineModulePass() {
   return new DebugifyMachineModule();
 }

llvm/lib/CodeGen/MachineStripDebug.cpp

struct StripDebugMachineModule : public ModulePass {
 
   StripDebugMachineModule() : StripDebugMachineModule(OnlyDebugifiedDefault) {}
   StripDebugMachineModule(bool OnlyDebugified)
       : ModulePass(ID), OnlyDebugified(OnlyDebugified) {}
 
   void getAnalysisUsage(AnalysisUsage &AU) const override {
     AU.addRequired<MachineModuleInfoWrapperPass>();
     AU.addPreserved<MachineModuleInfoWrapperPass>();
+    AU.setPreservesCFG();
   }
 
   static char ID; // Pass identification.
 
 protected:
   bool OnlyDebugified;
 };
 char StripDebugMachineModule::ID = 0;
 
 } // end anonymous namespace
 
 INITIALIZE_PASS_BEGIN(StripDebugMachineModule, DEBUG_TYPE,
                       "Machine Strip Debug Module", false, false)
 INITIALIZE_PASS_END(StripDebugMachineModule, DEBUG_TYPE,
                     "Machine Strip Debug Module", false, false)
 
-ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified) {
+ModulePass *llvm::createStripDebugMachineModulePass(bool OnlyDebugified) {
   return new StripDebugMachineModule(OnlyDebugified);
 }

llvm/lib/CodeGen/TargetPassConfig.cpp

 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
     cl::desc("Print LLVM IR input to isel pass"));
 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
     cl::desc("Dump garbage collector data"));
 static cl::opt<cl::boolOrDefault>
     VerifyMachineCode("verify-machineinstrs", cl::Hidden,
                       cl::desc("Verify generated machine code"),
                       cl::ZeroOrMore);
+static cl::opt<cl::boolOrDefault> DebugifyAndStripAll(
+    "debugify-and-strip-all-safe", cl::Hidden,
+    cl::desc(
+        "Debugify MIR before and Strip debug after "
+        "each pass except those known to be unsafe when debug info is present"),
+    cl::ZeroOrMore);
 enum RunOutliner { AlwaysOutline, NeverOutline, TargetDefault };
 // Enable or disable the MachineOutliner.
 static cl::opt<RunOutliner> EnableMachineOutliner(
     "enable-machine-outliner", cl::desc("Enable the machine outliner"),
     cl::Hidden, cl::ValueOptional, cl::init(TargetDefault),
     cl::values(clEnumValN(AlwaysOutline, "always",
                           "Run on all functions guaranteed to be beneficial"),
                clEnumValN(NeverOutline, "never", "Disable all outlining"),

 #ifdef EXPENSIVE_CHECKS
   if (VerifyMachineCode == cl::BOU_UNSET)
     Verify = TM->isMachineVerifierClean();
 #endif
   if (Verify)
     PM->add(createMachineVerifierPass(Banner));
 }
 
-void TargetPassConfig::addMachinePrePasses() {}
+void TargetPassConfig::addDebugifyPass() {
+  PM->add(createDebugifyMachineModulePass());
+}
+
+void TargetPassConfig::addStripDebugPass() {
+  PM->add(createStripDebugMachineModulePass(/*OnlyDebugified=*/true));
+}
+
+void TargetPassConfig::addMachinePrePasses(bool AllowDebugify) {
+  if (AllowDebugify && DebugifyAndStripAll == cl::BOU_TRUE && DebugifyIsSafe)
+    addDebugifyPass();
+}
 
 void TargetPassConfig::addMachinePostPasses(const std::string &Banner,
-                                            bool AllowPrint, bool AllowVerify) {
+                                            bool AllowPrint, bool AllowVerify,
+                                            bool AllowStrip) {
+  if (DebugifyAndStripAll == cl::BOU_TRUE && DebugifyIsSafe)
+    addStripDebugPass();
   if (AllowPrint)
     addPrintPass(Banner);
   if (AllowVerify)
     addVerifyPass(Banner);
 }
 
 /// Add common target configurable passes that perform LLVM IR to IR transforms
 /// following machine independent optimization.
bool TargetPassConfig::addCoreISelPasses() {
   if (Selector == SelectorType::FastISel) {
     TM->setFastISel(true);
     TM->setGlobalISel(false);
   } else if (Selector == SelectorType::GlobalISel) {
     TM->setFastISel(false);
     TM->setGlobalISel(true);
   }
 
+  // FIXME: Injecting into the DAGISel pipeline seems to cause issues with
+  //        analyses needing to be re-run. This can result in being unable to
+  //        schedule passes (particularly with 'Function Alias Analysis
+  //        Results'). It's not entirely clear why but AFAICT this seems to be
+  //        due to one FunctionPassManager not being able to use analyses from a
+  //        previous one. As we're injecting a ModulePass we break the usual
+  //        pass manager into two. GlobalISel with the fallback path disabled
+  //        and -run-pass seem to be unaffected. The majority of GlobalISel
+  //        testing uses -run-pass so this probably isn't too bad.
+  SaveAndRestore<bool> SavedDebugifyIsSafe(DebugifyIsSafe);
+  if (Selector != SelectorType::GlobalISel || !isGlobalISelAbortEnabled())
+    DebugifyIsSafe = false;
+
   // Add instruction selector passes.
   if (Selector == SelectorType::GlobalISel) {
     SaveAndRestore<bool> SavedAddingMachinePasses(AddingMachinePasses, true);
     if (addIRTranslator())
       return true;
 
     addPreLegalizeMachineIR();
 
void TargetPassConfig::addMachinePasses() {
   }
 
   if (TM->Options.EnableIPRA)
     addPass(createRegUsageInfoPropPass());
 
   // Run pre-ra passes.
   addPreRegAlloc();
 
+  // Debugifying the register allocator passes seems to provoke some
+  // non-determinism that affects CodeGen and there doesn't seem to be a point
+  // where it becomes safe again so stop debugifying here.
+  DebugifyIsSafe = false;
+
   // Run register allocation and passes that are tightly coupled with it,
   // including phi elimination and scheduling.
   if (getOptimizeRegAlloc())
     addOptimizedRegAlloc();
   else
     addFastRegAlloc();
 
   // Run post-ra passes.
bool TargetPassConfig::addRegAssignmentOptimized() {
   // Add the selected register allocation pass.
   addPass(createRegAllocPass(true));
 
   // Allow targets to change the register assignments before rewriting.
   addPreRewrite();
 
   // Finally rewrite virtual registers.
   addPass(&VirtRegRewriterID);
+
   // Perform stack slot coloring and post-ra machine LICM.
   //
   // FIXME: Re-enable coloring with register when it's capable of adding
   // kill markers.
   addPass(&StackSlotColoringID);
 
   return true;
 }

llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll

 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -O0 \
 ; RUN:   | FileCheck %s --check-prefixes=ENABLED,ENABLED-O0,FALLBACK
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs -O0 \
 ; RUN:   | FileCheck %s --check-prefixes=ENABLED,ENABLED-O0,FALLBACK,VERIFY,VERIFY-O0
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=1 \
 ; RUN:   | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix NOFALLBACK
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -O0 -aarch64-enable-global-isel-at-O=0 -global-isel-abort=2  \
 ; RUN:   | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O0 --check-prefix FALLBACK
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -global-isel \
 ; RUN:   | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK --check-prefix ENABLED-O1
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -global-isel -global-isel-abort=2 \
 ; RUN:   | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK  --check-prefix ENABLED-O1
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -O1 -aarch64-enable-global-isel-at-O=3 \
 ; RUN:   | FileCheck %s --check-prefix ENABLED  --check-prefix ENABLED-O1
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -O1 -aarch64-enable-global-isel-at-O=0 \
 ; RUN:   | FileCheck %s --check-prefix DISABLED
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 -aarch64-enable-global-isel-at-O=-1 \
 ; RUN:   | FileCheck %s --check-prefix DISABLED
 
 ; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -verify-machineinstrs=0 | FileCheck %s --check-prefix DISABLED
 
 ; RUN: llc -mtriple=aarch64-- -fast-isel=0 -global-isel=false \
+; RUN:   --debugify-and-strip-all-safe=0 \
 ; RUN:   -debug-pass=Structure %s -o /dev/null 2>&1 -verify-machineinstrs=0 \
 ; RUN:   | FileCheck %s --check-prefix DISABLED
 
 ; ENABLED:       IRTranslator
 ; VERIFY-NEXT:   Verify generated machine code
 ; ENABLED-NEXT:  Analysis for ComputingKnownBits
 ; ENABLED-O1-NEXT:  MachineDominator Tree Construction
 ; ENABLED-NEXT:  PreLegalizerCombiner

llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads-cornercases.mir

; CHECK: bb.3.exit:
     ; CHECK: $w1 = COPY [[T6]](s32)
     $w0 = COPY %3
     $w1 = COPY %9
 
 # Check that we report the correct modifications to the observer. This acts as
 # a test of the debug output and a test.
 #
 # CHECK-WORKLIST-LABEL: Generic MI Combiner for: multiple_copies
-# CHECK-WORKLIST:       Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST:       Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST:       Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG:   Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST-DAG:   Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST-DAG:   Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
 # CHECK-WORKLIST-DAG:   Changed: [[IN3]]:_(s8) = G_ADD [[NEW1:%[0-9]+]]:_, [[IN4]]:_
 # CHECK-WORKLIST-DAG:   Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
 # CHECK-WORKLIST-DAG:   Changed: [[IN5]]:_(s8) = G_SUB [[NEW2:%[0-9]+]]:_, [[IN6]]:_
 # CHECK-WORKLIST-DAG:   Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG:   Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST-DAG:   Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST-DAG:   Created: [[NEW1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
 # CHECK-WORKLIST-DAG:   Created: [[NEW2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
 # CHECK-WORKLIST:       Try combining
 ...
 
 ---
 name:            sink_to_phi_trivially_dominating
 # CHECK-LABEL: name: sink_to_phi_trivially_dominating
; CHECK: bb.3.exit:
     %10:_(s32) = G_SEXT %2
     %11:_(s32) = G_ZEXT %9
     ; CHECK: [[T6:%[0-9]+]]:_(s32) = G_ZEXT [[T5]](s8)
     ; CHECK: $w0 = COPY [[T0]](s32)
     ; CHECK: $w1 = COPY [[T6]](s32)
     $w0 = COPY %10
     $w1 = COPY %11
 # CHECK-WORKLIST-LABEL: Generic MI Combiner for: sink_to_phi_nondominating
-# CHECK-WORKLIST:       Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST:       Try combining [[IN0:%[0-9]+]]:_(s8) = G_LOAD [[IN1:%[0-9]+]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST:       Preferred use is: [[IN2:%[0-9]+]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG:   Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST-DAG:   Changing: [[IN0]]:_(s8) = G_LOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST-DAG:   Creating: G_TRUNC
 # CHECK-WORKLIST-DAG:   Changing: [[IN3:%[0-9]+]]:_(s8) = G_ADD [[IN0]]:_, [[IN4:%[0-9]+]]:_
 # CHECK-WORKLIST-DAG:   Changed: [[IN3]]:_(s8) = G_ADD [[OUT1:%[0-9]+]]:_, [[IN4]]:_
 # CHECK-WORKLIST-DAG:   Creating: G_TRUNC
 # CHECK-WORKLIST-DAG:   Changing: [[IN5:%[0-9]+]]:_(s8) = G_SUB [[IN0]]:_, [[IN6:%[0-9]+]]:_
 # CHECK-WORKLIST-DAG:   Changed: [[IN5]]:_(s8) = G_SUB [[OUT2:%[0-9]+]]:_, [[IN6]]:_
 # CHECK-WORKLIST-DAG:   Erasing: [[IN2]]:_(s32) = G_SEXT [[IN0]]:_(s8)
-# CHECK-WORKLIST-DAG:   Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0) :: (load 1 from %ir.addr)
+# CHECK-WORKLIST-DAG:   Changed: [[IN2]]:_(s32) = G_SEXTLOAD [[IN1]]:_(p0){{.*}} :: (load 1 from %ir.addr)
 # CHECK-WORKLIST-DAG:   Created: [[OUT1]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
 # CHECK-WORKLIST-DAG:   Created: [[OUT2]]:_(s8) = G_TRUNC [[IN2]]:_(s32)
 # CHECK-WORKLIST:       Try combining
 ...
 
 ---
 name:            sink_to_phi_emptyblock
 # CHECK-LABEL: name: sink_to_phi_emptyblock

llvm/test/CodeGen/AArch64/O0-pipeline.ll

-; RUN: llc -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
+; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
+; RUN:     grep -v "Verify generated machine code" | FileCheck %s
 
 ; REQUIRES: asserts
 
 ; CHECK-LABEL: Pass Arguments:
 ; CHECK-NEXT: Target Library Information
 ; CHECK-NEXT: Target Pass Configuration
 ; CHECK-NEXT: Machine Module Information
 ; CHECK-NEXT: Target Transform Information

llvm/test/CodeGen/AArch64/O3-pipeline.ll

-; RUN: llc -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s
+; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
+; RUN:     grep -v "Verify generated machine code" | FileCheck %s
 
 ; REQUIRES: asserts
 
 ; CHECK-LABEL: Pass Arguments:
 ; CHECK-NEXT: Target Library Information
 ; CHECK-NEXT: Target Pass Configuration
 ; CHECK-NEXT: Machine Module Information
 ; CHECK-NEXT: Target Transform Information

llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll

 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -pass-remarks-analysis=asm-printer \
+; RUN:       --debugify-and-strip-all-safe=0 \
 ; RUN:       -verify-machineinstrs \
 ; RUN:       -pass-remarks-with-hotness=1 -asm-verbose=0 \
 ; RUN:       -debug-only=lazy-machine-block-freq,block-freq \
 ; RUN:       -debug-pass=Executions 2>&1 | FileCheck %s -check-prefix=HOTNESS
 
 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -pass-remarks-analysis=asm-printer \
+; RUN:       --debugify-and-strip-all-safe=0 \
 ; RUN:       -verify-machineinstrs \
 ; RUN:       -pass-remarks-with-hotness=0 -asm-verbose=0 \
 ; RUN:       -debug-only=lazy-machine-block-freq,block-freq \
 ; RUN:       -debug-pass=Executions 2>&1 | FileCheck %s -check-prefix=NO_HOTNESS
 
 ; REQUIRES: asserts
 
 

llvm/test/CodeGen/AArch64/fastisel-debugvalue-undef.ll

 ; RUN: llc -O0 -fast-isel=1 -o - -print-after="finalize-isel" %s 2>&1 | FileCheck %s
 
 ; Check that we emit a DBG_VALUE for the `@llvm.dbg.value` which has `undef` has first arg.
 
 target triple = "arm64-apple-ios13.4.0"
 define void @foo() !dbg !6 {
   ; CHECK: DBG_VALUE $noreg, $noreg, !"1", !DIExpression()
   call void @llvm.dbg.value(metadata i32* undef, metadata !9, metadata !DIExpression()), !dbg !11
   ret void, !dbg !12
 }
 
 declare void @llvm.dbg.value(metadata, metadata, metadata)
 
 !llvm.dbg.cu = !{!0}
-!llvm.debugify = !{!3, !4}
 !llvm.module.flags = !{!5}
 
 !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
 !1 = !DIFile(filename: "t.ll", directory: "/")
 !2 = !{}
-!3 = !{i32 2}
-!4 = !{i32 1}
 !5 = !{i32 2, !"Debug Info Version", i32 3}
 !6 = distinct !DISubprogram(name: "foo", linkageName: "foo", scope: null, file: !1, line: 1, type: !7, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8)
 !7 = !DISubroutineType(types: !2)
 !8 = !{!9}
 !9 = !DILocalVariable(name: "1", scope: !6, file: !1, line: 1, type: !10)
 !10 = !DIBasicType(name: "ty64", size: 64, encoding: DW_ATE_unsigned)
 !11 = !DILocation(line: 1, column: 1, scope: !6)
 !12 = !DILocation(line: 2, column: 1, scope: !6)

llvm/test/CodeGen/AArch64/patchable-function-entry-empty.mir

 # RUN: llc -mtriple=aarch64 -run-pass=patchable-function %s -o - | FileCheck %s
 
 ## The initial .loc covers PATCHABLE_FUNCTION_ENTER.
 ## Emitting a new .loc may create a prologue_end prematurely.
 # CHECK:    name: empty
 # CHECK:    bb.0.entry
 # CHECK:      PATCHABLE_FUNCTION_ENTER{{$}}
-# CHECK-NEXT: RET undef $lr, debug-location !DILocation(line: 1,
+# CHECK-NEXT: RET undef $lr, debug-location !9
 
 --- |
-  define void @empty() #0 !dbg !7 {
+  define void @empty() #0 !dbg !6 {
   entry:
-    ret void, !dbg !10
+    ret void, !dbg !9
   }
 
   attributes #0 = { "patchable-function-entry"="1" }
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 11.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
   !1 = !DIFile(filename: "a.c", directory: "/tmp")
   !2 = !{}
   !3 = !{i32 7, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = !{i32 1, !"wchar_size", i32 4}
-  !6 = !{!"clang version 11.0.0 "}
-  !7 = distinct !DISubprogram(name: "empty", scope: !1, file: !1, line: 1, type: !8, scopeLine: 1, flags: DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
-  !8 = !DISubroutineType(types: !9)
-  !9 = !{null}
-  !10 = !DILocation(line: 1, column: 61, scope: !7)
+  !6 = distinct !DISubprogram(name: "empty", scope: !1, file: !1, line: 1, type: !7, scopeLine: 1, flags: DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
+  !7 = !DISubroutineType(types: !8)
+  !8 = !{null}
+  !9 = !DILocation(line: 1, column: 61, scope: !6)
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!3, !4, !5}
 
 ...
 ---
 name:            empty
 alignment:       4
 tracksRegLiveness: true
 body:             |
   bb.0.entry:
     liveins: $lr
-    RET undef $lr, debug-location !10
+    RET undef $lr, debug-location !9
 
 ...

llvm/test/CodeGen/AArch64/prologue-epilogue-remarks.mir

 # RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=prologepilog -pass-remarks-output=%t -pass-remarks-analysis=prologepilog -o /dev/null %s 2>&1
 # RUN: cat %t | FileCheck %s
 ...
 ---
 name:            fun0
 stack:
   - { id: 0, type: default, offset: 0, size: 8, alignment: 4 }
-# CHECK: --- !Analysis
+# CHECK-LABEL: --- !Analysis
 # CHECK-NEXT: Pass:            prologepilog
 # CHECK-NEXT: Name:            StackSize
-# CHECK-NEXT: Function:        fun0
+# CHECK:      Function:        fun0
 # CHECK-NEXT: Args:
 # CHECK-NEXT:   - NumStackBytes:   '16'
 # CHECK-NEXT:   - String:          ' stack bytes in function'
 # CHECK-NEXT: ...
 constants:
 body:             |
   bb.0:
     RET_ReallyLR
 
 ...
 ---
 name:            fun1
 stack:
   - { id: 0, type: default, offset: 0, size: 19, alignment: 4 }
-# CHECK: --- !Analysis
+# CHECK-LABEL: --- !Analysis
 # CHECK-NEXT: Pass:            prologepilog
 # CHECK-NEXT: Name:            StackSize
-# CHECK-NEXT: Function:        fun1
+# CHECK:      Function:        fun1
 # CHECK-NEXT: Args:
 # CHECK-NEXT:   - NumStackBytes:   '32'
 # CHECK-NEXT:   - String:          ' stack bytes in function'
 # CHECK-NEXT: ...
 constants:
 body:             |
   bb.0:
     RET_ReallyLR
 
 ...
 ---
 name:            fun2
 stack:
   - { id: 0, type: default, offset: 0, size: 1024, alignment: 4 }
-# --- !Analysis
+# CHECK-LABEL: --- !Analysis
 # CHECK: Pass:            prologepilog
 # CHECK-NEXT: Name:            StackSize
-# CHECK-NEXT: Function:        fun2
+# CHECK:      Function:        fun2
 # CHECK-NEXT: Args:
 # CHECK-NEXT:   - NumStackBytes:   '1040'
 # CHECK-NEXT:   - String:          ' stack bytes in function'
 # CHECK-NEXT: ...
 constants:
 body:             |
   bb.0:
     RET_ReallyLR
 
 ...

llvm/test/CodeGen/AArch64/seqpairspill.mir

-# RUN: llc -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=greedy,virtregrewriter | FileCheck %s
+# RUN: llc --debugify-and-strip-all-safe=0 -o - %s -mtriple=aarch64-- -mattr=+v8.1a -run-pass=greedy,virtregrewriter | FileCheck %s
 # Make sure spills/reloads from xseqpairs and wseqpairs work correctly.
 ---
 # CHECK-LABEL: name: spill_reload_xseqpairs
 name: spill_reload_xseqpairs
 body: |
   bb.0:
     ; Check the spill/reload sequence for the %0 register
     ; CHECK: renamable $[[REG0:[a-z0-9]+]]_[[REG1:[a-z0-9]+]] = CASPALX

llvm/test/CodeGen/AArch64/stp-opt-with-renaming-debug.mir

 # RUN: llc -run-pass=aarch64-ldst-opt -mtriple=arm64-apple-iphoneos -aarch64-load-store-renaming=true -verify-machineinstrs -o - %s | FileCheck %s
 --- |
   define void @test_dbg_value1() #0 { ret void }
   define void @test_dbg_value2() #0 { ret void }
 
   !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "llvm", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
   !1 = !DIFile(filename: "dbg.ll", directory: "/tmp")
   !2 = !{}
   !5 = distinct !DISubprogram(name: "test_dbg_value", scope: !1, file: !1, line: 1, type: !6, isLocal: false, isDefinition: true, scopeLine: 1, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
   !6 = !DISubroutineType(types: !2)
   !7 = !DILocalVariable(name: "x", arg: 1, scope: !5, file: !1, line: 1, type: !8)
   !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
   !9 = !DILocation(line: 1, column: 1, scope: !5)
+  !10 = !{i32 2, !"Debug Info Version", i32 3}
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!10}
 ---
 # Check we do not crash when checking $noreg debug operands.
 #
 # CHECK-LABEL: name: test_dbg_value1
 # CHECK: bb.0:
 # CHECK-NEXT: liveins: $x0, $x1
 # CHECK:       $x10, renamable $x8 = LDPXi renamable $x0, 0 :: (load 8)
 # CHECK-NEXT:  renamable $x9 = LDRXui renamable $x0, 1 :: (load 8)