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[ARM,MVE] Add the `vsbciq` intrinsics.
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Authored by simon_tatham on Mar 2 2020, 3:46 AM.

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Summary

These are exactly parallel to the existing vadciq intrinsics, which
we implemented last year as part of the original MVE intrinsics
framework setup.

Just like VADC/VADCI, the MVE VSBC/VSBCI instructions deliver two
outputs, both of which the intrinsic exposes: a modified vector
register and a carry flag. So they have to be instruction-selected in
C++ rather than Tablegen. However, in this case, that's trivial: the
same C++ isel routine we already have for VADC works unchanged, and
all we have to do is to pass it a different instruction id.

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Event Timeline

simon_tatham created this revision.Mar 2 2020, 3:46 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptMar 2 2020, 3:46 AM
miyuki accepted this revision.Mar 2 2020, 4:59 AM

LGTM

This revision is now accepted and ready to land.Mar 2 2020, 4:59 AM

clang-formatted the code added to the C test source.

This revision was automatically updated to reflect the committed changes.