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[ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.
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Authored by simon_tatham on Feb 27 2020, 6:56 AM.

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Summary

These instructions work like VMOVN (narrowing a vector of wide values
to half size, and overwriting every other lane of an output register
with the result), except that the narrowing conversion is saturating.
They come in three signedness flavours: signed to signed, unsigned to
unsigned, and signed to unsigned. All are represented in IR by a
target-specific intrinsic that takes two separate 'unsigned' flags.

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Event Timeline

simon_tatham created this revision.Feb 27 2020, 6:56 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptFeb 27 2020, 6:56 AM
dmgreen accepted this revision.Feb 28 2020, 5:49 AM

I had some code somewhere that was trying to produce VQMOVNbh from codegen, treating them as a saturating truncate. It would only work in certain situations thought, relying on demand bits to not use the top half. And IIRC it was making some test cases worse, which I never got a chance to check what was going wrong, which is why it never made it into tree. I may try and figure out what was going wrong there.

Anyway, this LGTM for the more general cases needed in the intrinsics.

This revision is now accepted and ready to land.Feb 28 2020, 5:49 AM
This revision was automatically updated to reflect the committed changes.