[ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI

[miyuki]

Summary

This patch changes the underlying type of the ARM::ArchExtKind
enumeration to uint64_t and adjusts the related code.

The goal of the patch is to prepare the code base for a new
architecture extension.

[miyuki]

Fix one missing unsigned->uint64_t occurrence

[merge_guards_bot]

Unit tests: fail. 62298 tests passed, 121 failed and 845 were skipped.

failed: Clang.CXX/modules-ts/basic/basic_link/p3.cppm
failed: Clang.CXX/modules-ts/codegen-basics.cppm
failed: Clang.CodeGen/arm-aapcs-vfp.c
failed: Clang.CodeGen/attr-cpuspecific.c
failed: Clang.CodeGen/attr-target-mv-func-ptrs.c
failed: Clang.CodeGen/attr-target-mv-va-args.c
failed: Clang.CodeGenCUDA/address-spaces.cu
failed: Clang.CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
failed: Clang.CodeGenCUDA/amdgpu-kernel-attrs.cu
failed: Clang.CodeGenCUDA/amdgpu-visibility.cu
failed: Clang.CodeGenCUDA/convergent.cu
failed: Clang.CodeGenCUDA/cuda-builtin-vars.cu
failed: Clang.CodeGenCUDA/device-stub.cu
failed: Clang.CodeGenCUDA/device-var-init.cu
failed: Clang.CodeGenCUDA/device-vtable.cu
failed: Clang.CodeGenCUDA/function-overload.cu
failed: Clang.CodeGenCUDA/kernel-amdgcn.cu
failed: Clang.CodeGenCUDA/kernel-args.cu
failed: Clang.CodeGenCUDA/library-builtin.cu
failed: Clang.CodeGenCUDA/link-device-bitcode.cu
failed: Clang.CodeGenCUDA/nothrow.cu
failed: Clang.CodeGenCUDA/propagate-metadata.cu
failed: Clang.CodeGenCUDA/ptx-kernels.cu
failed: Clang.CodeGenCUDA/types.cu
failed: Clang.CodeGenCUDA/usual-deallocators.cu
failed: Clang.CodeGenCXX/attr-exclude_from_explicit_instantiation.dont_assume_extern_instantiation.cpp
failed: Clang.CodeGenCXX/attr-target-mv-diff-ns.cpp
failed: Clang.CodeGenCXX/attr-target-mv-member-funcs.cpp
failed: Clang.CodeGenCXX/attr-target-mv-out-of-line-defs.cpp
failed: Clang.CodeGenCXX/attr-target-mv-overloads.cpp
failed: Clang.CodeGenCXX/attr.cpp
failed: Clang.CodeGenCXX/builtin-source-location.cpp
failed: Clang.CodeGenCXX/conditional-temporaries.cpp
failed: Clang.CodeGenCXX/const-init-cxx2a.cpp
failed: Clang.CodeGenCXX/ctor-dtor-alias.cpp
failed: Clang.CodeGenCXX/cxx0x-initializer-stdinitializerlist-pr12086.cpp
failed: Clang.CodeGenCXX/cxx0x-initializer-stdinitializerlist-startend.cpp
failed: Clang.CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp
failed: Clang.CodeGenCXX/cxx11-extern-constexpr.cpp
failed: Clang.CodeGenCXX/cxx11-initializer-aggregate.cpp
failed: Clang.CodeGenCXX/cxx11-thread-local-reference.cpp
failed: Clang.CodeGenCXX/cxx11-thread-local-visibility.cpp
failed: Clang.CodeGenCXX/cxx1y-variable-template-linkage.cpp
failed: Clang.CodeGenCXX/cxx1z-inline-variables.cpp
failed: Clang.CodeGenCXX/explicit-instantiation.cpp
failed: Clang.CodeGenCXX/inheriting-constructor.cpp
failed: Clang.CodeGenCXX/member-function-pointers.cpp
failed: Clang.CodeGenCXX/microsoft-uuidof.cpp
failed: Clang.CodeGenCXX/no-odr-use.cpp
failed: Clang.CodeGenCXX/pragma-visibility.cpp
failed: Clang.CodeGenCXX/regcall.cpp
failed: Clang.CodeGenCXX/static-data-member.cpp
failed: Clang.CodeGenCXX/static-init.cpp
failed: Clang.CodeGenCXX/static-member-variable-explicit-specialization.cpp
failed: Clang.CodeGenCXX/visibility-inlines-hidden-staticvar.cpp
failed: Clang.CodeGenCXX/vtable-linkage.cpp
failed: Clang.CodeGenCXX/x86_64-arguments.cpp
failed: Clang.CodeGenCoroutines/coro-await-resume-eh.cpp
failed: Clang.CodeGenCoroutines/coro-await.cpp
failed: Clang.CodeGenCoroutines/coro-cleanup.cpp
failed: Clang.CodeGenCoroutines/coro-gro-nrvo.cpp
failed: Clang.CodeGenCoroutines/coro-params.cpp
failed: Clang.CodeGenCoroutines/coro-ret-void.cpp
failed: Clang.CodeGenObjC/assign.m
failed: Clang.CodeGenObjC/constant-strings.m
failed: Clang.CodeGenObjC/gnu-exceptions.m
failed: Clang.CodeGenObjC/gnustep2-proto.m
failed: Clang.CodeGenObjC/objfw.m
failed: Clang.CodeGenObjC/property.m
failed: Clang.CodeGenObjC/stret_lookup.m
failed: Clang.CodeGenObjCXX/designated-initializers.mm
failed: Clang.CodeGenObjCXX/objfw-exceptions.mm
failed: Clang.CodeGenOpenCL/addr-space-struct-arg.cl
failed: Clang.CodeGenOpenCL/address-spaces-conversions.cl
failed: Clang.CodeGenOpenCL/amdgcn-automatic-variable.cl
failed: Clang.CodeGenOpenCL/amdgcn-large-globals.cl
failed: Clang.CodeGenOpenCL/amdgpu-abi-struct-coerce.cl
failed: Clang.CodeGenOpenCL/amdgpu-attrs.cl
failed: Clang.CodeGenOpenCL/amdgpu-call-kernel.cl
failed: Clang.CodeGenOpenCL/amdgpu-calling-conv.cl
failed: Clang.CodeGenOpenCL/amdgpu-enqueue-kernel.cl
failed: Clang.CodeGenOpenCL/amdgpu-nullptr.cl
failed: Clang.CodeGenOpenCL/as_type.cl
failed: Clang.CodeGenOpenCL/bool_cast.cl
failed: Clang.CodeGenOpenCL/cl20-device-side-enqueue.cl
failed: Clang.CodeGenOpenCL/constant-addr-space-globals.cl
failed: Clang.CodeGenOpenCL/convergent.cl
failed: Clang.CodeGenOpenCL/extension-begin.cl
failed: Clang.CodeGenOpenCL/kernel-arg-info.cl
failed: Clang.CodeGenOpenCL/kernels-have-spir-cc-by-default.cl
failed: Clang.CodeGenOpenCL/partial_initializer.cl
failed: Clang.CodeGenOpenCL/pipe_types.cl
failed: Clang.CodeGenOpenCL/ptx-calls.cl
failed: Clang.CodeGenOpenCL/ptx-kernels.cl
failed: Clang.CodeGenOpenCL/sampler.cl
failed: Clang.CodeGenOpenCL/shifts.cl
failed: Clang.CodeGenOpenCL/spir-calling-conv.cl
failed: Clang.CodeGenOpenCL/vectorLoadStore.cl
failed: Clang.CodeGenOpenCL/visibility.cl
failed: Clang.CodeGenOpenCL/vla.cl
failed: Clang.CodeGenOpenCLCXX/address-space-deduction.cl
failed: Clang.CodeGenOpenCLCXX/addrspace-derived-base.cl
failed: Clang.CodeGenOpenCLCXX/addrspace-operators.cl
failed: Clang.CodeGenOpenCLCXX/addrspace-references.cl
failed: Clang.CodeGenOpenCLCXX/addrspace-with-class.cl
failed: Clang.CodeGenOpenCLCXX/constexpr.cl
failed: Clang.Modules/codegen-flags.test
failed: Clang.Modules/codegen-opt.test
failed: Clang.Modules/codegen.test
failed: Clang.Modules/initializers.cpp
failed: Clang.Modules/templates-2.mm
failed: Clang.Modules/templates.mm
failed: Clang.OpenMP/allocate_codegen.cpp
failed: Clang.OpenMP/declare_variant_mixed_codegen.c
failed: Clang.OpenMP/parallel_codegen.cpp
failed: Clang.OpenMP/parallel_master_codegen.cpp
failed: Clang.OpenMP/simd_metadata.c
failed: Clang.OpenMP/threadprivate_codegen.cpp
failed: Clang.PCH/codegen.cpp
failed: Clang.Parser/pragma-visibility2.c
failed: Clang.Profile/cxx-abc-deleting-dtor.cpp

clang-tidy: pass.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

Pre-merge checks is in beta. Report issue. Please join beta or enable it for your project.

[dmgreen]

I added some This?'s around, which may or may not be needed too.

llvm/include/llvm/Support/ARMTargetParser.h

196

This?

llvm/lib/Support/ARMTargetParser.cpp

374

This?

489

This?

502

This?

[miyuki]

More missing unsigned->uint64_t changes, removed a redundant getAEKID function (identical to parseArchExt).

[dmgreen]

Thanks. LGTM.

[simon_tatham]

I wonder if it's worth temporarily redefining all the existing AEK_FOO ids to values that don't fit in 32 bits, and making sure the whole test suite still passes. That should catch any remaining cases where an integer type should have been widened.

[miyuki]

In D73906#1856615, @simon_tatham wrote:

I wonder if it's worth temporarily redefining all the existing AEK_FOO ids to values that don't fit in 32 bits, and making sure the whole test suite still passes. That should catch any remaining cases where an integer type should have been widened.

I will try that locally.

clang/lib/Basic/Targets/ARM.cpp

if (CPUArch != llvm::ARM::ArchKind::INVALID) {
     TargetFeatures.push_back(ArchFeature);
   }
 
   // get default FPU features
   unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch);
   llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures);
 
   // get default Extension features
-  unsigned Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
+  uint64_t Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
   llvm::ARM::getExtensionFeatures(Extensions, TargetFeatures);
 
   for (auto Feature : TargetFeatures)
     if (Feature[0] == '+')
       Features[Feature.drop_front(1)] = true;
 
   // Enable or disable thumb-mode explicitly per function to enable mixed
   // ARM and Thumb code generation.

clang/lib/Driver/ToolChains/Arch/ARM.cpp

void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
   }
 }
 
 // Handle -mhwdiv=.
 // FIXME: Use ARMTargetParser.
 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
                                 const ArgList &Args, StringRef HWDiv,
                                 std::vector<StringRef> &Features) {
-  unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
+  uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv);
   if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
     D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
 }
 
 // Handle -mfpu=.
 static unsigned getARMFPUFeatures(const Driver &D, const Arg *A,
                                   const ArgList &Args, StringRef FPU,
                                   std::vector<StringRef> &Features) {
static bool DecodeARMFeatures(const Driver &D, StringRef text,
   return true;
 }
 
 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
                                      std::vector<StringRef> &Features) {
   CPU = CPU.split("+").first;
   if (CPU != "generic") {
     llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
-    unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
+    uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
     llvm::ARM::getExtensionFeatures(Extension, Features);
   }
 }
 
 // Check if -march is valid by checking if it can be canonicalised and parsed.
 // getARMArch is used here instead of just checking the -march value in order
 // to handle -march=native correctly.
 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,

llvm/include/llvm/Support/ARMTargetParser.h

 #include "llvm/Support/ARMBuildAttributes.h"
 #include <vector>
 
 namespace llvm {
 namespace ARM {
 
 // Arch extension modifiers for CPUs.
 // Note that this is not the same as the AArch64 list
-enum ArchExtKind : unsigned {
+enum ArchExtKind : uint64_t {
   AEK_INVALID =     0,
   AEK_NONE =        1,
   AEK_CRC =         1 << 1,
   AEK_CRYPTO =      1 << 2,
   AEK_FP =          1 << 3,
   AEK_HWDIVTHUMB =  1 << 4,
   AEK_HWDIVARM =    1 << 5,
   AEK_MP =          1 << 6,
   AEK_SIMD =        1 << 7,
   AEK_SEC =         1 << 8,
   AEK_VIRT =        1 << 9,
   AEK_DSP =         1 << 10,
   AEK_FP16 =        1 << 11,
   AEK_RAS =         1 << 12,
   AEK_DOTPROD =     1 << 13,
   AEK_SHA2    =     1 << 14,
   AEK_AES     =     1 << 15,
   AEK_FP16FML =     1 << 16,
   AEK_SB      =     1 << 17,
   AEK_FP_DP   =     1 << 18,
   AEK_LOB     =     1 << 19,
   // Unsupported extensions.
-  AEK_OS = 0x8000000,
-  AEK_IWMMXT = 0x10000000,
-  AEK_IWMMXT2 = 0x20000000,
-  AEK_MAVERICK = 0x40000000,
-  AEK_XSCALE = 0x80000000,
+  AEK_OS       =    1ULL << 59,
+  AEK_IWMMXT   =    1ULL << 60,
+  AEK_IWMMXT2  =    1ULL << 61,
+  AEK_MAVERICK =    1ULL << 62,
+  AEK_XSCALE   =    1ULL << 63,
 };
 
 // List of Arch Extension names.
 // FIXME: TableGen this.
 struct ExtName {
   const char *NameCStr;
   size_t NameLength;
-  unsigned ID;
+  uint64_t ID;
   const char *Feature;
   const char *NegFeature;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 };
 
 const ExtName ARCHExtNames[] = {
 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)                       \

 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
 // When this becomes table-generated, we'd probably need two tables.
 // FIXME: TableGen this.
 template <typename T> struct CpuNames {
   const char *NameCStr;
   size_t NameLength;
   T ArchID;
   bool Default; // is $Name the default CPU for $ArchID ?
-  unsigned DefaultExtensions;
+  uint64_t DefaultExtensions;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 };
 
 const CpuNames<ArchKind> CPUNames[] = {
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
 #include "ARMTargetParser.def"

 template <typename T> struct ArchNames {
   const char *NameCStr;
   size_t NameLength;
   const char *CPUAttrCStr;
   size_t CPUAttrLength;
   const char *SubArchCStr;
   size_t SubArchLength;
   unsigned DefaultFPU;
   unsigned ArchBaseExtensions;
   T ID;
   ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 
   // CPU class in build attributes.
   StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
 

 // Information by ID
 StringRef getFPUName(unsigned FPUKind);
 FPUVersion getFPUVersion(unsigned FPUKind);
 NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
 FPURestriction getFPURestriction(unsigned FPUKind);
 
 // FIXME: These should be moved to TargetTuple once it exists
 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
-bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
-bool getExtensionFeatures(unsigned Extensions,
+bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
+bool getExtensionFeatures(uint64_t Extensions,
                           std::vector<StringRef> &Features);
 
 StringRef getArchName(ArchKind AK);
 unsigned getArchAttr(ArchKind AK);
 StringRef getCPUAttr(ArchKind AK);
 StringRef getSubArch(ArchKind AK);
-StringRef getArchExtName(unsigned ArchExtKind);
+StringRef getArchExtName(uint64_t ArchExtKind);
 StringRef getArchExtFeature(StringRef ArchExt);
 bool appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
                            std::vector<StringRef> &Features);
-StringRef getHWDivName(unsigned HWDivKind);
+StringRef getHWDivName(uint64_t HWDivKind);
 
 // Information by Name
 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
-unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
+uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK);
 StringRef getDefaultCPU(StringRef Arch);
 StringRef getCanonicalArchName(StringRef Arch);
 StringRef getFPUSynonym(StringRef FPU);
 StringRef getArchSynonym(StringRef Arch);
 
 // Parser
-unsigned parseHWDiv(StringRef HWDiv);
+uint64_t parseHWDiv(StringRef HWDiv);
 unsigned parseFPU(StringRef FPU);
 ArchKind parseArch(StringRef Arch);
-unsigned parseArchExt(StringRef ArchExt);
+uint64_t parseArchExt(StringRef ArchExt);
 ArchKind parseCPUArch(StringRef CPU);
 ISAKind parseArchISA(StringRef Arch);
 EndianKind parseArchEndian(StringRef Arch);
 ProfileKind parseArchProfile(StringRef Arch);
 unsigned parseArchVersion(StringRef Arch);
 
 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
 StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
 
 } // namespace ARM
 } // namespace llvm
 
 #endif

llvm/lib/Support/ARMTargetParser.cpp

unsigned ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
 
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   .Case(NAME, DEFAULT_FPU)
 #include "llvm/Support/ARMTargetParser.def"
    .Default(ARM::FK_INVALID);
 }
 
-unsigned ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
+uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
   if (CPU == "generic")
     return ARM::ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
 
   return StringSwitch<unsigned>(CPU)
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   .Case(NAME,                                                                  \
         ARCHNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions |    \
             DEFAULT_EXT)
 #include "llvm/Support/ARMTargetParser.def"
   .Default(ARM::AEK_INVALID);
 }
 
-bool ARM::getHWDivFeatures(unsigned HWDivKind,
+bool ARM::getHWDivFeatures(uint64_t HWDivKind,
                            std::vector<StringRef> &Features) {
 
   if (HWDivKind == AEK_INVALID)
     return false;
 
   if (HWDivKind & AEK_HWDIVARM)
     Features.push_back("+hwdiv-arm");
   else
     Features.push_back("-hwdiv-arm");
 
   if (HWDivKind & AEK_HWDIVTHUMB)
     Features.push_back("+hwdiv");
   else
     Features.push_back("-hwdiv");
 
   return true;
 }
 
-bool ARM::getExtensionFeatures(unsigned Extensions,
+bool ARM::getExtensionFeatures(uint64_t Extensions,
                                std::vector<StringRef> &Features) {
 
   if (Extensions == AEK_INVALID)
     return false;
 
   for (const auto AE : ARCHExtNames) {
     if ((Extensions & AE.ID) == AE.ID && AE.Feature)
       Features.push_back(AE.Feature);

 StringRef ARM::getSubArch(ARM::ArchKind AK) {
   return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
 }
 
 unsigned ARM::getArchAttr(ARM::ArchKind AK) {
   return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
 }
 
-StringRef ARM::getArchExtName(unsigned ArchExtKind) {
+StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
   for (const auto AE : ARCHExtNames) {
     if (ArchExtKind == AE.ID)
       return AE.getName();
   }
   return StringRef();
 }
 
 static bool stripNegationPrefix(StringRef &Name) {
if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
       return CandidateFPU.ID;
     }
   }
 
   // nothing found
   return ARM::FK_INVALID;
 }
 
 static unsigned getAEKID(StringRef ArchExtName) {
   for (const auto AE : ARM::ARCHExtNames)
     if (AE.getName() == ArchExtName)
       return AE.ID;
   return ARM::AEK_INVALID;
 }
 
 bool ARM::appendArchExtFeatures(
   StringRef CPU, ARM::ArchKind AK, StringRef ArchExt,
   std::vector<StringRef> &Features) {
 
   size_t StartingNumFeatures = Features.size();
   const bool Negated = stripNegationPrefix(ArchExt);
   unsigned ID = getAEKID(ArchExt);
 
   if (ID == AEK_INVALID)
     return false;
 
   for (const auto AE : ARCHExtNames) {
     if (Negated && (AE.ID & ID) == ID && AE.NegFeature)
       Features.push_back(AE.NegFeature);
     else if (AE.ID == ID && AE.Feature)
if (ArchExt == "fp" || ArchExt == "fp.dp") {
     } else {
       FPUKind = getDefaultFPU(CPU, AK);
     }
     return ARM::getFPUFeatures(FPUKind, Features);
   }
   return StartingNumFeatures != Features.size();
 }
 
-StringRef ARM::getHWDivName(unsigned HWDivKind) {
+StringRef ARM::getHWDivName(uint64_t HWDivKind) {
   for (const auto D : HWDivNames) {
     if (HWDivKind == D.ID)
       return D.getName();
   }
   return StringRef();
 }
 
 StringRef ARM::getDefaultCPU(StringRef Arch) {
   ArchKind AK = parseArch(Arch);
   if (AK == ArchKind::INVALID)
     return StringRef();
 
   // Look for multiple AKs to find the default for pair AK+Name.
   for (const auto CPU : CPUNames) {
     if (CPU.ArchID == AK && CPU.Default)
       return CPU.getName();
   }
 
   // If we can't find a default then target the architecture instead
   return "generic";
 }
 
-unsigned ARM::parseHWDiv(StringRef HWDiv) {
+uint64_t ARM::parseHWDiv(StringRef HWDiv) {
   StringRef Syn = getHWDivSynonym(HWDiv);
   for (const auto D : HWDivNames) {
     if (Syn == D.getName())
       return D.ID;
   }
   return AEK_INVALID;
 }
 
-unsigned ARM::parseArchExt(StringRef ArchExt) {
+uint64_t ARM::parseArchExt(StringRef ArchExt) {
   for (const auto A : ARCHExtNames) {
     if (ArchExt == A.getName())
       return A.ID;
   }
   return AEK_INVALID;
 }
 
 ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {

llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 
 /// parseDirectiveArchExtension
 ///   ::= .arch_extension [no]feature
 bool ARMAsmParser::parseDirectiveArchExtension(SMLoc L) {
   // FIXME: This structure should be moved inside ARMTargetParser
   // when we start to table-generate them, and we can use the ARM
   // flags below, that were generated by table-gen.
   static const struct {
-    const unsigned Kind;
+    const uint64_t Kind;
     const FeatureBitset ArchCheck;
     const FeatureBitset Features;
   } Extensions[] = {
     { ARM::AEK_CRC, {Feature_HasV8Bit}, {ARM::FeatureCRC} },
     { ARM::AEK_CRYPTO,  {Feature_HasV8Bit},
       {ARM::FeatureCrypto, ARM::FeatureNEON, ARM::FeatureFPARMv8} },
     { ARM::AEK_FP, {Feature_HasV8Bit},
       {ARM::FeatureVFP2_SP, ARM::FeatureFPARMv8} },
if (parseToken(AsmToken::EndOfStatement,
                  "unexpected token in '.arch_extension' directive"))
     return true;
 
   bool EnableFeature = true;
   if (Name.startswith_lower("no")) {
     EnableFeature = false;
     Name = Name.substr(2);
   }
-  unsigned FeatureKind = ARM::parseArchExt(Name);
+  uint64_t FeatureKind = ARM::parseArchExt(Name);
   if (FeatureKind == ARM::AEK_INVALID)
     return Error(ExtLoc, "unknown architectural extension: " + Name);
 
   for (const auto &Extension : Extensions) {
     if (Extension.Kind != FeatureKind)
       continue;
 
     if (Extension.Features.none())

llvm/unittests/Support/TargetParserTest.cpp

const char *ARMArch[] = {
     "armv8l",      "armv8.1-a",    "armv8.1a",    "armv8.2-a",    "armv8.2a",
     "armv8.3-a",   "armv8.3a",     "armv8.4-a",   "armv8.4a",     "armv8.5-a",
     "armv8.5a",     "armv8-r",     "armv8r",      "armv8-m.base", "armv8m.base",
     "armv8-m.main", "armv8m.main", "iwmmxt",      "iwmmxt2",      "xscale",
     "armv8.1-m.main",
 };
 
 bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
-                StringRef ExpectedFPU, unsigned ExpectedFlags,
+                StringRef ExpectedFPU, uint64_t ExpectedFlags,
                 StringRef CPUAttr) {
   ARM::ArchKind AK = ARM::parseCPUArch(CPUName);
   bool pass = ARM::getArchName(AK).equals(ExpectedArch);
   unsigned FPUKind = ARM::getDefaultFPU(CPUName, AK);
   pass &= ARM::getFPUName(FPUKind).equals(ExpectedFPU);
 
-  unsigned ExtKind = ARM::getDefaultExtensions(CPUName, AK);
+  uint64_t ExtKind = ARM::getDefaultExtensions(CPUName, AK);
   if (ExtKind > 1 && (ExtKind & ARM::AEK_NONE))
     pass &= ((ExtKind ^ ARM::AEK_NONE) == ExpectedFlags);
   else
     pass &= (ExtKind == ExpectedFlags);
   pass &= ARM::getCPUAttr(AK).equals(CPUAttr);
 
   return pass;
 }
if (FK == ARM::FK_LAST ||
          ARM::getFPUName(FK).find("vfpv3xd") == std::string::npos))
       EXPECT_EQ(ARM::FPURestriction::None, ARM::getFPURestriction(FK));
     else
       EXPECT_NE(ARM::FPURestriction::None, ARM::getFPURestriction(FK));
   }
 }
 
 TEST(TargetParserTest, ARMExtensionFeatures) {
-  std::map<unsigned, std::vector<StringRef>> Extensions;
+  std::map<uint64_t, std::vector<StringRef>> Extensions;
 
   for (auto &Ext : ARM::ARCHExtNames) {
     if (Ext.Feature && Ext.NegFeature)
       Extensions[Ext.ID] = { StringRef(Ext.Feature),
                              StringRef(Ext.NegFeature) };
   }
 
   Extensions[ARM::AEK_HWDIVARM]   = { "+hwdiv-arm", "-hwdiv-arm" };