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[ARM,MVE] Add intrinsics for v[id]dupq and v[id]wdupq.
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Authored by simon_tatham on Fri, Jan 24, 8:00 AM.

Details

Summary

These instructions generate a vector of consecutive elements starting
from a given base value and incrementing by 1, 2, 4 or 8. The wdup
versions also wrap the values back to zero when they reach a given
limit value. The instruction updates the scalar base register so that
another use of the same instruction will continue the sequence from
where the previous one left off.

At the IR level, I've represented these instructions as a family of
target-specific intrinsics with two return values (the constructed
vector and the updated base). The user-facing ACLE API provides a set
of intrinsics that throw away the written-back base and another set
that receive it as a pointer so they can update it, plus the usual
predicated versions.

Because the intrinsics return two values (as do the underlying
instructions), the isel has to be done in C++.

This is the first family of MVE intrinsics that use the imm_1248
immediate type in the clang Tablegen framework, so naturally, I found
I'd given it the wrong C integer type. Also added some tests of the
check that the immediate has a legal value, because this is the first
time those particular checks have been exercised.

Finally, I also had to fix a bug in MveEmitter which failed an
assertion when I nested two seq nodes (the inner one used to extract
the two values from the pair returned by the IR intrinsic, and the
outer one put on by the predication multiclass).

Diff Detail

Event Timeline

simon_tatham created this revision.Fri, Jan 24, 8:00 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptFri, Jan 24, 8:00 AM
dmgreen accepted this revision.Wed, Jan 29, 4:32 PM

Looks good, from what I can tell.

llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
2752

VT.getScalarSizeInBits()?

This revision is now accepted and ready to land.Wed, Jan 29, 4:32 PM
This revision was automatically updated to reflect the committed changes.