[PowerPC][Future] Add prefixed loads and stores for future CPU

[stefanp]

Summary

A previous patch should have added pld and pstd and any support code in the backend that is required for prefixed load and store type operations.
This patch adds a number of additional prefixed load and store type instructions for the future CPU.

[nemanjai]

LGTM.

llvm/lib/Target/PowerPC/PPCInstrPrefix.td

class PI<bits<6> pref, bits<6> opcode, dag OOL, dag IOL, string asmstr,
   // and one for 32-bit arguments, this bit breaks the degeneracy between
   // the two forms and allows TableGen to generate mapping tables.
   bit Interpretation64Bit = 0;
 
   // Fields used for relation models.
   string BaseName = "";
 }
 
+class MLS_DForm_R_D34_RTA5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
+                           InstrItinClass itin, list<dag> pattern>
+  : PI<1, opcode, OOL, IOL, asmstr, itin> {
+  bits<5> FRS;
+  bits<39> D_RA;
+
+  let Pattern = pattern;
+
+  // The prefix.
+  let Inst{6-7} = 2;
+  let Inst{8-10} = 0;
+  let Inst{11} = PCRel;
+  let Inst{12-13} = 0;
+  let Inst{14-31} = D_RA{33-16}; // d0
+
+  // The instruction.
+  let Inst{38-42} = FRS{4-0};
+  let Inst{43-47} = D_RA{38-34}; // RA
+  let Inst{48-63} = D_RA{15-0}; // d1
+}
+
 class MLS_DForm_R_SI34_RTA5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
                             InstrItinClass itin, list<dag> pattern>
   : PI<1, opcode, OOL, IOL, asmstr, itin> {
   bits<5> RT;
   bits<5> RA;
   bits<34> SI;
 
   let Pattern = pattern;
class 8LS_DForm_R_D34_RTA5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
   let Inst{14-31} = D_RA{33-16}; // d0
 
   // The instruction.
   let Inst{38-42} = RT{4-0};
   let Inst{43-47} = D_RA{38-34}; // RA
   let Inst{48-63} = D_RA{15-0}; // d1
 }
 
+// 8LS:D-Form: [ 1 0 0 // R // d0
+//               PO TX T RA d1 ]
+class 8LS_DForm_R_D34_XT6_RA5<bits<5> opcode, dag OOL, dag IOL, string asmstr,
+                              InstrItinClass itin, list<dag> pattern>
+  : PI<1, { opcode, ? }, OOL, IOL, asmstr, itin> {
+  bits<6> XT;
+  bits<39> D_RA;
+
+  let Pattern = pattern;
+
+  // The prefix.
+  let Inst{6-7} = 0;
+  let Inst{8} = 0;
+  let Inst{9-10} = 0; // reserved
+  let Inst{11} = PCRel;
+  let Inst{12-13} = 0; // reserved
+  let Inst{14-31} = D_RA{33-16}; // d0
+
+  // The instruction.
+  let Inst{37} = XT{5};
+  let Inst{38-42} = XT{4-0};
+  let Inst{43-47} = D_RA{38-34}; // RA
+  let Inst{48-63} = D_RA{15-0}; // d1
+}
+
+multiclass MLS_DForm_R_D34_RTA5_p<bits<6> opcode, dag OOL, dag IOL,
+                                  dag PCRel_IOL, string asmstr,
+                                  InstrItinClass itin> {
+  def NAME : MLS_DForm_R_D34_RTA5<opcode, OOL, IOL,
+                                  !strconcat(asmstr, ", 0"), itin, []>;
+  def pc : MLS_DForm_R_D34_RTA5<opcode, OOL, PCRel_IOL,
+                                !strconcat(asmstr, ", 1"), itin, []>,
+                                isPCRel;
+}
+
 multiclass 8LS_DForm_R_D34_RTA5_p<bits<6> opcode, dag OOL, dag IOL,
                                   dag PCRel_IOL, string asmstr,
                                   InstrItinClass itin> {
   def NAME : 8LS_DForm_R_D34_RTA5<opcode, OOL, IOL,
                                   !strconcat(asmstr, ", 0"), itin, []>;
   def pc : 8LS_DForm_R_D34_RTA5<opcode, OOL, PCRel_IOL,
                                 !strconcat(asmstr, ", 1"), itin, []>, isPCRel;
 }
 
+multiclass 8LS_DForm_R_D34_XT6_RA5_p<bits<5> opcode, dag OOL, dag IOL,
+                                     dag PCRel_IOL, string asmstr,
+                                     InstrItinClass itin> {
+  def NAME : 8LS_DForm_R_D34_XT6_RA5<opcode, OOL, IOL,
+                                     !strconcat(asmstr, ", 0"), itin, []>;
+  def pc : 8LS_DForm_R_D34_XT6_RA5<opcode, OOL, PCRel_IOL,
+                                   !strconcat(asmstr, ", 1"), itin, []>,
+                                   isPCRel;
+}
+
 def PrefixInstrs : Predicate<"PPCSubTarget->hasPrefixInstrs()">;
 
 let Predicates = [PrefixInstrs] in {
   let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
     defm PADDI8 :
       MLS_DForm_R_SI34_RTA5_p<14, (outs g8rc:$RT), (ins g8rc:$RA, s34imm:$SI),
                               (ins immZero:$RA, s34imm:$SI),
                               "paddi $RT, $RA, $SI", IIC_LdStLFD>;
MLS_DForm_R_SI34_RTA5_p<14, (outs gprc:$RT), (ins gprc:$RA, s34imm:$SI),
                             "paddi $RT, $RA, $SI", IIC_LdStLFD>;
   let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
     def PLI : MLS_DForm2_r0<1, 14, (outs gprc:$RT),
                             (ins s34imm:$SI),
                             "pli $RT, $SI", IIC_IntSimple, []>;
   }
 
   let mayLoad = 1, mayStore = 0 in {
+    defm PLXV :
+      8LS_DForm_R_D34_XT6_RA5_p<25, (outs vsrc:$XT), (ins memri34:$D_RA),
+                                (ins memri34_pcrel:$D_RA), "plxv $XT, $D_RA",
+                                IIC_LdStLFD>;
+    defm PLFS :
+      MLS_DForm_R_D34_RTA5_p<48, (outs f4rc:$FRT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plfs $FRT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLFD :
+      MLS_DForm_R_D34_RTA5_p<50, (outs f8rc:$FRT), (ins memri34:$D_RA),
+                             (ins  memri34_pcrel:$D_RA), "plfd $FRT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLXSSP :
+      8LS_DForm_R_D34_RTA5_p<43, (outs vfrc:$VRT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plxssp $VRT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLXSD :
+      8LS_DForm_R_D34_RTA5_p<42, (outs vfrc:$VRT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plxsd $VRT, $D_RA",
+                             IIC_LdStLFD>;
+    let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
+      defm PLBZ8 :
+        MLS_DForm_R_D34_RTA5_p<34, (outs g8rc:$RT), (ins memri34:$D_RA),
+                               (ins memri34_pcrel:$D_RA), "plbz $RT, $D_RA",
+                               IIC_LdStLFD>;
+      defm PLHZ8 :
+        MLS_DForm_R_D34_RTA5_p<40, (outs g8rc:$RT), (ins memri34:$D_RA),
+                               (ins memri34_pcrel:$D_RA), "plhz $RT, $D_RA",
+                               IIC_LdStLFD>;
+      defm PLHA8 :
+        MLS_DForm_R_D34_RTA5_p<42, (outs g8rc:$RT), (ins memri34:$D_RA),
+                               (ins memri34_pcrel:$D_RA), "plha $RT, $D_RA",
+                               IIC_LdStLFD>;
+      defm PLWA8 :
+        8LS_DForm_R_D34_RTA5_p<41, (outs g8rc:$RT), (ins memri34:$D_RA),
+                               (ins memri34_pcrel:$D_RA), "plwa $RT, $D_RA",
+                               IIC_LdStLFD>;
+      defm PLWZ8 :
+        MLS_DForm_R_D34_RTA5_p<32, (outs g8rc:$RT), (ins memri34:$D_RA),
+                               (ins memri34_pcrel:$D_RA), "plwz $RT, $D_RA",
+                               IIC_LdStLFD>;
+    }
+    defm PLBZ :
+      MLS_DForm_R_D34_RTA5_p<34, (outs gprc:$RT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plbz $RT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLHZ :
+      MLS_DForm_R_D34_RTA5_p<40, (outs gprc:$RT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plhz $RT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLHA :
+      MLS_DForm_R_D34_RTA5_p<42, (outs gprc:$RT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plha $RT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLWZ :
+      MLS_DForm_R_D34_RTA5_p<32, (outs gprc:$RT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plwz $RT, $D_RA",
+                             IIC_LdStLFD>;
+    defm PLWA :
+      8LS_DForm_R_D34_RTA5_p<41, (outs gprc:$RT), (ins memri34:$D_RA),
+                             (ins memri34_pcrel:$D_RA), "plwa $RT, $D_RA",
+                             IIC_LdStLFD>;
     defm PLD :
       8LS_DForm_R_D34_RTA5_p<57, (outs g8rc:$RT), (ins memri34:$D_RA),
                              (ins memri34_pcrel:$D_RA), "pld $RT, $D_RA",
                              IIC_LdStLFD>;
   }
 
   let mayStore = 1, mayLoad = 0 in {
+    defm PSTXV :
+      8LS_DForm_R_D34_XT6_RA5_p<27, (outs), (ins vsrc:$XS, memri34:$D_RA),
+                                (ins vsrc:$XS, memri34_pcrel:$D_RA),
+                                "pstxv $XS, $D_RA", IIC_LdStLFD>;
+    defm PSTFS :
+      MLS_DForm_R_D34_RTA5_p<52, (outs), (ins f4rc:$FRS, memri34:$D_RA),
+                             (ins f4rc:$FRS, memri34_pcrel:$D_RA),
+                             "pstfs $FRS, $D_RA", IIC_LdStLFD>;
+    defm PSTFD :
+      MLS_DForm_R_D34_RTA5_p<54, (outs), (ins f8rc:$FRS, memri34:$D_RA),
+                             (ins f8rc:$FRS, memri34_pcrel:$D_RA),
+                             "pstfd $FRS, $D_RA", IIC_LdStLFD>;
+    defm PSTXSSP :
+      8LS_DForm_R_D34_RTA5_p<47, (outs), (ins vfrc:$VRS, memri34:$D_RA),
+                             (ins vfrc:$VRS, memri34_pcrel:$D_RA),
+                             "pstxssp $VRS, $D_RA", IIC_LdStLFD>;
+    defm PSTXSD :
+      8LS_DForm_R_D34_RTA5_p<46, (outs), (ins vfrc:$VRS, memri34:$D_RA),
+                             (ins vfrc:$VRS, memri34_pcrel:$D_RA),
+                             "pstxsd $VRS, $D_RA", IIC_LdStLFD>;
+    let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
+      defm PSTB8 :
+        MLS_DForm_R_D34_RTA5_p<38, (outs), (ins g8rc:$RS, memri34:$D_RA),
+                               (ins g8rc:$RS, memri34_pcrel:$D_RA),
+                               "pstb $RS, $D_RA", IIC_LdStLFD>;
+      defm PSTH8 :
+        MLS_DForm_R_D34_RTA5_p<44, (outs), (ins g8rc:$RS, memri34:$D_RA),
+                               (ins g8rc:$RS, memri34_pcrel:$D_RA),
+                               "psth $RS, $D_RA", IIC_LdStLFD>;
+      defm PSTW8 :
+        MLS_DForm_R_D34_RTA5_p<36, (outs), (ins g8rc:$RS, memri34:$D_RA),
+                               (ins g8rc:$RS, memri34_pcrel:$D_RA),
+                               "pstw $RS, $D_RA", IIC_LdStLFD>;
+    }
+    defm PSTB :
+      MLS_DForm_R_D34_RTA5_p<38, (outs), (ins gprc:$RS, memri34:$D_RA),
+                             (ins gprc:$RS, memri34_pcrel:$D_RA),
+                             "pstb $RS, $D_RA", IIC_LdStLFD>;
+    defm PSTH :
+      MLS_DForm_R_D34_RTA5_p<44, (outs), (ins gprc:$RS, memri34:$D_RA),
+                             (ins gprc:$RS, memri34_pcrel:$D_RA),
+                             "psth $RS, $D_RA", IIC_LdStLFD>;
+    defm PSTW :
+      MLS_DForm_R_D34_RTA5_p<36, (outs), (ins gprc:$RS, memri34:$D_RA),
+                             (ins gprc:$RS, memri34_pcrel:$D_RA),
+                             "pstw $RS, $D_RA", IIC_LdStLFD>;
     defm PSTD :
       8LS_DForm_R_D34_RTA5_p<61, (outs), (ins g8rc:$RS, memri34:$D_RA),
                              (ins g8rc:$RS, memri34_pcrel:$D_RA),
                              "pstd $RS, $D_RA", IIC_LdStLFD>;
   }
 }
 

llvm/test/MC/Disassembler/PowerPC/future-invalid.txt

 # RUN: llvm-mc --disassemble %s -mcpu=future -triple powerpc64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
 
 # paddi 1, 2, 8589934591, 1. However, RA is not zero with R=1
 # CHECK: warning: invalid instruction encoding
 0x06 0x11 0xff 0xff 0x38 0x22 0xff 0xff
 
+# plbz 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0x88 0x22 0xff 0xff
+
+# plfd 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xc8 0x22 0xff 0xff
+
+# plfs 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xc8 0x22 0xff 0xff
+
+# plha 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xa8 0x22 0xff 0xff
+
+# plhz 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xa0 0x22 0xff 0xff
+
+# plwz 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0x80 0x22 0xff 0xff
+
+# pstb 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0x98 0x22 0xff 0xff
+
+# pstfd 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xd8 0x22 0xff 0xff
+
+# pstfs 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xd0 0x22 0xff 0xff
+
+# psth 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0xb0 0x22 0xff 0xff
+
+# pstw 1, 8589934591(2), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x06 0x11 0xff 0xff 0x90 0x22 0xff 0xff
+
 # pld 1, -8589934592(3), 1. However, RA is not zero with R=1
 # CHECK: warning: invalid instruction encoding
 0x04 0x12 0x00 0x00 0xe0 0x23 0x00 0x00
 
+# plwa 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xa4 0x23 0x00 0x00
+
+# plxsd 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xa8 0x23 0x00 0x00
+
+# plxssp 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xac 0x23 0x00 0x00
+
+# This would be plxv 31, 8589934591(3), 1
+# but base register must be zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x11 0xff 0xff 0xcb 0xe3 0xff 0xff
+
+# pstd 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xf4 0x23 0x00 0x00
+
+# pstxsd 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xb8 0x23 0x00 0x00
+
+# pstxssp 1, -8589934592(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x12 0x00 0x00 0xbc 0x23 0x00 0x00
+
+# pstxv 31, 8589934591(3), 1. However, RA is not zero with R=1
+# CHECK: warning: invalid instruction encoding
+0x04 0x11 0xff 0xff 0xdb 0xe3 0xff 0xff

llvm/test/MC/Disassembler/PowerPC/futureinsts.txt

 # RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu \
 # RUN:   -mcpu=future | FileCheck %s
 
 # CHECK: paddi 1, 2, 8589934591, 0
 0x06 0x01 0xff 0xff 0x38 0x22 0xff 0xff
 
 # CHECK: paddi 1, 0, -8589934592, 1
 0x06 0x12 0x00 0x00 0x38 0x20 0x00 0x00
 
+# Largest positive displacement.
+# CHECK: plxv 31, 8589934591(3), 0
+0x04 0x01 0xff 0xff 0xcb 0xe3 0xff 0xff
+
+# Smallest non-zero displacement.
+# CHECK: plxv 15, 1(31), 0
+0x04 0x00 0x00 0x00 0xc9 0xff 0x00 0x01
+
+# Largest negative displacement.
+# CHECK: plxv 31, -8589934592(0), 1
+0x04 0x12 0x00 0x00 0xcb 0xe0 0x00 0x00
+
+# CHECK: pstxv 1, 8589934591(3), 0
+0x04 0x01 0xff 0xff 0xd8 0x23 0xff 0xff
+
+# CHECK: pstxv 33, 8589934591(0), 1
+0x04 0x11 0xff 0xff 0xdc 0x20 0xff 0xff
+
+# CHECK: pstfs 1, -134217728(3), 0
+0x06 0x03 0xf8 0x00 0xd0 0x23 0x00 0x00
+
+# CHECK: pstfs 1, 134217727(0), 1
+0x06 0x10 0x07 0xff 0xd0 0x20 0xff 0xff
+
+# CHECK: pstfd 1, -134217728(3), 0
+0x06 0x03 0xf8 0x00 0xd8 0x23 0x00 0x00
+
+# CHECK: pstfd 1, 134217727(0), 1
+0x06 0x10 0x07 0xff 0xd8 0x20 0xff 0xff
+
+# CHECK: pstxssp 1, -134217728(3), 0
+0x04 0x03 0xf8 0x00 0xbc 0x23 0x00 0x00
+
+# CHECK: pstxssp 1, 134217727(0), 1
+0x04 0x10 0x07 0xff 0xbc 0x20 0xff 0xff
+
+# CHECK: pstxsd 1, -134217728(3), 0
+0x04 0x03 0xf8 0x00 0xb8 0x23 0x00 0x00
+
+# CHECK: pstxsd 1, 134217727(0), 1
+0x04 0x10 0x07 0xff 0xb8 0x20 0xff 0xff
+
+# CHECK: plfs 1, -8589934592(3), 0
+0x06 0x02 0x00 0x00 0xc0 0x23 0x00 0x00
+
+# CHECK: plfs 1, 8589934591(0), 1
+0x06 0x11 0xff 0xff 0xc0 0x20 0xff 0xff
+
+# CHECK: plfd 1, -8589934592(3), 0
+0x06 0x02 0x00 0x00 0xc8 0x23 0x00 0x00
+
+# CHECK: plfd 1, 8589934591(0), 1
+0x06 0x11 0xff 0xff 0xc8 0x20 0xff 0xff
+
+# CHECK: plxssp 1, -8589934592(3), 0
+0x04 0x02 0x00 0x00 0xac 0x23 0x00 0x00
+
+# CHECK: plxssp 1, 8589934591(0), 1
+0x04 0x11 0xff 0xff 0xac 0x20 0xff 0xff
+
+# CHECK: plxsd 1, -8589934592(3), 0
+0x04 0x02 0x00 0x00 0xa8 0x23 0x00 0x00
+
+# CHECK: plxsd 1, 8589934591(0), 1
+0x04 0x11 0xff 0xff 0xa8 0x20 0xff 0xff
+
+# CHECK: pstb 1, -8589934592(3), 0
+0x06 0x02 0x00 0x00 0x98 0x23 0x00 0x00
+
+# CHECK: pstb 1, 8589934591(0), 1
+0x06 0x11 0xff 0xff 0x98 0x20 0xff 0xff
+
+# CHECK: psth 1, -8589934592(3), 0
+0x06 0x02 0x00 0x00 0xb0 0x23 0x00 0x00
+
+# CHECK: psth 1, 8589934591(0), 1
+0x06 0x11 0xff 0xff 0xb0 0x20 0xff 0xff
+
+# CHECK: pstw 1, -8589934592(3), 0
+0x06 0x02 0x00 0x00 0x90 0x23 0x00 0x00
+
+# CHECK: pstw 1, 8589934591(0), 1
+0x06 0x11 0xff 0xff 0x90 0x20 0xff 0xff
+
+# CHECK: pstd 1, -8589934592(3), 0
+0x04 0x02 0x00 0x00 0xf4 0x23 0x00 0x00
+
+# CHECK: pstd 1, 8589934591(0), 1
+0x04 0x11 0xff 0xff 0xf4 0x20 0xff 0xff
+
+# CHECK: plbz 1, 8589934591(3), 0
+0x06 0x01 0xff 0xff 0x88 0x23 0xff 0xff
+
+# CHECK: plbz 1, -8589934592(0), 1
+0x06 0x12 0x00 0x00 0x88 0x20 0x00 0x00
+
+# CHECK: plhz 1, 8589934591(3), 0
+0x06 0x01 0xff 0xff 0xa0 0x23 0xff 0xff
+
+# CHECK: plhz 1, -8589934592(0), 1
+0x06 0x12 0x00 0x00 0xa0 0x20 0x00 0x00
+
+# CHECK: plha 1, 8589934591(3), 0
+0x06 0x01 0xff 0xff 0xa8 0x23 0xff 0xff
+
+# CHECK: plha 1, -8589934592(0), 1
+0x06 0x12 0x00 0x00 0xa8 0x20 0x00 0x00
+
+# CHECK: plwz 1, 8589934591(3), 0
+0x06 0x01 0xff 0xff 0x80 0x23 0xff 0xff
+
+# CHECK: plwz 1, -8589934592(0), 1
+0x06 0x12 0x00 0x00 0x80 0x20 0x00 0x00
+
+# CHECK: plwa 1, -8589934592(3), 0
+0x04 0x02 0x00 0x00 0xa4 0x23 0x00 0x00
+
+# CHECK: plwa 1, 8589934591(0), 1
+0x04 0x11 0xff 0xff 0xa4 0x20 0xff 0xff
+
 # CHECK: pld 1, -8589934592(3), 0
 0x04 0x02 0x00 0x00 0xe4 0x23 0x00 0x00
 
 # CHECK: pld 1, 8589934591(0), 1
 0x04 0x11 0xff 0xff 0xe4 0x20 0xff 0xff
 

llvm/test/MC/PowerPC/future-errors.s

 # RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t
 # RUN: FileCheck < %t %s
 # RUN: not llvm-mc -triple powerpc64le-unknown-unknown < %s 2> %t
 # RUN: FileCheck < %t %s
 
  # CHECK: error: invalid operand for instruction
 paddi 1, 1, 32, 1
 
 # CHECK: error: invalid operand for instruction
 pld 1, 32(1), 1
 
+# CHECK: error: invalid operand for instruction
+paddi 1, 1, 32, 1
+
+# CHECK: error: invalid operand for instruction
+plbz 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plfd 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plfs 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plha 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plhz 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plwa 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plwz 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plxsd 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plxssp 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+plxv 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstb 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstd 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstfd 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstfs 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+psth 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstw 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstxsd 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstxssp 1, 32(1), 1
+
+# CHECK: error: invalid operand for instruction
+pstxv 1, 32(1), 1
+

llvm/test/MC/PowerPC/future.s

 # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | \
 # RUN:   FileCheck -check-prefix=CHECK-BE %s
 # RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | \
 # RUN:   FileCheck -check-prefix=CHECK-LE %s
 
+
+# CHECK-BE: plxv 63, 8589934591(0), 1       # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                         0xcf,0xe0,0xff,0xff]
+# CHECK-LE: plxv 63, 8589934591(0), 1       # encoding: [0xff,0xff,0x11,0x04
+# CHECK-LE-SAME:                                         0xff,0xff,0xe0,0xcf]
+            plxv 63, 8589934591(0), 1
+# CHECK-BE: plxv 33, -8589934592(31), 0     # encoding: [0x04,0x02,0x00,0x00
+# CHECK-BE-SAME:                                         0xcc,0x3f,0x00,0x00]
+# CHECK-LE: plxv 33, -8589934592(31), 0     # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                         0x00,0x00,0x3f,0xcc]
+            plxv 33, -8589934592(31), 0
+# CHECK-BE: pstxv 63, 8589934591(0), 1      # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                         0xdf,0xe0,0xff,0xff]
+# CHECK-LE: pstxv 63, 8589934591(0), 1      # encoding: [0xff,0xff,0x11,0x04
+# CHECK-LE-SAME:                                         0xff,0xff,0xe0,0xdf]
+            pstxv 63, 8589934591(0), 1
+# CHECK-BE: pstxv 33, -8589934592(31), 0    # encoding: [0x04,0x02,0x00,0x00
+# CHECK-BE-SAME:                                         0xdc,0x3f,0x00,0x00] 
+# CHECK-LE: pstxv 33, -8589934592(31), 0    # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                         0x00,0x00,0x3f,0xdc] 
+            pstxv 33, -8589934592(31), 0
 # CHECK-BE: paddi 1, 2, 8589934591, 0             # encoding: [0x06,0x01,0xff,0xff
 # CHECK-BE-SAME:                                               0x38,0x22,0xff,0xff]
 # CHECK-LE: paddi 1, 2, 8589934591, 0             # encoding: [0xff,0xff,0x01,0x06
 # CHECK-LE-SAME:                                               0xff,0xff,0x22,0x38]
             paddi 1, 2, 8589934591, 0
 # CHECK-BE: paddi 1, 0, -8589934592, 1            # encoding: [0x06,0x12,0x00,0x00
 # CHECK-BE-SAME:                                               0x38,0x20,0x00,0x00]
 # CHECK-LE: paddi 1, 0, -8589934592, 1            # encoding: [0x00,0x00,0x12,0x06
 # CHECK-LE-SAME:                                               0x00,0x00,0x20,0x38]
             paddi 1, 0, -8589934592, 1
 # CHECK-BE: pli 1, -8589934592                    # encoding: [0x06,0x02,0x00,0x00
 # CHECK-BE-SAME:                                               0x38,0x20,0x00,0x00]
 # CHECK-LE: pli 1, -8589934592                    # encoding: [0x00,0x00,0x02,0x06
 # CHECK-LE-SAME:                                               0x00,0x00,0x20,0x38]
             pli 1, -8589934592
 # CHECK-BE: pli 1, 8589934591                     # encoding: [0x06,0x01,0xff,0xff
 # CHECK-BE-SAME:                                               0x38,0x20,0xff,0xff]
 # CHECK-LE: pli 1, 8589934591                     # encoding: [0xff,0xff,0x01,0x06
 # CHECK-LE-SAME:                                               0xff,0xff,0x20,0x38]
             pli 1, 8589934591
+# CHECK-BE: pstfs 1, -134217728(3), 0             # encoding: [0x06,0x03,0xf8,0x00,
+# CHECK-BE-SAME:                                               0xd0,0x23,0x00,0x00]
+# CHECK-LE: pstfs 1, -134217728(3), 0             # encoding: [0x00,0xf8,0x03,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xd0]
+            pstfs 1, -134217728(3), 0
+# CHECK-BE: pstfs 1, 134217727(0), 1              # encoding: [0x06,0x10,0x07,0xff
+# CHECK-BE-SAME:                                               0xd0,0x20,0xff,0xff]
+# CHECK-LE: pstfs 1, 134217727(0), 1              # encoding: [0xff,0x07,0x10,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xd0]
+            pstfs 1, 134217727(0), 1
+# CHECK-BE: pstfd 1, -134217728(3), 0             # encoding: [0x06,0x03,0xf8,0x00,
+# CHECK-BE-SAME:                                               0xd8,0x23,0x00,0x00]
+# CHECK-LE: pstfd 1, -134217728(3), 0             # encoding: [0x00,0xf8,0x03,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xd8]
+            pstfd 1, -134217728(3), 0
+# CHECK-BE: pstfd 1, 134217727(0), 1              # encoding: [0x06,0x10,0x07,0xff
+# CHECK-BE-SAME:                                               0xd8,0x20,0xff,0xff]
+# CHECK-LE: pstfd 1, 134217727(0), 1              # encoding: [0xff,0x07,0x10,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xd8]
+            pstfd 1, 134217727(0), 1
+# CHECK-BE: pstxssp 1, -134217728(3), 0           # encoding: [0x04,0x03,0xf8,0x00,
+# CHECK-BE-SAME:                                               0xbc,0x23,0x00,0x00]
+# CHECK-LE: pstxssp 1, -134217728(3), 0           # encoding: [0x00,0xf8,0x03,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xbc]
+            pstxssp 1, -134217728(3), 0
+# CHECK-BE: pstxssp 1, 134217727(0), 1            # encoding: [0x04,0x10,0x07,0xff
+# CHECK-BE-SAME:                                               0xbc,0x20,0xff,0xff]
+# CHECK-LE: pstxssp 1, 134217727(0), 1            # encoding: [0xff,0x07,0x10,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xbc]
+            pstxssp 1, 134217727(0), 1
+# CHECK-BE: pstxsd 1, -134217728(3), 0            # encoding: [0x04,0x03,0xf8,0x00,
+# CHECK-BE-SAME:                                               0xb8,0x23,0x00,0x00]
+# CHECK-LE: pstxsd 1, -134217728(3), 0            # encoding: [0x00,0xf8,0x03,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xb8]
+            pstxsd 1, -134217728(3), 0
+# CHECK-BE: pstxsd 1, 134217727(0), 1             # encoding: [0x04,0x10,0x07,0xff
+# CHECK-BE-SAME:                                               0xb8,0x20,0xff,0xff]
+# CHECK-LE: pstxsd 1, 134217727(0), 1             # encoding: [0xff,0x07,0x10,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xb8]
+            pstxsd 1, 134217727(0), 1
+# CHECK-BE: plfs 1, -8589934592(3), 0             # encoding: [0x06,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xc0,0x23,0x00,0x00]
+# CHECK-LE: plfs 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xc0]
+            plfs 1, -8589934592(3), 0
+# CHECK-BE: plfs 1, 8589934591(0), 1              # encoding: [0x06,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xc0,0x20,0xff,0xff]
+# CHECK-LE: plfs 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xc0]
+            plfs 1, 8589934591(0), 1
+# CHECK-BE: plfd 1, -8589934592(3), 0             # encoding: [0x06,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xc8,0x23,0x00,0x00]
+# CHECK-LE: plfd 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xc8]
+            plfd 1, -8589934592(3), 0
+# CHECK-BE: plfd 1, 8589934591(0), 1              # encoding: [0x06,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xc8,0x20,0xff,0xff]
+# CHECK-LE: plfd 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xc8]
+            plfd 1, 8589934591(0), 1
+# CHECK-BE: plxssp 1, -8589934592(3), 0           # encoding: [0x04,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xac,0x23,0x00,0x00]
+# CHECK-LE: plxssp 1, -8589934592(3), 0           # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xac]
+            plxssp 1, -8589934592(3), 0
+# CHECK-BE: plxssp 1, 8589934591(0), 1            # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xac,0x20,0xff,0xff]
+# CHECK-LE: plxssp 1, 8589934591(0), 1            # encoding: [0xff,0xff,0x11,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xac]
+            plxssp 1, 8589934591(0), 1
+# CHECK-BE: plxsd 1, -8589934592(3), 0            # encoding: [0x04,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xa8,0x23,0x00,0x00]
+# CHECK-LE: plxsd 1, -8589934592(3), 0            # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xa8]
+            plxsd 1, -8589934592(3), 0
+# CHECK-BE: plxsd 1, 8589934591(0), 1             # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xa8,0x20,0xff,0xff]
+# CHECK-LE: plxsd 1, 8589934591(0), 1             # encoding: [0xff,0xff,0x11,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xa8]
+            plxsd 1, 8589934591(0), 1
+# CHECK-BE: pstb 1, -8589934592(3), 0             # encoding: [0x06,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0x98,0x23,0x00,0x00]
+# CHECK-LE: pstb 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0x98]
+            pstb 1, -8589934592(3), 0
+# CHECK-BE: pstb 1, 8589934591(0), 1              # encoding: [0x06,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0x98,0x20,0xff,0xff]
+# CHECK-LE: pstb 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0x98]
+            pstb 1, 8589934591(0), 1
+# CHECK-BE: psth 1, -8589934592(3), 0             # encoding: [0x06,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xb0,0x23,0x00,0x00]
+# CHECK-LE: psth 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xb0]
+            psth 1, -8589934592(3), 0
+# CHECK-BE: psth 1, 8589934591(0), 1              # encoding: [0x06,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xb0,0x20,0xff,0xff]
+# CHECK-LE: psth 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xb0]
+            psth 1, 8589934591(0), 1
+# CHECK-BE: pstw 1, -8589934592(3), 0             # encoding: [0x06,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0x90,0x23,0x00,0x00]
+# CHECK-LE: pstw 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0x90]
+            pstw 1, -8589934592(3), 0
+# CHECK-BE: pstw 1, 8589934591(0), 1              # encoding: [0x06,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0x90,0x20,0xff,0xff]
+# CHECK-LE: pstw 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x06,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0x90]
+            pstw 1, 8589934591(0), 1
+# CHECK-BE: pstd 1, -8589934592(3), 0             # encoding: [0x04,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xf4,0x23,0x00,0x00]
+# CHECK-LE: pstd 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xf4]
+            pstd 1, -8589934592(3), 0
+# CHECK-BE: pstd 1, 8589934591(0), 1              # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xf4,0x20,0xff,0xff]
+# CHECK-LE: pstd 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xf4]
+            pstd 1, 8589934591(0), 1
+# CHECK-BE: plbz 1, 8589934591(3), 0              # encoding: [0x06,0x01,0xff,0xff
+# CHECK-BE-SAME:                                               0x88,0x23,0xff,0xff]
+# CHECK-LE: plbz 1, 8589934591(3), 0              # encoding: [0xff,0xff,0x01,0x06
+# CHECK-LE-SAME:                                               0xff,0xff,0x23,0x88]
+            plbz 1, 8589934591(3), 0
+# CHECK-BE: plbz 1, -8589934592(0), 1             # encoding: [0x06,0x12,0x00,0x00
+# CHECK-BE-SAME:                                               0x88,0x20,0x00,0x00]
+# CHECK-LE: plbz 1, -8589934592(0), 1             # encoding: [0x00,0x00,0x12,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x20,0x88]
+            plbz 1, -8589934592(0), 1
+# CHECK-BE: plhz 1, 8589934591(3), 0              # encoding: [0x06,0x01,0xff,0xff
+# CHECK-BE-SAME:                                               0xa0,0x23,0xff,0xff]
+# CHECK-LE: plhz 1, 8589934591(3), 0              # encoding: [0xff,0xff,0x01,0x06
+# CHECK-LE-SAME:                                               0xff,0xff,0x23,0xa0]
+            plhz 1, 8589934591(3), 0
+# CHECK-BE: plhz 1, -8589934592(0), 1             # encoding: [0x06,0x12,0x00,0x00
+# CHECK-BE-SAME:                                               0xa0,0x20,0x00,0x00]
+# CHECK-LE: plhz 1, -8589934592(0), 1             # encoding: [0x00,0x00,0x12,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x20,0xa0]
+            plhz 1, -8589934592(0), 1
+# CHECK-BE: plha 1, 8589934591(3), 0              # encoding: [0x06,0x01,0xff,0xff
+# CHECK-BE-SAME:                                               0xa8,0x23,0xff,0xff]
+# CHECK-LE: plha 1, 8589934591(3), 0              # encoding: [0xff,0xff,0x01,0x06
+# CHECK-LE-SAME:                                               0xff,0xff,0x23,0xa8]
+            plha 1, 8589934591(3), 0
+# CHECK-BE: plha 1, -8589934592(0), 1             # encoding: [0x06,0x12,0x00,0x00
+# CHECK-BE-SAME:                                               0xa8,0x20,0x00,0x00]
+# CHECK-LE: plha 1, -8589934592(0), 1             # encoding: [0x00,0x00,0x12,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x20,0xa8]
+            plha 1, -8589934592(0), 1
+# CHECK-BE: plwz 1, 8589934591(3), 0              # encoding: [0x06,0x01,0xff,0xff
+# CHECK-BE-SAME:                                               0x80,0x23,0xff,0xff]
+# CHECK-LE: plwz 1, 8589934591(3), 0              # encoding: [0xff,0xff,0x01,0x06
+# CHECK-LE-SAME:                                               0xff,0xff,0x23,0x80]
+            plwz 1, 8589934591(3), 0
+# CHECK-BE: plwz 1, -8589934592(0), 1             # encoding: [0x06,0x12,0x00,0x00
+# CHECK-BE-SAME:                                               0x80,0x20,0x00,0x00]
+# CHECK-LE: plwz 1, -8589934592(0), 1             # encoding: [0x00,0x00,0x12,0x06
+# CHECK-LE-SAME:                                               0x00,0x00,0x20,0x80]
+            plwz 1, -8589934592(0), 1
+# CHECK-BE: plwa 1, -8589934592(3), 0             # encoding: [0x04,0x02,0x00,0x00,
+# CHECK-BE-SAME:                                               0xa4,0x23,0x00,0x00]
+# CHECK-LE: plwa 1, -8589934592(3), 0             # encoding: [0x00,0x00,0x02,0x04
+# CHECK-LE-SAME:                                               0x00,0x00,0x23,0xa4]
+            plwa 1, -8589934592(3), 0
+# CHECK-BE: plwa 1, 8589934591(0), 1              # encoding: [0x04,0x11,0xff,0xff
+# CHECK-BE-SAME:                                               0xa4,0x20,0xff,0xff]
+# CHECK-LE: plwa 1, 8589934591(0), 1              # encoding: [0xff,0xff,0x11,0x04,
+# CECHK-LE-SAME:                                               0xff,0xff,0x20,0xa4]
+            plwa 1, 8589934591(0), 1
 # CHECK-BE: pld 1, -8589934592(3), 0              # encoding: [0x04,0x02,0x00,0x00,
 # CHECK-BE-SAME:                                               0xe4,0x23,0x00,0x00]
 # CHECK-LE: pld 1, -8589934592(3), 0              # encoding: [0x00,0x00,0x02,0x04
 # CHECK-LE-SAME:                                               0x00,0x00,0x23,0xe4]
             pld 1, -8589934592(3), 0
 # CHECK-BE: pld 1, 8589934591(0), 1               # encoding: [0x04,0x11,0xff,0xff
 # CHECK-BE-SAME:                                               0xe4,0x20,0xff,0xff]
 # CHECK-LE: pld 1, 8589934591(0), 1               # encoding: [0xff,0xff,0x11,0x04,
 # CHECK-LE-SAME:                                               0xff,0xff,0x20,0xe4]
             pld 1, 8589934591(0), 1