[XCOFF][AIX] Support basic relocation type on AIX

[jasonliu]

Summary

This patch intends to support three most common relocation type on AIX: R_POS, R_TOC, R_RBR.
These three relocation type will be needed for object file generation on AIX for small code model.
We will have follow up patches to bring relocation support for large code model on AIX.

[DiggerLin]

llvm/lib/MC/XCOFFObjectWriter.cpp

347

1. Can We delete code line 350 ~ 354 ?

2. and change line 333 to

if ( XCOFF::XTY_ER != MCSec->getCSectType() && nameShouldBeInStringTable(MCSec->getSectionName()))

3. delete line 328 ,329 assert(XCOFF::XTY_ER != MCSec->getCSectType() && "An undefined csect should not get registered.");

4. changed the line 336

CsectGroup &Group = getCsectGroup(MCSec);

to
CsectGroup &Group = (XCOFF::XTY_ER != MCSec->getCSectType() ? getCsectGroup(MCSec): UndefinedCsects);

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

347

I don't think we could do this under current design. As the 328 and 329 assert suggested, we do not register undefined csect, we only register its symbol.

[DiggerLin]

llvm/lib/MC/XCOFFObjectWriter.cpp

51

can we use sizeof(XCOFFRelocation) when using SizeOfXCOFFRelocation32 ?

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

The relocation encodes the bit length being relocated minus 1. Add back the 1 to get the actual length being relocated.
this one should be 23 ?

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

51

No, as I'm trying to express in the comments above, the sizeof(XCOFFRelocation) is 12, but actual size is 10.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

No, we have 25 in the actual object file.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

49

Suggestion:
The in-memory 32-bit XCOFF relocation structure is 12 bytes long, but the trailing 2-byte padding is omitted in the binary format.

51

I think we can drop "XCOFF"; this is a .cpp file that is XCOFF-specific.

Suggestion: RelocationSerializationSize32.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

55

I just want to make sure we have a good reason (e.g., a sizable performance benefit) for having this in-memory version instead of reusing the llvm::object::XCOFFRelocation32 serialization version.

160

s/MC Section/MCSection/;

160

s/corrresponding/corresponding/;

165

s/corrresponding/corresponding/;

[hubert.reinterpretcast]

llvm/lib/MC/MCXCOFFStreamer.cpp

75

Does the reference returned by DF->getContents() change between loop iterations? For that matter, does the value returned by size()?

76

Does the reference returned by DF->getFixups() change between loop iterations?

llvm/lib/MC/XCOFFObjectWriter.cpp

51

I believe that sizeof(llvm::object::XCOFFRelocation32) is 10 (and we should not hard-code 10 here).

163

The east const here does not agree with line 196, which uses west const.

167

Fix the east const here too.

254–256

Insert "the" before "mappings".

618

Blank line before the comment please.

621

Blank line before the comment please.

639

Please move the comment into the if.

686

Please move the comment into the if.

699

Add "the" before "file offset" and "relocation entries".

706

Both the multiplication and the addition can overflow here.

709

It seems there is no special alignment requirement for the symbol table. Alignment as low as 2-byte has been observed.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

22

There's XR_SIGN_INDICATOR_MASK in the codebase already.

24

Is there a reason here to override public member functions of a public base class as protected?

46

Can we just return directly instead of assigning to a variable first?

69

There is a chance that merging this with the previous function would improve the logic and reduce parallel maintenance. In particular, the "magic numbers" are easier to swallow if they are paired with the XCOFF relocation type.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

126

It would be better if there was a case where the TOC entry is at a non-zero offset from the TOC base.

141

@DiggerLin, I think this makes a good case for printing the storage mapping class for other-than-label-definition symbols.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

263

Comment needs updating.

393

I believe we decided that the PascalCase for "csect" is Csect.

403

Is this really about temporary symbols, or is this more to do with linkage?

408

s/relaitve/relative/;

However, I think you mean the "symbol's virtual address in this object file".

414

The coding standards say:

If you use a braced initializer list when initializing a variable, use an equals before the open curly brace: [ ... ]

[DiggerLin]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

And my suggestion is to use a constexpr instead of using number directly here.

84

the bit length of the relocatable reference of PPC::fixup_ppc_br24 is 24 bits ?
if it is , according to xcoff document .
r_rsize : 0x3F(6 bits)
Specifies the bit length of the relocatable reference minus one. The current architecture allows for fields of up to 32 bits (XCOFF32) or 64 bits (XCOFF64) to be relocated.

it should be 24bits -1 = 23.

[jasonliu]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

84

Branches are 4 byte aligned, so the 24 bits we encode in the instruction actually represents a 26 bit offset (because the implication the bottom 2 bits are 0), so it is 26-1.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

411

Consider:

int x = 2, arr[100] = { 1 };
extern int *p = arr + 42;

The raw data with this patch does not reflect the offset from arr that p points to (and neither does the relocation itself):

00000004 arr:
       4: 00 00 00 01                   <unknown>
                ...

00000194 p:
     194: 00 00 00 04                   <unknown>

The raw data without this patch was correct.

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

51

Could we include headers from llvm/Object in MC components?
It seems the current convention is to only use headers from llvm/BinaryFormat, and llvm/Object is more for tooling purpose(llvm-readobj, llvm-objdump) and not object generation.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

51

Good point. I would suggest this hard-coded value belongs in BinaryFormat and llvm/Object should check against that value.

[jasonliu]

Addressed first round of comments.

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

55

As the comment above suggested, we do not want to use the version in llvm/Object for object file generation.

403

Whenever we have a temporary symbol, we would relocate its containing csect because temporary symbol would not be on the symbol table.

709

I will remove the TODO.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

22

Unfortunately that's in llvm/Object. And we should have put it in llvm/BinaryFormat.

69

Suggestion taken.

84

Regarding to your suggestion for using constexpr value here... I'm not sure if it really helps that much. As the magic number I'm using here actually have some relationship with the Fixup Kind, in my mind, it's actually easier for people to reason about why we use that number if we just put that number in directly.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

126

You are right. I added the test and discovered we also need to calculate the FixedValue for R_TOC relocation.

[jasonliu]

Address some minor concerns Hubert have in the offline discussion:

1. Get symbol table index using SymA directly, if we can't find it in the symbol table, then find its csect in the symbol table.
2. return pairs using uniform init directly in the switch.

[daltenty]

llvm/lib/MC/XCOFFObjectWriter.cpp

709

These asserts are not meaningful, we are just going to wrap.

[daltenty]

llvm/lib/MC/MCXCOFFStreamer.cpp

74

can be marked const

[jasonliu]

Addressed David's comment.

1. Added const.
2. Make the assertions useful.

[jasonliu]

Ping.

[daltenty]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

49

I'm not sure that using IsPCRel this way makes sense, see R_TOC note below.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

86

For the R_TOC relocation, shouldn't this be signed as this is a displacement?

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

400

No comma before "or" here.

401

s/relocate its csect/have the relocation reference its csect/;

409

Is SectionMap[SymASec]->Address a fancy way of saying 0 for undefined symbols? If so, can we move it into the ternary expression?

411

As discussed off-list, the added test should cover this too.

421

assert(TargetObjectWriter->is64Bit() || Fixup.getOffset() <= UINT32_MAX - Layout.getFragmentOffset(Fragment));

708

Size required for the relocation entries of the current section is too large for a 32-bit object file.

711

Before the increment:
assert(RawPointer <= UINT32_MAX - RelocationSizeInSec && "Offset following the relocation data cannot be represented in 32 bits.");

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

29

Missing override.

46

This could be done (if indeed the current condition is correct) as:

const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u;

52

Add "a" before "strong".

65

This could be done as EncodedSignednessIndicator | 15.

71

Same comment.

74

Same comment.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

158

The column alignment is off here.

165

As discussed off-list, we should want the symbol table dump to match this virtual address with the TOC entry for globalA, etc.

[jasonliu]

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

49

Addressed below.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

86

The relocation reference for toc entry should always be unsigned, because it is relative to the TOC anchor, and TOC entry has to come after TOC anchor.

[daltenty]

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

86

This does not appear to be the case generally. While we may generate them at a strictly positive offset in the object file
(possible more than can fit in the available displacement), the linker will combine and reorder them into a valid order.

Thus if there are more than 8192 TOC entries (in 32-bit mode), the linker will place TC entries above the anchor and generate the appropriately negatively signed displacement.

XLC also thus appears to generate these relocations as signed.

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

409

SectionMap[SymASec]->Address is not just for undefined symbols. If SymA is a label inside of csect, we need to get (the csect address + the symbol offset) to get the exact address of that label.

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

409

Had offline discussion on this, and I will change the code to this as suggested.

FixedValue = (SymA.isDefined() ? SectionMap[SymASec]->Address + Layout.getSymbolOffset(SymA) 
                                                       : 0) + Target.getConstant();

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

86

You are right.
There are some offline discussion going on with @daltenty and also people from AIX OS team. I will try to summarize them here and also put into the comments.

1. The linker could move TC entries above TOC anchor during linking. So they could have a negative offset.
2. However, assembler generates unsigned bit for this TC entry relocation.
3. Stephen from AIX OS says the sign bit of relocation is mostly ignored by the link-editor. What's important is the behavior of the hardware instruction.

Based on that, here's what I'm planning to do in this patch:

1. Since the signness does not matter most of the time, let's just follow what assembler's behavior and use the IsPCRel to determine if it is signed or not.
2. For this patch, let's disallow the overflow in the compiler. Report fatal_error when positive range runs out.

[DiggerLin]

llvm/lib/Object/XCOFFObjectFile.cpp

611

I do not think we need to add assert here, implement of XCOFFRelocation32 is packed alignment.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

22

we maybe need to have NFC patch to put the XR_SIGN_INDICATOR_MASK, XR_FIXUP_INDICATOR_MASK, XR_BIASED_LENGTH_MASK into XCOFF.h , and shared with XCOFFObjectFile.h

[jasonliu]

Addressed last round of comments from David and Hubert.

[jasonliu]

llvm/lib/Object/XCOFFObjectFile.cpp

611

Yes, it is packed alignment now, the assertion here is to make sure it will always be packed alignment in the future. So I don't think adding assertion here is a bad thing.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

22

I agree we should have a NFC patch to clean it up. I think we could do that after this lands.

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

409

Just discovered why I could not do the way as suggested. Added rationale into the comments.

411

Added into the same test. See arr and p in the test below. Thanks.

[daltenty]

Other than minor nit, LGTM

llvm/lib/MC/XCOFFObjectWriter.cpp

706

nit: shouldn't these exceeding 32-bit assertions be report_fatal_errors? The user isn't going to get back a usable object file if this is the case.

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

50

nit: decides

[jasonliu]

llvm/lib/MC/XCOFFObjectWriter.cpp

706

When I rethink the assertions, I think we could remove

1. assert(Sec->RelocationCount < (UINT32_MAX / XCOFF::RelocationSerializationSize32)) because RelocationCount is uint16_t, and XCOFF::RelocationSerializationSize32 is always 10. So it won't be able to overflow RelocationSizeInSec which is a uint32_t.
2. assert(RawPointer <= UINT32_MAX - RelocationSizeInSec) because RawPointer gets its initial value from RelocationEntryOffset(uint32_t), so adding any uint32_t is not going to overflow RawPointer which is uint64_t.
   
   I will make "assert(RawPointer <= UINT32_MAX);" a fatal_error.

[hubert.reinterpretcast]

llvm/lib/MC/XCOFFObjectWriter.cpp

717

Use the text for the assertion above. The actual issue is that the symbol table needs to start at a point where the offset value can be encoded. The file can exceed 4 GiB.

llvm/include/llvm/BinaryFormat/XCOFF.h

 
 #include "llvm/ADT/StringRef.h"
 #include <cstdint>
 
 namespace llvm {
 namespace XCOFF {
 
 // Constants used in the XCOFF definition.
-enum { FileNamePadSize = 6, NameSize = 8, SymbolTableEntrySize = 18 };
+enum {
+  FileNamePadSize = 6,
+  NameSize = 8,
+  SymbolTableEntrySize = 18,
+  RelocationSerializationSize32 = 10
+};
 
 enum ReservedSectionNum { N_DEBUG = -2, N_ABS = -1, N_UNDEF = 0 };
 
 // x_smclas field of x_csect from system header: /usr/include/syms.h
 /// Storage Mapping Class definitions.
 enum StorageMappingClass : uint8_t {
   //     READ ONLY CLASSES
   XMC_PR = 0,      ///< Program Code

llvm/include/llvm/MC/MCXCOFFObjectWriter.h

public:
   ~MCXCOFFObjectTargetWriter() override;
 
   Triple::ObjectFormatType getFormat() const override { return Triple::XCOFF; }
   static bool classof(const MCObjectTargetWriter *W) {
     return W->getFormat() == Triple::XCOFF;
   }
   bool is64Bit() const { return Is64Bit; }
 
+  // Returns relocation info such as type, sign and size.
+  // First element of the pair contains type,
+  // second element contains sign and size.
+  virtual std::pair<uint8_t, uint8_t>
+  getRelocTypeAndSignSize(const MCValue &Target, const MCFixup &Fixup,
+                          bool IsPCRel) const = 0;
+
 private:
   bool Is64Bit;
 };
 
 std::unique_ptr<MCObjectWriter>
 createXCOFFObjectWriter(std::unique_ptr<MCXCOFFObjectTargetWriter> MOTW,
                         raw_pwrite_stream &OS);
 
 } // end namespace llvm
 
 #endif // LLVM_MC_MCXCOFFOBJECTWRITER_H

llvm/lib/MC/MCXCOFFStreamer.cpp

 void MCXCOFFStreamer::EmitInstToData(const MCInst &Inst,
                                      const MCSubtargetInfo &STI) {
   MCAssembler &Assembler = getAssembler();
   SmallVector<MCFixup, 4> Fixups;
   SmallString<256> Code;
   raw_svector_ostream VecOS(Code);
   Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
 
-  // TODO: Handle Fixups later
-
+  // Add the fixups and data.
   MCDataFragment *DF = getOrCreateDataFragment(&STI);
+  const size_t ContentsSize = DF->getContents().size();
+  auto &DataFragmentFixups = DF->getFixups();
+  for (auto &Fixup : Fixups) {
+    Fixup.setOffset(Fixup.getOffset() + ContentsSize);
+    DataFragmentFixups.push_back(Fixup);
+  }
+
   DF->setHasInstructions(STI);
   DF->getContents().append(Code.begin(), Code.end());
 }
 
 MCStreamer *llvm::createXCOFFStreamer(MCContext &Context,
                                       std::unique_ptr<MCAsmBackend> &&MAB,
                                       std::unique_ptr<MCObjectWriter> &&OW,
                                       std::unique_ptr<MCCodeEmitter> &&CE,

llvm/lib/MC/XCOFFObjectWriter.cpp

 //===-- lib/MC/XCOFFObjectWriter.cpp - XCOFF file writer ------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements XCOFF object file writer information.
 //
 //===----------------------------------------------------------------------===//
 
 #include "llvm/BinaryFormat/XCOFF.h"
+#include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCAsmLayout.h"
 #include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCFixup.h"
+#include "llvm/MC/MCFixupKindInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSectionXCOFF.h"
 #include "llvm/MC/MCSymbolXCOFF.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/MCXCOFFObjectWriter.h"
 #include "llvm/MC/StringTableBuilder.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/MathExtras.h"

 // XMC_RW which gets mapped to either .data or .bss based on whether it's
 // explicitly initialized or not.
 //
 // We don't represent the sections in the MC layer as there is nothing
 // interesting about them at at that level: they carry information that is
 // only relevant to the ObjectWriter, so we materialize them in this class.
 namespace {
 
 constexpr unsigned DefaultSectionAlign = 4;
 constexpr int16_t MaxSectionIndex = INT16_MAX;
 
 // Packs the csect's alignment and type into a byte.
 uint8_t getEncodedType(const MCSectionXCOFF *);
 
+struct XCOFFRelocation {
+  uint32_t SymbolTableIndex;
+  uint32_t FixupOffsetInCsect;
+  uint8_t SignAndSize;
+  uint8_t Type;
+};
+
 // Wrapper around an MCSymbolXCOFF.
 struct Symbol {
   const MCSymbolXCOFF *const MCSym;
   uint32_t SymbolTableIndex;
 
   XCOFF::StorageClass getStorageClass() const {
     return MCSym->getStorageClass();
   }
   StringRef getName() const { return MCSym->getName(); }
   Symbol(const MCSymbolXCOFF *MCSym) : MCSym(MCSym), SymbolTableIndex(-1) {}
 };
 
 // Wrapper for an MCSectionXCOFF.
 struct ControlSection {
   const MCSectionXCOFF *const MCCsect;
   uint32_t SymbolTableIndex;
   uint32_t Address;
   uint32_t Size;
 
   SmallVector<Symbol, 1> Syms;
+  SmallVector<XCOFFRelocation, 1> Relocations;
   StringRef getName() const { return MCCsect->getSectionName(); }
   ControlSection(const MCSectionXCOFF *MCSec)
       : MCCsect(MCSec), SymbolTableIndex(-1), Address(-1), Size(0) {}
 };
 
 // Type to be used for a container representing a set of csects with
 // (approximately) the same storage mapping class. For example all the csects
 // with a storage mapping class of `xmc_pr` will get placed into the same
 // container.
 using CsectGroup = std::deque<ControlSection>;
-
 using CsectGroups = std::deque<CsectGroup *>;
 
 // Represents the data related to a section excluding the csects that make up
 // the raw data of the section. The csects are stored separately as not all
 // sections contain csects, and some sections contain csects which are better
 // stored separately, e.g. the .data section containing read-write, descriptor,
 // TOCBase and TOC-entry csects.
 struct Section {
struct Section {
   }
 };
 
 class XCOFFObjectWriter : public MCObjectWriter {
 
   uint32_t SymbolTableEntryCount = 0;
   uint32_t SymbolTableOffset = 0;
   uint16_t SectionCount = 0;
+  uint32_t RelocationEntryOffset = 0;
 
   support::endian::Writer W;
   std::unique_ptr<MCXCOFFObjectTargetWriter> TargetObjectWriter;
   StringTableBuilder Strings;
 
+  // Maps the MCSection representation to its corresponding ControlSection
+  // wrapper. Needed for finding the ControlSection to insert an MCSymbol into
+  // from its containing MCSectionXCOFF.
+  DenseMap<const MCSectionXCOFF *, ControlSection *> SectionMap;
+
+  // Maps the MCSymbol representation to its corrresponding symbol table index.
+  // Needed for relocation.
+  DenseMap<const MCSymbol *, uint32_t> SymbolIndexMap;
+
   // CsectGroups. These store the csects which make up different parts of
   // the sections. Should have one for each set of csects that get mapped into
   // the same section and get handled in a 'similar' way.
   CsectGroup UndefinedCsects;
   CsectGroup ProgramCodeCsects;
   CsectGroup ReadOnlyCsects;
   CsectGroup DataCsects;
   CsectGroup FuncDSCsects;
void writeSymbolTableEntryForCsectMemberLabel(const Symbol &,
                                                 const ControlSection &, int16_t,
                                                 uint64_t);
   void writeSymbolTableEntryForControlSection(const ControlSection &, int16_t,
                                               XCOFF::StorageClass);
   void writeFileHeader();
   void writeSectionHeaderTable();
   void writeSections(const MCAssembler &Asm, const MCAsmLayout &Layout);
   void writeSymbolTable(const MCAsmLayout &Layout);
+  void writeRelocations();
+  void writeRelocation(XCOFFRelocation Reloc, const ControlSection &CSection);
 
   // Called after all the csects and symbols have been processed by
   // `executePostLayoutBinding`, this function handles building up the majority
   // of the structures in the object file representation. Namely:
   // *) Calculates physical/virtual addresses, raw-pointer offsets, and section
   //    sizes.
   // *) Assigns symbol table indices.
   // *) Builds up the section header table by adding any non-empty sections to
   //    `Sections`.
   void assignAddressesAndIndices(const MCAsmLayout &);
+  void finalizeSectionInfo();
 
   bool
   needsAuxiliaryHeader() const { /* TODO aux header support not implemented. */
     return false;
   }
 
   // Returns the size of the auxiliary header to be written to the object file.
   size_t auxiliaryHeaderSize() const {
: W(OS, support::big), TargetObjectWriter(std::move(MOTW)),
       Text(".text", XCOFF::STYP_TEXT, /* IsVirtual */ false,
            CsectGroups{&ProgramCodeCsects, &ReadOnlyCsects}),
       Data(".data", XCOFF::STYP_DATA, /* IsVirtual */ false,
            CsectGroups{&DataCsects, &FuncDSCsects, &TOCCsects}),
       BSS(".bss", XCOFF::STYP_BSS, /* IsVirtual */ true,
           CsectGroups{&BSSCsects}) {}
 
 void XCOFFObjectWriter::reset() {
-  UndefinedCsects.clear();
+  // Clear the mappings we created.
+  SymbolIndexMap.clear();
+  SectionMap.clear();
 
+  UndefinedCsects.clear();
   // Reset any sections we have written to, and empty the section header table.
   for (auto *Sec : Sections)
     Sec->reset();
 
-  // Reset the symbol table and string table.
+  // Reset states in XCOFFObjectWriter.
   SymbolTableEntryCount = 0;
   SymbolTableOffset = 0;
   SectionCount = 0;
+  RelocationEntryOffset = 0;
   Strings.clear();
 
   MCObjectWriter::reset();
 }
 
 CsectGroup &XCOFFObjectWriter::getCsectGroup(const MCSectionXCOFF *MCSec) {
   switch (MCSec->getMappingClass()) {
   case XCOFF::XMC_PR:
CsectGroup &XCOFFObjectWriter::getCsectGroup(const MCSectionXCOFF *MCSec) {
   }
 }
 
 void XCOFFObjectWriter::executePostLayoutBinding(MCAssembler &Asm,
                                                  const MCAsmLayout &Layout) {
   if (TargetObjectWriter->is64Bit())
     report_fatal_error("64-bit XCOFF object files are not supported yet.");
 
-  // Maps the MC Section representation to its corresponding ControlSection
-  // wrapper. Needed for finding the ControlSection to insert an MCSymbol into
-  // from its containing MCSectionXCOFF.
-  DenseMap<const MCSectionXCOFF *, ControlSection *> WrapperMap;
-
   for (const auto &S : Asm) {
     const auto *MCSec = cast<const MCSectionXCOFF>(&S);
-    assert(WrapperMap.find(MCSec) == WrapperMap.end() &&
+    assert(SectionMap.find(MCSec) == SectionMap.end() &&
            "Cannot add a csect twice.");
     assert(XCOFF::XTY_ER != MCSec->getCSectType() &&
            "An undefined csect should not get registered.");
 
     // If the name does not fit in the storage provided in the symbol table
     // entry, add it to the string table.
     if (nameShouldBeInStringTable(MCSec->getSectionName()))
       Strings.add(MCSec->getSectionName());
 
     CsectGroup &Group = getCsectGroup(MCSec);
     Group.emplace_back(MCSec);
-    WrapperMap[MCSec] = &Group.back();
+    SectionMap[MCSec] = &Group.back();
   }
 
   for (const MCSymbol &S : Asm.symbols()) {
     // Nothing to do for temporary symbols.
     if (S.isTemporary())
       continue;
 
     const MCSymbolXCOFF *XSym = cast<MCSymbolXCOFF>(&S);
     const MCSectionXCOFF *ContainingCsect = XSym->getContainingCsect();
 
     // Handle undefined symbol.
     if (ContainingCsect->getCSectType() == XCOFF::XTY_ER) {
       UndefinedCsects.emplace_back(ContainingCsect);
+      SectionMap[ContainingCsect] = &UndefinedCsects.back();
       continue;
     }
 
     // If the symbol is the csect itself, we don't need to put the symbol
     // into csect's Syms.
     if (XSym == ContainingCsect->getQualNameSymbol())
       continue;
 
-    assert(WrapperMap.find(ContainingCsect) != WrapperMap.end() &&
+    assert(SectionMap.find(ContainingCsect) != SectionMap.end() &&
            "Expected containing csect to exist in map");
 
     // Lookup the containing csect and add the symbol to it.
-    WrapperMap[ContainingCsect]->Syms.emplace_back(XSym);
+    SectionMap[ContainingCsect]->Syms.emplace_back(XSym);
 
     // If the name does not fit in the storage provided in the symbol table
     // entry, add it to the string table.
     if (nameShouldBeInStringTable(XSym->getName()))
       Strings.add(XSym->getName());
     }
 
   Strings.finalize();
   assignAddressesAndIndices(Layout);
 }
 
-void XCOFFObjectWriter::recordRelocation(MCAssembler &, const MCAsmLayout &,
-                                         const MCFragment *, const MCFixup &,
-                                         MCValue, uint64_t &) {
-  // TODO: recordRelocation is not yet implemented.
+void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
+                                         const MCAsmLayout &Layout,
+                                         const MCFragment *Fragment,
+                                         const MCFixup &Fixup, MCValue Target,
+                                         uint64_t &FixedValue) {
+
+  if (Target.getSymB())
+    report_fatal_error("Handling Target.SymB for relocation is unimplemented.");
+
+  const MCSymbol &SymA = Target.getSymA()->getSymbol();
+
+  MCAsmBackend &Backend = Asm.getBackend();
+  bool IsPCRel = Backend.getFixupKindInfo(Fixup.getKind()).Flags &
+                 MCFixupKindInfo::FKF_IsPCRel;
+
+  uint8_t Type;
+  uint8_t SignAndSize;
+  std::tie(Type, SignAndSize) =
+      TargetObjectWriter->getRelocTypeAndSignSize(Target, Fixup, IsPCRel);
+
+  const MCSectionXCOFF *SymASec =
+      cast<MCSymbolXCOFF>(SymA).getContainingCsect();
+  assert(SectionMap.find(SymASec) != SectionMap.end() &&
+         "Expected containing csect to exist in map.");
+
+  // If we could not find SymA directly in SymbolIndexMap, this symbol could
+  // either be a temporary symbol or an undefined symbol. In this case, we
+  // would need to have the relocation reference its csect instead.
+  uint32_t Index = SymbolIndexMap.find(&SymA) != SymbolIndexMap.end()
+                       ? SymbolIndexMap[&SymA]
+                       : SymbolIndexMap[SymASec->getQualNameSymbol()];
+
+  if (Type == XCOFF::RelocationType::R_POS)
+    // The FixedValue should be symbol's virtual address in this object file
+    // plus any constant value that we might get.
+    // Notice that SymA.isDefined() could return false, but SymASec could still
+    // be a defined csect. One of the example is the TOC-base symbol.
+    FixedValue = SectionMap[SymASec]->Address +
+                 (SymA.isDefined() ? Layout.getSymbolOffset(SymA) : 0) +
+                 Target.getConstant();
+  else if (Type == XCOFF::RelocationType::R_TOC)
+    // The FixedValue should be the TC entry offset from TOC-base.
+    FixedValue = SectionMap[SymASec]->Address - TOCCsects.front().Address;
+
+  assert(
+      (TargetObjectWriter->is64Bit() ||
+       Fixup.getOffset() <= UINT32_MAX - Layout.getFragmentOffset(Fragment)) &&
+      "Fragment offset + fixup offset is overflowed in 32-bit mode.");
+  uint32_t FixupOffsetInCsect =
+      Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
+
+  XCOFFRelocation Reloc = {Index, FixupOffsetInCsect, SignAndSize, Type};
+  MCSectionXCOFF *RelocationSec = cast<MCSectionXCOFF>(Fragment->getParent());
+  assert(SectionMap.find(RelocationSec) != SectionMap.end() &&
+         "Expected containing csect to exist in map.");
+  SectionMap[RelocationSec]->Relocations.push_back(Reloc);
 }
 
 void XCOFFObjectWriter::writeSections(const MCAssembler &Asm,
                                       const MCAsmLayout &Layout) {
   uint32_t CurrentAddressLocation = 0;
   for (const auto *Section : Sections) {
     // Nothing to write for this Section.
     if (Section->Index == Section::UninitializedIndex || Section->IsVirtual)
uint64_t XCOFFObjectWriter::writeObject(MCAssembler &Asm,
   // linking is not enabled, in case, like with Windows COFF, such a timestamp
   // is incompatible with incremental linking of XCOFF.
   if (Asm.isIncrementalLinkerCompatible())
     report_fatal_error("Incremental linking not supported for XCOFF.");
 
   if (TargetObjectWriter->is64Bit())
     report_fatal_error("64-bit XCOFF object files are not supported yet.");
 
+  finalizeSectionInfo();
   uint64_t StartOffset = W.OS.tell();
 
   writeFileHeader();
   writeSectionHeaderTable();
   writeSections(Asm, Layout);
-  // TODO writeRelocations();
+  writeRelocations();
 
   writeSymbolTable(Layout);
   // Write the string table.
   Strings.write(W.OS);
 
   return W.OS.tell() - StartOffset;
 }
 
for (const auto *Sec : Sections) {
 
     // Write the Physical Address and Virtual Address. In an object file these
     // are the same.
     W.write<uint32_t>(Sec->Address);
     W.write<uint32_t>(Sec->Address);
 
     W.write<uint32_t>(Sec->Size);
     W.write<uint32_t>(Sec->FileOffsetToData);
+    W.write<uint32_t>(Sec->FileOffsetToRelocations);
 
-    // Relocation pointer and Lineno pointer. Not supported yet.
-    W.write<uint32_t>(0);
+    // Line number pointer. Not supported yet.
     W.write<uint32_t>(0);
 
-    // Relocation and line-number counts. Not supported yet.
-    W.write<uint16_t>(0);
+    W.write<uint16_t>(Sec->RelocationCount);
+
+    // Line number counts. Not supported yet.
     W.write<uint16_t>(0);
 
     W.write<int32_t>(Sec->Flags);
   }
 }
 
+void XCOFFObjectWriter::writeRelocation(XCOFFRelocation Reloc,
+                                        const ControlSection &CSection) {
+  W.write<uint32_t>(CSection.Address + Reloc.FixupOffsetInCsect);
+  W.write<uint32_t>(Reloc.SymbolTableIndex);
+  W.write<uint8_t>(Reloc.SignAndSize);
+  W.write<uint8_t>(Reloc.Type);
+}
+
+void XCOFFObjectWriter::writeRelocations() {
+  for (const auto *Section : Sections) {
+    if (Section->Index == Section::UninitializedIndex)
+      // Nothing to write for this Section.
+      continue;
+
+    for (const auto *Group : Section->Groups) {
+      if (Group->empty())
+        continue;
+
+      for (const auto &Csect : *Group) {
+        for (const auto Reloc : Csect.Relocations)
+          writeRelocation(Reloc, Csect);
+      }
+    }
+  }
+}
+
 void XCOFFObjectWriter::writeSymbolTable(const MCAsmLayout &Layout) {
   for (const auto &Csect : UndefinedCsects) {
     writeSymbolTableEntryForControlSection(
         Csect, XCOFF::ReservedSectionNum::N_UNDEF, Csect.MCCsect->getStorageClass());
   }
 
   for (const auto *Section : Sections) {
-    // Nothing to write for this Section.
     if (Section->Index == Section::UninitializedIndex)
+      // Nothing to write for this Section.
       continue;
 
     for (const auto *Group : Section->Groups) {
       if (Group->empty())
         continue;
 
       const int16_t SectionIndex = Section->Index;
       for (const auto &Csect : *Group) {
         // Write out the control section first and then each symbol in it.
         writeSymbolTableEntryForControlSection(
             Csect, SectionIndex, Csect.MCCsect->getStorageClass());
 
         for (const auto &Sym : Csect.Syms)
           writeSymbolTableEntryForCsectMemberLabel(
               Sym, Csect, SectionIndex, Layout.getSymbolOffset(*(Sym.MCSym)));
       }
     }
   }
 }
 
+void XCOFFObjectWriter::finalizeSectionInfo() {
+  for (auto *Section : Sections) {
+    if (Section->Index == Section::UninitializedIndex)
+      // Nothing to record for this Section.
+      continue;
+
+    for (const auto *Group : Section->Groups) {
+      if (Group->empty())
+        continue;
+
+      for (auto &Csect : *Group)
+        Section->RelocationCount += Csect.Relocations.size();
+    }
+  }
+
+  // Calculate the file offset to the relocation entries.
+  uint64_t RawPointer = RelocationEntryOffset;
+  for (auto Sec : Sections) {
+    if (Sec->Index == Section::UninitializedIndex || !Sec->RelocationCount)
+      continue;
+
+    Sec->FileOffsetToRelocations = RawPointer;
+    const uint32_t RelocationSizeInSec =
+        Sec->RelocationCount * XCOFF::RelocationSerializationSize32;
+    RawPointer += RelocationSizeInSec;
+    if (RawPointer > UINT32_MAX)
+      report_fatal_error("Relocation data overflowed this object file.");
+  }
+
+  // TODO Error check that the number of symbol table entries fits in 32-bits
+  // signed ...
+  if (SymbolTableEntryCount)
+    SymbolTableOffset = RawPointer;
+}
+
 void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
   // The first symbol table entry is for the file name. We are not emitting it
   // yet, so start at index 0.
   uint32_t SymbolTableIndex = 0;
 
   // Calculate indices for undefined symbols.
   for (auto &Csect : UndefinedCsects) {
     Csect.Size = 0;
     Csect.Address = 0;
     Csect.SymbolTableIndex = SymbolTableIndex;
+    SymbolIndexMap[Csect.MCCsect->getQualNameSymbol()] = Csect.SymbolTableIndex;
     // 1 main and 1 auxiliary symbol table entry for each contained symbol.
     SymbolTableIndex += 2;
   }
 
   // The address corrresponds to the address of sections and symbols in the
   // object file. We place the shared address 0 immediately after the
   // section header table.
   uint32_t Address = 0;
for (auto *Group : Section->Groups) {
         continue;
 
       for (auto &Csect : *Group) {
         const MCSectionXCOFF *MCSec = Csect.MCCsect;
         Csect.Address = alignTo(Address, MCSec->getAlignment());
         Csect.Size = Layout.getSectionAddressSize(MCSec);
         Address = Csect.Address + Csect.Size;
         Csect.SymbolTableIndex = SymbolTableIndex;
+        SymbolIndexMap[MCSec->getQualNameSymbol()] = Csect.SymbolTableIndex;
         // 1 main and 1 auxiliary symbol table entry for the csect.
         SymbolTableIndex += 2;
         
         for (auto &Sym : Csect.Syms) {
           Sym.SymbolTableIndex = SymbolTableIndex;
+          SymbolIndexMap[Sym.MCSym] = Sym.SymbolTableIndex;
           // 1 main and 1 auxiliary symbol table entry for each contained
           // symbol.
           SymbolTableIndex += 2;
         }
       }
 
       if (!SectionAddressSet) {
         Section->Address = Group->front().Address;
void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
   uint64_t RawPointer = sizeof(XCOFF::FileHeader32) + auxiliaryHeaderSize() +
                         SectionCount * sizeof(XCOFF::SectionHeader32);
   for (auto *Sec : Sections) {
     if (Sec->Index == Section::UninitializedIndex || Sec->IsVirtual)
       continue;
 
     Sec->FileOffsetToData = RawPointer;
     RawPointer += Sec->Size;
+    if (RawPointer > UINT32_MAX)
+      report_fatal_error("Section raw data overflowed this object file.");
   }
 
-  // TODO Add in Relocation storage to the RawPointer Calculation.
-  // TODO What to align the SymbolTable to?
-  // TODO Error check that the number of symbol table entries fits in 32-bits
-  // signed ...
-  if (SymbolTableEntryCount)
-    SymbolTableOffset = RawPointer;
+  RelocationEntryOffset = RawPointer;
 }
 
 // Takes the log base 2 of the alignment and shifts the result into the 5 most
 // significant bits of a byte, then or's in the csect type into the least
 // significant 3 bits.
 uint8_t getEncodedType(const MCSectionXCOFF *Sec) {
   unsigned Align = Sec->getAlignment();
   assert(isPowerOf2_32(Align) && "Alignment must be a power of 2.");

llvm/lib/Object/XCOFFObjectFile.cpp

XCOFFObjectFile::relocations(const XCOFFSectionHeader32 &Sec) const {
   uintptr_t RelocAddr = getWithOffset(reinterpret_cast<uintptr_t>(FileHeader),
                                       Sec.FileOffsetToRelocationInfo);
   auto NumRelocEntriesOrErr = getLogicalNumberOfRelocationEntries(Sec);
   if (Error E = NumRelocEntriesOrErr.takeError())
     return std::move(E);
 
   uint32_t NumRelocEntries = NumRelocEntriesOrErr.get();
 
+  assert(sizeof(XCOFFRelocation32) == XCOFF::RelocationSerializationSize32);
   auto RelocationOrErr =
       getObject<XCOFFRelocation32>(Data, reinterpret_cast<void *>(RelocAddr),
                                    NumRelocEntries * sizeof(XCOFFRelocation32));
   if (Error E = RelocationOrErr.takeError())
     return std::move(E);
 
   const XCOFFRelocation32 *StartReloc = RelocationOrErr.get();
 

llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp

 //===-- PPCXCOFFObjectWriter.cpp - PowerPC XCOFF Writer -------------------===//
 //
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
-#include "PPCMCTargetDesc.h"
+#include "MCTargetDesc/PPCFixupKinds.h"
+#include "MCTargetDesc/PPCMCTargetDesc.h"
+#include "llvm/BinaryFormat/XCOFF.h"
+#include "llvm/MC/MCFixup.h"
+#include "llvm/MC/MCFixupKindInfo.h"
+#include "llvm/MC/MCValue.h"
 #include "llvm/MC/MCXCOFFObjectWriter.h"
 
 using namespace llvm;
 
 namespace {
 class PPCXCOFFObjectWriter : public MCXCOFFObjectTargetWriter {
+  static constexpr uint8_t SignBitMask = 0x80;
 
 public:
   PPCXCOFFObjectWriter(bool Is64Bit);
+
+  std::pair<uint8_t, uint8_t>
+  getRelocTypeAndSignSize(const MCValue &Target, const MCFixup &Fixup,
+                          bool IsPCRel) const override;
 };
 } // end anonymous namespace
 
 PPCXCOFFObjectWriter::PPCXCOFFObjectWriter(bool Is64Bit)
     : MCXCOFFObjectTargetWriter(Is64Bit) {}
 
 std::unique_ptr<MCObjectTargetWriter>
 llvm::createPPCXCOFFObjectWriter(bool Is64Bit) {
   return std::make_unique<PPCXCOFFObjectWriter>(Is64Bit);
 }
+
+std::pair<uint8_t, uint8_t> PPCXCOFFObjectWriter::getRelocTypeAndSignSize(
+    const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const {
+  const MCSymbolRefExpr::VariantKind Modifier =
+      Target.isAbsolute() ? MCSymbolRefExpr::VK_None
+                          : Target.getSymA()->getKind();
+  // People from AIX OS team says AIX link editor does not care about
+  // the sign bit in the relocation entry "most" of the time.
+  // The system assembler seems to set the sign bit on relocation entry
+  // based on similar property of IsPCRel. So we will do the same here.
+  // TODO: More investigation on how assembler decides to set the sign
+  // bit, and we might want to match that.
+  const uint8_t EncodedSignednessIndicator = IsPCRel ? SignBitMask : 0u;
+
+  // The magic number we use in SignAndSize has a strong relationship with
+  // the corresponding MCFixupKind. In most cases, it's the MCFixupKind
+  // number - 1, because SignAndSize encodes the bit length being
+  // relocated minus 1.
+  switch ((unsigned)Fixup.getKind()) {
+  default:
+    report_fatal_error("Unimplemented fixup kind.");
+  case PPC::fixup_ppc_half16:
+    switch (Modifier) {
+    default:
+      report_fatal_error("Unsupported modifier for half16 fixup.");
+    case MCSymbolRefExpr::VK_None:
+      return {XCOFF::RelocationType::R_TOC, EncodedSignednessIndicator | 15};
+    }
+    break;
+  case PPC::fixup_ppc_br24:
+    // Branches are 4 byte aligned, so the 24 bits we encode in
+    // the instruction actually represents a 26 bit offset.
+    return {XCOFF::RelocationType::R_RBR, EncodedSignednessIndicator | 25};
+  case FK_Data_4:
+    return {XCOFF::RelocationType::R_POS, EncodedSignednessIndicator | 31};
+  }
+}

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

if (M.empty())
     return;
 
   // Switch to section to emit TOC base.
   OutStreamer->SwitchSection(getObjFileLowering().getTOCBaseSection());
 
   PPCTargetStreamer &TS =
       static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
 
+  const unsigned EntryByteSize = Subtarget->isPPC64() ? 8 : 4;
+  const unsigned TOCEntriesByteSize = TOC.size() * EntryByteSize;
+  // TODO: If TOC entries' size is larger than 32768, then we run out of
+  // positive displacement to reach the TOC entry. We need to decide how to
+  // handle entries' size larger than that later.
+  if (TOCEntriesByteSize > 32767) {
+    report_fatal_error("Handling of TOC entry displacement larger than 32767 "
+                       "is not yet implemented.");
+  }
+
   for (auto &I : TOC) {
     // Setup the csect for the current TC entry.
     MCSectionXCOFF *TCEntry = cast<MCSectionXCOFF>(
         getObjFileLowering().getSectionForTOCEntry(I.first));
     cast<MCSymbolXCOFF>(I.second)->setContainingCsect(TCEntry);
     OutStreamer->SwitchSection(TCEntry);
 
     OutStreamer->EmitLabel(I.second);

llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll

 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
 ; RUN: -mattr=-altivec -filetype=obj -o %t.o < %s
 
 ; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=32-SYM %s
 
 ; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck \
 ; RUN: --check-prefix=32-REL %s
 
+; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=32-DIS %s
+
 ; RUN: not llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff \
 ; RUN: -mcpu=pwr4 -mattr=-altivec -filetype=obj < %s 2>&1 | FileCheck \
 ; RUN: --check-prefix=64-CHECK %s
 
 ; Test verifies:
 ; If there exists a user-defined function whose name is the same as the
 ; "memcpy" ExternalSymbol's, we pick up the user-defined version, even if this
 ; may lead to some undefined behavior.
 
 define dso_local signext i32 @memcpy(i8* %destination, i32 signext %num) {
 entry:
   ret i32 3
 }
 
 define void @call_memcpy(i8* %p, i8* %q, i32 %n) {
 entry:
   call void @llvm.memcpy.p0i8.p0i8.i32(i8* %p, i8* %q, i32 %n, i1 false)
   ret void
 }
 
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
 
-; TODO: This test should preferably check the symbol table for .o file and
-;       the relocation associated with the call.
+; This test check
+; 1. The symbol table for .o file to verify .memcpy is a defined external label.
+; 2. There is no relocation associated with the call, since callee is defined.
+; 3. Branch instruction in raw data is branching back to the right callee location.
 
 ; 32-SYM:      Symbol {{[{][[:space:]] *}}Index: [[#Index:]]{{[[:space:]] *}}Name: .memcpy 
 ; 32-SYM-NEXT:    Value (RelocatableAddress): 0x0
 ; 32-SYM-NEXT:    Section: .text
 ; 32-SYM-NEXT:    Type: 0x0
 ; 32-SYM-NEXT:    StorageClass: C_EXT (0x2)
 ; 32-SYM-NEXT:    NumberOfAuxEntries: 1
 ; 32-SYM-NEXT:    CSECT Auxiliary Entry {
 ; 32-SYM-NEXT:      Index: 3
 ; 32-SYM-NEXT:      ContainingCsectSymbolIndex: 0
 ; 32-SYM-NEXT:      ParameterHashIndex: 0x0
 ; 32-SYM-NEXT:      TypeChkSectNum: 0x0
 ; 32-SYM-NEXT:      SymbolAlignmentLog2: 0
 ; 32-SYM-NEXT:      SymbolType: XTY_LD (0x2)
 ; 32-SYM-NEXT:      StorageMappingClass: XMC_PR (0x0)
 ; 32-SYM-NEXT:      StabInfoIndex: 0x0
 ; 32-SYM-NEXT:      StabSectNum: 0x0
 ; 32-SYM-NEXT:    }
 ; 32-SYM-NEXT:  }
 
 ; 32-SYM-NOT: .memcpy
 
-; We are expecting to have the test fail when the support for relocations land.
-; 32-REL-NOT: Relocation{{[[:space:]]}}
+; 32-REL:      Relocations [
+; 32-REL-NEXT:  Section (index: 2) .data {
+; 32-REL-NEXT:  Relocation {
+; 32-REL-NEXT:    Virtual Address: 0x34
+; 32-REL-NEXT:    Symbol: .memcpy (2)
+; 32-REL-NEXT:    IsSigned: No
+; 32-REL-NEXT:    FixupBitValue: 0
+; 32-REL-NEXT:    Length: 32
+; 32-REL-NEXT:    Type: R_POS (0x0)
+; 32-REL-NEXT:  }
+; 32-REL-NEXT:  Relocation {
+; 32-REL-NEXT:    Virtual Address: 0x38
+; 32-REL-NEXT:    Symbol: TOC (14)
+; 32-REL-NEXT:    IsSigned: No
+; 32-REL-NEXT:    FixupBitValue: 0
+; 32-REL-NEXT:    Length: 32
+; 32-REL-NEXT:    Type: R_POS (0x0)
+; 32-REL-NEXT:  }
+; 32-REL-NEXT:  Relocation {
+; 32-REL-NEXT:    Virtual Address: 0x40
+; 32-REL-NEXT:    Symbol: .call_memcpy (4)
+; 32-REL-NEXT:    IsSigned: No
+; 32-REL-NEXT:    FixupBitValue: 0
+; 32-REL-NEXT:    Length: 32
+; 32-REL-NEXT:    Type: R_POS (0x0)
+; 32-REL-NEXT:  }
+; 32-REL-NEXT:  Relocation {
+; 32-REL-NEXT:    Virtual Address: 0x44
+; 32-REL-NEXT:    Symbol: TOC (14)
+; 32-REL-NEXT:    IsSigned: No
+; 32-REL-NEXT:    FixupBitValue: 0
+; 32-REL-NEXT:    Length: 32
+; 32-REL-NEXT:    Type: R_POS (0x0)
+; 32-REL-NEXT:  }
+; 32-REL-NEXT:  }
+; 32-REL-NEXT: ]
+
+; 32-REL-NOT:  Type: R_RBR (0x1A)
+
+; 32-DIS:      Disassembly of section .text:
+; 32-DIS:      00000000 .text:
+; 32-DIS-NEXT:        0: 38 60 00 03                   li 3, 3
+; 32-DIS-NEXT:        4: 4e 80 00 20                   blr
+; 32-DIS-NEXT:        8: 60 00 00 00                   nop
+; 32-DIS-NEXT:        c: 60 00 00 00                   nop
+; 32-DIS:      00000010 .call_memcpy:
+; 32-DIS-NEXT:       10: 7c 08 02 a6                   mflr 0
+; 32-DIS-NEXT:       14: 90 01 00 08                   stw 0, 8(1)
+; 32-DIS-NEXT:       18: 94 21 ff c0                   stwu 1, -64(1)
+; 32-DIS-NEXT:       1c: 4b ff ff e5                   bl .-28
+; 32-DIS-NEXT:       20: 60 00 00 00                   nop
+; 32-DIS-NEXT:       24: 38 21 00 40                   addi 1, 1, 64
+; 32-DIS-NEXT:       28: 80 01 00 08                   lwz 0, 8(1)
+; 32-DIS-NEXT:       2c: 7c 08 03 a6                   mtlr 0
+; 32-DIS-NEXT:       30: 4e 80 00 20                   blr
 
 ; 64-CHECK: LLVM ERROR: 64-bit XCOFF object files are not supported yet.

llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll

+; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -mattr=-altivec -filetype=obj -o %t.o < %s
+; RUN: llvm-readobj --section-headers --file-header %t.o | \
+; RUN: FileCheck --check-prefix=OBJ %s
+; RUN: llvm-readobj --relocs --expand-relocs %t.o | FileCheck --check-prefix=RELOC %s
+; RUN: llvm-readobj -t %t.o | FileCheck --check-prefix=SYM %s
+; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=DIS %s
+
+; RUN: not llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc64-ibm-aix-xcoff -mattr=-altivec -filetype=obj < %s 2>&1 | \
+; RUN: FileCheck --check-prefix=XCOFF64 %s
+; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
+
+@globalA = global i32 1, align 4
+@globalB = global i32 2, align 4
+@arr = global <{ i32, [9 x i32] }> <{ i32 3, [9 x i32] zeroinitializer }>, align 4
+@p = global i32* bitcast (i8* getelementptr (i8, i8* bitcast (<{ i32, [9 x i32] }>* @arr to i8*), i64 16) to i32*), align 4
+
+define i32 @foo() {
+entry:
+  %call = call i32 @bar(i32 1)
+  %0 = load i32, i32* @globalA, align 4
+  %add = add nsw i32 %call, %0
+  %1 = load i32, i32* @globalB, align 4
+  %add1 = add nsw i32 %add, %1
+  ret i32 %add1
+}
+
+declare i32 @bar(i32)
+
+; OBJ:      File: {{.*}}aix-xcoff-reloc.ll.tmp.o
+; OBJ-NEXT: Format: aixcoff-rs6000
+; OBJ-NEXT: Arch: powerpc
+; OBJ-NEXT: AddressSize: 32bit
+; OBJ-NEXT: FileHeader {
+; OBJ-NEXT:   Magic: 0x1DF
+; OBJ-NEXT:   NumberOfSections: 2
+; OBJ-NEXT:   TimeStamp: None (0x0)
+; OBJ-NEXT:   SymbolTableOffset: 0x13C
+; OBJ-NEXT:   SymbolTableEntries: 26
+; OBJ-NEXT:   OptionalHeaderSize: 0x0
+; OBJ-NEXT:   Flags: 0x0
+; OBJ-NEXT: }
+; OBJ-NEXT: Sections [
+; OBJ-NEXT:   Section {
+; OBJ-NEXT:     Index: 1
+; OBJ-NEXT:     Name: .text
+; OBJ-NEXT:     PhysicalAddress: 0x0
+; OBJ-NEXT:     VirtualAddress: 0x0
+; OBJ-NEXT:     Size: 0x40
+; OBJ-NEXT:     RawDataOffset: 0x64
+; OBJ-NEXT:     RelocationPointer: 0xEC
+; OBJ-NEXT:     LineNumberPointer: 0x0
+; OBJ-NEXT:     NumberOfRelocations: 3
+; OBJ-NEXT:     NumberOfLineNumbers: 0
+; OBJ-NEXT:     Type: STYP_TEXT (0x20)
+; OBJ-NEXT:   }
+; OBJ-NEXT:   Section {
+; OBJ-NEXT:     Index: 2
+; OBJ-NEXT:     Name: .data
+; OBJ-NEXT:     PhysicalAddress: 0x40
+; OBJ-NEXT:     VirtualAddress: 0x40
+; OBJ-NEXT:     Size: 0x48
+; OBJ-NEXT:     RawDataOffset: 0xA4
+; OBJ-NEXT:     RelocationPointer: 0x10A
+; OBJ-NEXT:     LineNumberPointer: 0x0
+; OBJ-NEXT:     NumberOfRelocations: 5
+; OBJ-NEXT:     NumberOfLineNumbers: 0
+; OBJ-NEXT:     Type: STYP_DATA (0x40)
+; OBJ-NEXT:   }
+; OBJ-NEXT: ]
+
+
+; RELOC:      File: {{.*}}aix-xcoff-reloc.ll.tmp.o
+; RELOC-NEXT: Format: aixcoff-rs6000
+; RELOC-NEXT: Arch: powerpc
+; RELOC-NEXT: AddressSize: 32bit
+; RELOC-NEXT: Relocations [
+; RELOC-NEXT:   Section (index: 1) .text {
+; RELOC-NEXT:   Relocation {
+; RELOC-NEXT:     Virtual Address: 0x10
+; RELOC-NEXT:     Symbol: .bar (0)
+; RELOC-NEXT:     IsSigned: Yes
+; RELOC-NEXT:     FixupBitValue: 0
+; RELOC-NEXT:     Length: 26
+; RELOC-NEXT:     Type: R_RBR (0x1A)
+; RELOC-NEXT:   }
+; RELOC-NEXT:   Relocation {
+; RELOC-NEXT:     Virtual Address: 0x1A
+; RELOC-NEXT:     Symbol: globalA (22)
+; RELOC-NEXT:     IsSigned: No
+; RELOC-NEXT:     FixupBitValue: 0
+; RELOC-NEXT:     Length: 16
+; RELOC-NEXT:     Type: R_TOC (0x3)
+; RELOC-NEXT:   }
+; RELOC-NEXT:   Relocation {
+; RELOC-NEXT:     Virtual Address: 0x1E
+; RELOC-NEXT:     Symbol: globalB (24)
+; RELOC-NEXT:     IsSigned: No
+; RELOC-NEXT:     FixupBitValue: 0
+; RELOC-NEXT:     Length: 16
+; RELOC-NEXT:     Type: R_TOC (0x3)
+; RELOC-NEXT:   }
+; RELOC-NEXT: }
+; RELOC-NEXT: Section (index: 2) .data {
+; RELOC-NEXT: Relocation {
+; RELOC-NEXT:   Virtual Address: 0x70
+; RELOC-NEXT:   Symbol: arr (12)
+; RELOC-NEXT:   IsSigned: No
+; RELOC-NEXT:   FixupBitValue: 0
+; RELOC-NEXT:   Length: 32
+; RELOC-NEXT:   Type: R_POS (0x0)
+; RELOC-NEXT: }
+; RELOC-NEXT: Relocation {
+; RELOC-NEXT:   Virtual Address: 0x74
+; RELOC-NEXT:   Symbol: .foo (4)
+; RELOC-NEXT:   IsSigned: No
+; RELOC-NEXT:   FixupBitValue: 0
+; RELOC-NEXT:   Length: 32
+; RELOC-NEXT:   Type: R_POS (0x0)
+; RELOC-NEXT: }
+; RELOC-NEXT: Relocation {
+; RELOC-NEXT:   Virtual Address: 0x78
+; RELOC-NEXT:   Symbol: TOC (20)
+; RELOC-NEXT:   IsSigned: No
+; RELOC-NEXT:   FixupBitValue: 0
+; RELOC-NEXT:   Length: 32
+; RELOC-NEXT:   Type: R_POS (0x0)
+; RELOC-NEXT: }
+; RELOC-NEXT: Relocation {
+; RELOC-NEXT:   Virtual Address: 0x80
+; RELOC-NEXT:   Symbol: globalA (8)
+; RELOC-NEXT:   IsSigned: No
+; RELOC-NEXT:   FixupBitValue: 0
+; RELOC-NEXT:   Length: 32
+; RELOC-NEXT:   Type: R_POS (0x0)
+; RELOC-NEXT: }
+; RELOC-NEXT: Relocation {
+; RELOC-NEXT:   Virtual Address: 0x84
+; RELOC-NEXT:   Symbol: globalB (10)
+; RELOC-NEXT:   IsSigned: No
+; RELOC-NEXT:   FixupBitValue: 0
+; RELOC-NEXT:   Length: 32
+; RELOC-NEXT:   Type: R_POS (0x0)
+; RELOC-NEXT: }
+; RELOC-NEXT: }
+; RELOC-NEXT: ]
+
+; SYM:      Symbols [
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 0
+; SYM-NEXT:     Name: .bar
+; SYM-NEXT:     Value (RelocatableAddress): 0x0
+; SYM-NEXT:     Section: N_UNDEF
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 1
+; SYM-NEXT:       SectionLen: 0
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_ER (0x0)
+; SYM-NEXT:       StorageMappingClass: XMC_PR (0x0)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 2
+; SYM-NEXT:     Name: .text
+; SYM-NEXT:     Value (RelocatableAddress): 0x0
+; SYM-NEXT:     Section: .text
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 3
+; SYM-NEXT:       SectionLen: 64
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 4
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_PR (0x0)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 4
+; SYM-NEXT:     Name: .foo
+; SYM-NEXT:     Value (RelocatableAddress): 0x0
+; SYM-NEXT:     Section: .text
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 5
+; SYM-NEXT:       ContainingCsectSymbolIndex: 2
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_PR (0x0)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 6
+; SYM-NEXT:     Name: .data
+; SYM-NEXT:     Value (RelocatableAddress): 0x40
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 7
+; SYM-NEXT:       SectionLen: 52
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 2
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_RW (0x5)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 8
+; SYM-NEXT:     Name: globalA
+; SYM-NEXT:     Value (RelocatableAddress): 0x40
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 9
+; SYM-NEXT:       ContainingCsectSymbolIndex: 6
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_RW (0x5)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 10
+; SYM-NEXT:     Name: globalB
+; SYM-NEXT:     Value (RelocatableAddress): 0x44
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 11
+; SYM-NEXT:       ContainingCsectSymbolIndex: 6
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_RW (0x5)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 12
+; SYM-NEXT:     Name: arr
+; SYM-NEXT:     Value (RelocatableAddress): 0x48
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 13
+; SYM-NEXT:       ContainingCsectSymbolIndex: 6
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_RW (0x5)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 14
+; SYM-NEXT:     Name: p
+; SYM-NEXT:     Value (RelocatableAddress): 0x70
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 15
+; SYM-NEXT:       ContainingCsectSymbolIndex: 6
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_RW (0x5)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 16
+; SYM-NEXT:     Name: foo
+; SYM-NEXT:     Value (RelocatableAddress): 0x74
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 17
+; SYM-NEXT:       SectionLen: 12
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_DS (0xA)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 18
+; SYM-NEXT:     Name: foo
+; SYM-NEXT:     Value (RelocatableAddress): 0x74
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_EXT (0x2)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 19
+; SYM-NEXT:       ContainingCsectSymbolIndex: 16
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 0
+; SYM-NEXT:       SymbolType: XTY_LD (0x2)
+; SYM-NEXT:       StorageMappingClass: XMC_DS (0xA)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 20
+; SYM-NEXT:     Name: TOC
+; SYM-NEXT:     Value (RelocatableAddress): 0x80
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 21
+; SYM-NEXT:       SectionLen: 0
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 2
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_TC0 (0xF)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 22
+; SYM-NEXT:     Name: globalA
+; SYM-NEXT:     Value (RelocatableAddress): 0x80
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 23
+; SYM-NEXT:       SectionLen: 4
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 2
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT:   Symbol {
+; SYM-NEXT:     Index: 24
+; SYM-NEXT:     Name: globalB
+; SYM-NEXT:     Value (RelocatableAddress): 0x84
+; SYM-NEXT:     Section: .data
+; SYM-NEXT:     Type: 0x0
+; SYM-NEXT:     StorageClass: C_HIDEXT (0x6B)
+; SYM-NEXT:     NumberOfAuxEntries: 1
+; SYM-NEXT:     CSECT Auxiliary Entry {
+; SYM-NEXT:       Index: 25
+; SYM-NEXT:       SectionLen: 4
+; SYM-NEXT:       ParameterHashIndex: 0x0
+; SYM-NEXT:       TypeChkSectNum: 0x0
+; SYM-NEXT:       SymbolAlignmentLog2: 2
+; SYM-NEXT:       SymbolType: XTY_SD (0x1)
+; SYM-NEXT:       StorageMappingClass: XMC_TC (0x3)
+; SYM-NEXT:       StabInfoIndex: 0x0
+; SYM-NEXT:       StabSectNum: 0x0
+; SYM-NEXT:     }
+; SYM-NEXT:   }
+; SYM-NEXT: ]
+
+
+; DIS:      {{.*}}aix-xcoff-reloc.ll.tmp.o:   file format aixcoff-rs6000
+; DIS:      Disassembly of section .text:
+; DIS:      00000000 .text:
+; DIS-NEXT:        0: 7c 08 02 a6                   mflr 0
+; DIS-NEXT:        4: 90 01 00 08                   stw 0, 8(1)
+; DIS-NEXT:        8: 94 21 ff c0                   stwu 1, -64(1)
+; DIS-NEXT:        c: 38 60 00 01                   li 3, 1
+; DIS-NEXT:       10: 4b ff ff f1                   bl .-16
+; DIS-NEXT:       14: 60 00 00 00                   nop
+; DIS-NEXT:       18: 80 82 00 00                   lwz 4, 0(2)
+; DIS-NEXT:       1c: 80 a2 00 04                   lwz 5, 4(2)
+; DIS-NEXT:       20: 80 84 00 00                   lwz 4, 0(4)
+; DIS-NEXT:       24: 80 a5 00 00                   lwz 5, 0(5)
+; DIS-NEXT:       28: 7c 63 22 14                   add 3, 3, 4
+; DIS-NEXT:       2c: 7c 63 2a 14                   add 3, 3, 5
+; DIS-NEXT:       30: 38 21 00 40                   addi 1, 1, 64
+; DIS-NEXT:       34: 80 01 00 08                   lwz 0, 8(1)
+; DIS-NEXT:       38: 7c 08 03 a6                   mtlr 0
+; DIS-NEXT:       3c: 4e 80 00 20                   blr
+
+; DIS:      Disassembly of section .data:
+; DIS:      00000040 globalA:
+; DIS-NEXT:       40: 00 00 00 01                   <unknown>
+; DIS:      00000044 globalB:
+; DIS-NEXT:       44: 00 00 00 02                   <unknown>
+; DIS:      00000048 arr:
+; DIS-NEXT:       48: 00 00 00 03                   <unknown>
+; DIS-NEXT:                 ...
+; DIS:      00000070 p:
+; DIS-NEXT:       70: 00 00 00 58                   <unknown>
+; DIS:      00000074 foo:
+; DIS-NEXT:       74: 00 00 00 00                   <unknown>
+; DIS-NEXT:       78: 00 00 00 80                   <unknown>
+; DIS-NEXT:       7c: 00 00 00 00                   <unknown>
+; DIS:      00000080 globalA:
+; DIS-NEXT:       80: 00 00 00 40                   <unknown>
+; DIS:      00000084 globalB:
+; DIS-NEXT:       84: 00 00 00 44                   <unknown>