This is an archive of the discontinued LLVM Phabricator instance.

Differential D71616

[AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr
ClosedPublic

Authored by foad on Dec 17 2019, 9:20 AM.

Details

Reviewers
rampitec
arsenm
nhaehnle
dstuttard
Commits
rG0412f518dcb0: [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr
Summary

The typo has been present since memOpsHaveSameBasePtr was introduced in
r313208.

It caused SIInstrInfo::shouldClusterMemOps to cluster more mem ops than
it was supposed to.

Diff Detail

Unit TestsFailed

TimeTest
500 mslit.lit::Unknown Unit Message ("")

Event Timeline

foad created this revision.Dec 17 2019, 9:20 AM
Herald added a project: Restricted Project. · View Herald TranscriptDec 17 2019, 9:20 AM
Herald added subscribers: hiraditya, t-tye, tpr and 7 others. · View Herald Transcript
foad added reviewers: rampitec, arsenm, nhaehnle, dstuttard.Dec 17 2019, 9:23 AM

The change to wait.ll seems unfortunate, because the exp instructions are no longer consecutive at the end of the function (there is an s_waitcnt between them) but I think it was only working by accident before. All the other test case updates seem innocuous to me, at least the non-autogenerated ones.

rampitec accepted this revision.Dec 17 2019, 9:29 AM

LGTM

This revision is now accepted and ready to land.Dec 17 2019, 9:29 AM
merge_guards_bot added a subscriber: merge_guards_bot.Dec 17 2019, 9:51 AM

Unit tests: fail. 60979 tests passed, 1 failed and 727 were skipped.

failed: lit.lit/shtest-format.py

clang-tidy: unknown.

clang-format: unknown.

Build artifacts: diff.json, CMakeCache.txt, console-log.txt, test-results.xml

Harbormaster failed remote builds in B42668: Diff 234324!Dec 17 2019, 9:55 AM
Closed by commit rG0412f518dcb0: [AMDGPU] Fix typo in SIInstrInfo::memOpsHaveSameBasePtr (authored by foad). · Explain WhyDec 17 2019, 10:55 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
2 lines
test/
CodeGen/
AMDGPU/
4 lines
2 lines
2 lines
2 lines
2 lines
929 lines
658 lines
912 lines
1841 lines
2438 lines
27 lines
27 lines
4 lines
123 lines
4 lines
2 lines
2 lines
4 lines
40 lines
8 lines
178 lines
2 lines

Diff 234324

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Show First 20 Lines • Show All 417 Lines • ▼ Show 20 Linesstatic bool memOpsHaveSameBasePtr(const MachineInstr &MI1,
auto Base1 = MO1->getValue(); auto Base1 = MO1->getValue();
auto Base2 = MO2->getValue(); auto Base2 = MO2->getValue();
if (!Base1 || !Base2) if (!Base1 || !Base2)
return false; return false;
const MachineFunction &MF = *MI1.getParent()->getParent(); const MachineFunction &MF = *MI1.getParent()->getParent();
const DataLayout &DL = MF.getFunction().getParent()->getDataLayout(); const DataLayout &DL = MF.getFunction().getParent()->getDataLayout();
Base1 = GetUnderlyingObject(Base1, DL); Base1 = GetUnderlyingObject(Base1, DL);
Base2 = GetUnderlyingObject(Base1, DL); Base2 = GetUnderlyingObject(Base2, DL);
if (isa<UndefValue>(Base1) || isa<UndefValue>(Base2)) if (isa<UndefValue>(Base1) || isa<UndefValue>(Base2))
return false; return false;
return Base1 == Base2; return Base1 == Base2;
} }
bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1, bool SIInstrInfo::shouldClusterMemOps(const MachineOperand &BaseOp1,
▲ Show 20 Lines • Show All 6,193 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/add.i16.ll

Show First 20 Lines • Show All 99 Lines • ▼ Show 20 Linesdefine amdgpu_kernel void @v_test_add_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
store i64 %ext, i64 addrspace(1)* %out store i64 %ext, i64 addrspace(1)* %out
ret void ret void
} }
; FIXME: Need to handle non-uniform case for function below (load without gep). ; FIXME: Need to handle non-uniform case for function below (load without gep).
; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32: ; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i32:
; VI: flat_load_ushort [[A:v[0-9]+]] ; VI: flat_load_ushort [[A:v[0-9]+]]
; VI: flat_load_ushort [[B:v[0-9]+]] ; VI: flat_load_ushort [[B:v[0-9]+]]
; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16 ; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16
; VI-NEXT: buffer_store_dword [[SEXT]] ; VI-NEXT: buffer_store_dword [[SEXT]]
define amdgpu_kernel void @v_test_add_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { define amdgpu_kernel void @v_test_add_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
%a = load i16, i16 addrspace(1)* %gep.in0 %a = load i16, i16 addrspace(1)* %gep.in0
%b = load i16, i16 addrspace(1)* %gep.in1 %b = load i16, i16 addrspace(1)* %gep.in1
%add = add i16 %a, %b %add = add i16 %a, %b
%ext = sext i16 %add to i32 %ext = sext i16 %add to i32
store i32 %ext, i32 addrspace(1)* %out store i32 %ext, i32 addrspace(1)* %out
ret void ret void
} }
; FIXME: Need to handle non-uniform case for function below (load without gep). ; FIXME: Need to handle non-uniform case for function below (load without gep).
; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64: ; GCN-LABEL: {{^}}v_test_add_i16_sext_to_i64:
; VI: flat_load_ushort [[A:v[0-9]+]] ; VI: flat_load_ushort [[A:v[0-9]+]]
; VI: flat_load_ushort [[B:v[0-9]+]] ; VI: flat_load_ushort [[B:v[0-9]+]]
; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] ; VI: v_add_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16 ; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16
; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]] ; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} ; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
define amdgpu_kernel void @v_test_add_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { define amdgpu_kernel void @v_test_add_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
Show All 12 Lines

llvm/test/CodeGen/AMDGPU/ctpop.ll

Show First 20 Lines • Show All 278 Lines • ▼ Show 20 Lines
} }
; FUNC-LABEL: {{^}}v_ctpop_i32_add_vvar_inv: ; FUNC-LABEL: {{^}}v_ctpop_i32_add_vvar_inv:
; SI: buffer_load_dword [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 ; SI: buffer_load_dword [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64
; SI: buffer_load_dword [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 ; SI: buffer_load_dword [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64
; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]] ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]]
; VI: flat_load_dword [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}] ; VI: flat_load_dword [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}]
; VI: flat_load_dword [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}] ; VI: flat_load_dword [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}]
; VI: v_bcnt_u32_b32 [[RESULT:v[0-9]+]], [[VAL]], [[VAR]] ; VI: v_bcnt_u32_b32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]]
; GCN: buffer_store_dword [[RESULT]], ; GCN: buffer_store_dword [[RESULT]],
; GCN: s_endpgm ; GCN: s_endpgm
; EG: BCNT_INT ; EG: BCNT_INT
define amdgpu_kernel void @v_ctpop_i32_add_vvar_inv(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 addrspace(1)* noalias %constptr) nounwind { define amdgpu_kernel void @v_ctpop_i32_add_vvar_inv(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 addrspace(1)* noalias %constptr) nounwind {
%tid = call i32 @llvm.r600.read.tidig.x() %tid = call i32 @llvm.r600.read.tidig.x()
%in.gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %in.gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%val = load i32, i32 addrspace(1)* %in.gep, align 4 %val = load i32, i32 addrspace(1)* %in.gep, align 4
Show All 35 Lines

llvm/test/CodeGen/AMDGPU/ctpop16.ll

Show First 20 Lines • Show All 279 Lines • ▼ Show 20 Lines
} }
; FUNC-LABEL: {{^}}v_ctpop_i16_add_vvar_inv: ; FUNC-LABEL: {{^}}v_ctpop_i16_add_vvar_inv:
; SI: buffer_load_ushort [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 ; SI: buffer_load_ushort [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64
; SI: buffer_load_ushort [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 ; SI: buffer_load_ushort [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64
; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]] ; SI: v_bcnt_u32_b32_e32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]]
; VI: flat_load_ushort [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}] ; VI: flat_load_ushort [[VAR:v[0-9]+]], v[{{[0-9]+:[0-9]+}}]
; VI: flat_load_ushort [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}] ; VI: flat_load_ushort [[VAL:v[0-9]+]], v[{{[0-9]+:[0-9]+}}]
; VI: v_bcnt_u32_b32 [[RESULT:v[0-9]+]], [[VAL]], [[VAR]] ; VI: v_bcnt_u32_b32 [[RESULT:v[0-9]+]], [[VAR]], [[VAL]]
; GCN: buffer_store_short [[RESULT]], ; GCN: buffer_store_short [[RESULT]],
; GCN: s_endpgm ; GCN: s_endpgm
; EG: BCNT_INT ; EG: BCNT_INT
define amdgpu_kernel void @v_ctpop_i16_add_vvar_inv(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %in, i16 addrspace(1)* noalias %constptr) nounwind { define amdgpu_kernel void @v_ctpop_i16_add_vvar_inv(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %in, i16 addrspace(1)* noalias %constptr) nounwind {
%tid = call i32 @llvm.r600.read.tidig.x() %tid = call i32 @llvm.r600.read.tidig.x()
%in.gep = getelementptr i16, i16 addrspace(1)* %in, i32 %tid %in.gep = getelementptr i16, i16 addrspace(1)* %in, i32 %tid
%val = load i16, i16 addrspace(1)* %in.gep, align 4 %val = load i16, i16 addrspace(1)* %in.gep, align 4
Show All 40 Lines

llvm/test/CodeGen/AMDGPU/fadd.f16.ll

Show First 20 Lines • Show All 56 Lines • ▼ Show 20 Linesentry:
%r.val = fadd half %a.val, 2.0 %r.val = fadd half %a.val, 2.0
store half %r.val, half addrspace(1)* %r store half %r.val, half addrspace(1)* %r
ret void ret void
} }
; GCN-LABEL: {{^}}fadd_v2f16: ; GCN-LABEL: {{^}}fadd_v2f16:
; SI: buffer_load_dword v[[A_V2_F16:[0-9]+]] ; SI: buffer_load_dword v[[A_V2_F16:[0-9]+]]
; SI: buffer_load_dword v[[B_V2_F16:[0-9]+]] ; SI: buffer_load_dword v[[B_V2_F16:[0-9]+]]
; VI: flat_load_dword v[[B_V2_F16:[0-9]+]]
; VI: flat_load_dword v[[A_V2_F16:[0-9]+]] ; VI: flat_load_dword v[[A_V2_F16:[0-9]+]]
; VI: flat_load_dword v[[B_V2_F16:[0-9]+]]
; SI-DAG: v_cvt_f32_f16_e32 v[[A_F32_0:[0-9]+]], v[[A_V2_F16]] ; SI-DAG: v_cvt_f32_f16_e32 v[[A_F32_0:[0-9]+]], v[[A_V2_F16]]
; SI-DAG: v_lshrrev_b32_e32 v[[A_F16_1:[0-9]+]], 16, v[[A_V2_F16]] ; SI-DAG: v_lshrrev_b32_e32 v[[A_F16_1:[0-9]+]], 16, v[[A_V2_F16]]
; SI-DAG: v_cvt_f32_f16_e32 v[[B_F32_0:[0-9]+]], v[[B_V2_F16]] ; SI-DAG: v_cvt_f32_f16_e32 v[[B_F32_0:[0-9]+]], v[[B_V2_F16]]
; SI-DAG: v_lshrrev_b32_e32 v[[B_F16_1:[0-9]+]], 16, v[[B_V2_F16]] ; SI-DAG: v_lshrrev_b32_e32 v[[B_F16_1:[0-9]+]], 16, v[[B_V2_F16]]
; SI-DAG: v_cvt_f32_f16_e32 v[[A_F32_1:[0-9]+]], v[[A_F16_1]] ; SI-DAG: v_cvt_f32_f16_e32 v[[A_F32_1:[0-9]+]], v[[A_F16_1]]
; SI-DAG: v_cvt_f32_f16_e32 v[[B_F32_1:[0-9]+]], v[[B_F16_1]] ; SI-DAG: v_cvt_f32_f16_e32 v[[B_F32_1:[0-9]+]], v[[B_F16_1]]
▲ Show 20 Lines • Show All 94 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/global_smrd.ll

Show First 20 Lines • Show All 77 Lines • ▼ Show 20 Linesdefine amdgpu_kernel void @memdep(i32 addrspace(1)* %in, [8 x i32], i32 addrspace(1)* %out0, [8 x i32], i32 addrspace(1)* %out1) {
ret void ret void
} }
; uniform load from global array ; uniform load from global array
; CHECK-LABEL: @global_array ; CHECK-LABEL: @global_array
; CHECK: s_getpc_b64 [[GET_PC:s\[[0-9]+:[0-9]+\]]] ; CHECK: s_getpc_b64 [[GET_PC:s\[[0-9]+:[0-9]+\]]]
; CHECK: s_load_dwordx2 [[A_ADDR:s\[[0-9]+:[0-9]+\]]], [[GET_PC]], 0x0 ; CHECK: s_load_dwordx2 [[A_ADDR:s\[[0-9]+:[0-9]+\]]], [[GET_PC]], 0x0
; CHECK: s_load_dwordx2 [[A_ADDR1:s\[[0-9]+:[0-9]+\]]], [[A_ADDR]], 0x0 ; CHECK: s_load_dwordx2 [[A_ADDR1:s\[[0-9]+:[0-9]+\]]], [[A_ADDR]], 0x0
; CHECK: s_load_dword [[SVAL:s[0-9]+]], [[A_ADDR1]], 0x0
; CHECK: s_load_dwordx2 [[OUT:s\[[0-9]+:[0-9]+\]]], s[4:5], 0x0 ; CHECK: s_load_dwordx2 [[OUT:s\[[0-9]+:[0-9]+\]]], s[4:5], 0x0
; CHECK: s_load_dword [[SVAL:s[0-9]+]], [[A_ADDR1]], 0x0
; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]] ; CHECK: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]]
; CHECK: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[VVAL]] ; CHECK: flat_store_dword v[{{[0-9]+:[0-9]+}}], [[VVAL]]
@A = common local_unnamed_addr addrspace(1) global i32 addrspace(1)* null, align 4 @A = common local_unnamed_addr addrspace(1) global i32 addrspace(1)* null, align 4
define amdgpu_kernel void @global_array(i32 addrspace(1)* nocapture %out) { define amdgpu_kernel void @global_array(i32 addrspace(1)* nocapture %out) {
entry: entry:
%load0 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @A, align 4 %load0 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* @A, align 4
%load1 = load i32, i32 addrspace(1)* %load0, align 4 %load1 = load i32, i32 addrspace(1)* %load0, align 4
Show All 32 Lines

llvm/test/CodeGen/AMDGPU/idot2.ll

Show All 14 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s9, s5, 16 ; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v0, v1
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2: ; GFX8-LABEL: udot2:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot2: ; GFX9-DL-LABEL: udot2:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot2: ; GFX10-DL-LABEL: udot2:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 25 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: s_lshr_b32 s9, s5, 16
; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: v_mul_u32_u24_e32 v0, s5, v0 ; GFX7-NEXT: v_mul_u32_u24_e32 v0, s5, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s7 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, s6, v0 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_add_i32_e32 v0, vcc, s4, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_MulMul: ; GFX8-LABEL: udot2_MulMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
▲ Show 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s6, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: s_lshr_b32 s3, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 16
; GFX10-DL-NEXT: v_mul_u32_u24_e64 v0, s2, s6
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s4, s3, v0
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s2
; GFX10-DL-NEXT: s_and_b32 s1, s4, s2
; GFX10-DL-NEXT: s_lshr_b32 s2, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 16
; GFX10-DL-NEXT: v_mul_u32_u24_e64 v2, s1, s0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, s5, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2: ; GFX8-LABEL: idot2:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_ashr_i32 s2, s2, 16 ; GFX8-NEXT: s_ashr_i32 s2, s2, 16
; GFX8-NEXT: s_sext_i32_i16 s1, s3 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
; GFX8-NEXT: s_ashr_i32 s3, s3, 16 ; GFX8-NEXT: s_ashr_i32 s3, s3, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2: ; GFX9-NODL-LABEL: idot2:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-NODL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2: ; GFX9-DL-LABEL: idot2:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot2_i32_i16 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot2_i32_i16 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2: ; GFX10-DL-LABEL: idot2:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot2_i32_i16 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot2_i32_i16 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2_MixedTypedMul: ; GFX8-LABEL: idot2_MixedTypedMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_lshr_b32 s2, s2, 16 ; GFX8-NEXT: s_lshr_b32 s2, s2, 16
; GFX8-NEXT: s_sext_i32_i16 s1, s3 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
; GFX8-NEXT: s_lshr_b32 s3, s3, 16 ; GFX8-NEXT: s_lshr_b32 s3, s3, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mad_u32_u24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2_MixedTypedMul: ; GFX9-NODL-LABEL: idot2_MixedTypedMul:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 16 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 16
; GFX9-NODL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 16 ; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2_MixedTypedMul: ; GFX9-DL-LABEL: idot2_MixedTypedMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 16 ; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 16
; GFX9-DL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-DL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 16 ; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s3, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2_MixedTypedMul: ; GFX10-DL-LABEL: idot2_MixedTypedMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s2, 16 ; GFX10-DL-NEXT: s_lshr_b32 s5, s2, 16
; GFX10-DL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX10-DL-NEXT: s_lshr_b32 s6, s3, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2 ; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2
; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3 ; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s9, s5, 16 ; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v0, v1
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_alt_AddOperands: ; GFX8-LABEL: udot2_alt_AddOperands:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot2_alt_AddOperands: ; GFX9-DL-LABEL: udot2_alt_AddOperands:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot2_alt_AddOperands: ; GFX10-DL-LABEL: udot2_alt_AddOperands:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2_MixedExt: ; GFX8-LABEL: idot2_MixedExt:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_ashr_i32 s2, s2, 16 ; GFX8-NEXT: s_ashr_i32 s2, s2, 16
; GFX8-NEXT: s_and_b32 s1, s3, 0xffff ; GFX8-NEXT: s_and_b32 s6, s3, 0xffff
; GFX8-NEXT: s_ashr_i32 s3, s3, 16 ; GFX8-NEXT: s_ashr_i32 s3, s3, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2_MixedExt: ; GFX9-NODL-LABEL: idot2_MixedExt:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-NODL-NEXT: s_and_b32 s1, s3, 0xffff ; GFX9-NODL-NEXT: s_and_b32 s6, s3, 0xffff
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2_MixedExt: ; GFX9-DL-LABEL: idot2_MixedExt:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-DL-NEXT: s_and_b32 s1, s3, 0xffff ; GFX9-DL-NEXT: s_and_b32 s6, s3, 0xffff
; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2_MixedExt: ; GFX10-DL-LABEL: idot2_MixedExt:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 16 ; GFX10-DL-NEXT: s_ashr_i32 s5, s2, 16
; GFX10-DL-NEXT: s_ashr_i32 s1, s3, 16 ; GFX10-DL-NEXT: s_ashr_i32 s6, s3, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2 ; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2
; GFX10-DL-NEXT: s_and_b32 s3, s3, 0xffff ; GFX10-DL-NEXT: s_and_b32 s3, s3, 0xffff
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 19 Lines
define amdgpu_kernel void @notudot2_SameVec(<2 x i16> addrspace(1)* %src1, define amdgpu_kernel void @notudot2_SameVec(<2 x i16> addrspace(1)* %src1,
; GFX7-LABEL: notudot2_SameVec: ; GFX7-LABEL: notudot2_SameVec:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s7, s[0:1], 0x0
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s5, s6, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: s_and_b32 s4, s4, 0xffff ; GFX7-NEXT: s_and_b32 s4, s4, 0xffff
; GFX7-NEXT: s_lshr_b32 s5, s5, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s5, s5, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, s5, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s4, s4, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, s4, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: notudot2_SameVec: ; GFX8-LABEL: notudot2_SameVec:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 0xffff ; GFX8-NEXT: s_lshr_b32 s0, s2, 16
; GFX8-NEXT: s_lshr_b32 s1, s3, 16 ; GFX8-NEXT: v_mov_b32_e32 v2, s3
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: s_and_b32 s1, s4, 0xffff
; GFX8-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s0, s0, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, s0, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: notudot2_SameVec: ; GFX9-NODL-LABEL: notudot2_SameVec:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_and_b32 s0, s2, 0xffff ; GFX9-NODL-NEXT: s_lshr_b32 s0, s2, 16
; GFX9-NODL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s3
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: s_and_b32 s1, s4, 0xffff
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, s0, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, s0, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: notudot2_SameVec: ; GFX9-DL-LABEL: notudot2_SameVec:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 0xffff ; GFX9-DL-NEXT: s_lshr_b32 s0, s2, 16
; GFX9-DL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s3
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: s_and_b32 s1, s4, 0xffff
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, s0, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, s0, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, s1, v2
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: notudot2_SameVec: ; GFX10-DL-LABEL: notudot2_SameVec:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 16
; GFX10-DL-NEXT: s_and_b32 s3, s3, 0xffff
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s2, s2, s4
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 0xffff
; GFX10-DL-NEXT: s_lshr_b32 s1, s3, 16
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s1, s4
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s0, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8 ; GFX7-NEXT: s_and_b32 s6, s4, s8
; GFX7-NEXT: s_and_b32 s7, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: s_lshr_b32 s4, s4, 16 ; GFX7-NEXT: s_lshr_b32 s4, s4, 16
; GFX7-NEXT: s_and_b32 s8, s5, s8
; GFX7-NEXT: s_lshr_b32 s5, s5, 16 ; GFX7-NEXT: s_lshr_b32 s5, s5, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s7 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_v4i16: ; GFX8-LABEL: udot2_v4i16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot2_v4i16: ; GFX9-DL-LABEL: udot2_v4i16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot2_v4i16: ; GFX10-DL-LABEL: udot2_v4i16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i16> addrspace(1)* %src2, <4 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1 %vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1
%vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2 %vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x1 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x1
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x1 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x1
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8 ; GFX7-NEXT: s_and_b32 s6, s4, s8
; GFX7-NEXT: s_and_b32 s7, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: s_lshr_b32 s4, s4, 16 ; GFX7-NEXT: s_lshr_b32 s4, s4, 16
; GFX7-NEXT: s_and_b32 s8, s5, s8
; GFX7-NEXT: s_lshr_b32 s5, s5, 16 ; GFX7-NEXT: s_lshr_b32 s5, s5, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s7 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_v4i16_Hi: ; GFX8-LABEL: udot2_v4i16_Hi:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot2_v4i16_Hi: ; GFX9-DL-LABEL: udot2_v4i16_Hi:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x4 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x4
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x4 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x4
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot2_v4i16_Hi: ; GFX10-DL-LABEL: udot2_v4i16_Hi:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x4 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x4 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x4
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x4
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot2_u32_u16 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i16> addrspace(1)* %src2, <4 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1 %vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1
%vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2 %vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0
; GFX7-NEXT: s_load_dword s9, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: s_and_b32 s6, s6, s8
; GFX7-NEXT: s_and_b32 s7, s7, s8 ; GFX7-NEXT: s_and_b32 s7, s7, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: v_mov_b32_e32 v1, s9 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: s_and_b32 s6, s6, s8
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: notudot2_v4i16_Even: ; GFX8-LABEL: notudot2_v4i16_Even:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s8, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s8, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s8 ; GFX10-DL-NEXT: s_and_b32 s3, s3, s8
; GFX10-DL-NEXT: s_and_b32 s1, s5, s8 ; GFX10-DL-NEXT: s_and_b32 s5, s5, s8
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s6 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX10-DL-NEXT: s_and_b32 s2, s2, s8 ; GFX10-DL-NEXT: s_and_b32 s2, s2, s8
; GFX10-DL-NEXT: s_and_b32 s3, s4, s8 ; GFX10-DL-NEXT: s_and_b32 s4, s4, s8
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s5, s3, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s4, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i16> addrspace(1)* %src2, <4 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1 %vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1
%vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2 %vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[6:7], s[6:7], 0x0
; GFX7-NEXT: s_load_dword s9, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_lshr_b32 s4, s4, 16
; GFX7-NEXT: s_and_b32 s7, s7, s8 ; GFX7-NEXT: s_and_b32 s7, s7, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: s_lshr_b32 s4, s4, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: s_lshr_b32 s6, s6, 16 ; GFX7-NEXT: s_lshr_b32 s6, s6, 16
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: notudot2_v4i16_Middle: ; GFX8-LABEL: notudot2_v4i16_Middle:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s8, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s8, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s8 ; GFX10-DL-NEXT: s_and_b32 s3, s3, s8
; GFX10-DL-NEXT: s_and_b32 s1, s5, s8 ; GFX10-DL-NEXT: s_and_b32 s5, s5, s8
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s6 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 16 ; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 16
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 16 ; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 16
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s5, s3, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s4, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i16> addrspace(1)* %src2, <4 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1 %vec1 = load <4 x i16>, <4 x i16> addrspace(1)* %src1
%vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2 %vec2 = load <4 x i16>, <4 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s9, s5, 16 ; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: v_mov_b32_e32 v0, s7 ; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: notudot2_DiffIndex: ; GFX8-LABEL: notudot2_DiffIndex:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
▲ Show 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 16 ; GFX10-DL-NEXT: s_lshr_b32 s6, s3, 16
; GFX10-DL-NEXT: s_and_b32 s1, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s7, s4, s2
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_and_b32 s2, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s3, s2
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 16 ; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 16
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s7, s6, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 22 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s9, s5, 16 ; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v0, v1
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v1, s5, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v1, s5, v1, v0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_MultipleUses_add1: ; GFX8-LABEL: udot2_MultipleUses_add1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 16 ; GFX10-DL-NEXT: s_lshr_b32 s6, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s1, s4, 16 ; GFX10-DL-NEXT: s_lshr_b32 s7, s4, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_and_b32 s3, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s3, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s7, s6, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s2, s3, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s2, s3, v0
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v1, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2_MultipleUses_add1: ; GFX8-LABEL: idot2_MultipleUses_add1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_ashr_i32 s2, s2, 16 ; GFX8-NEXT: s_ashr_i32 s2, s2, 16
; GFX8-NEXT: s_sext_i32_i16 s1, s3 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
; GFX8-NEXT: s_ashr_i32 s3, s3, 16 ; GFX8-NEXT: s_ashr_i32 s3, s3, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v3, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v1, s6, v2, v0
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v3 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2_MultipleUses_add1: ; GFX9-NODL-LABEL: idot2_MultipleUses_add1:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-NODL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v3, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v1, s6, v2, v0
; GFX9-NODL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-NODL-NEXT: v_add_u32_e32 v2, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2_MultipleUses_add1: ; GFX9-DL-LABEL: idot2_MultipleUses_add1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-DL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-DL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v3, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v1, s6, v2, v0
; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2_MultipleUses_add1: ; GFX10-DL-LABEL: idot2_MultipleUses_add1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 16 ; GFX10-DL-NEXT: s_ashr_i32 s5, s2, 16
; GFX10-DL-NEXT: s_ashr_i32 s1, s3, 16 ; GFX10-DL-NEXT: s_ashr_i32 s6, s3, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2 ; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2
; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3 ; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s3, s2, v0
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v1, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 24 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: s_lshr_b32 s9, s5, 16
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v1, s5, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s5, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s7 ; GFX7-NEXT: v_mad_u32_u24 v1, s7, v2, v1
; GFX7-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_MultipleUses_mul1: ; GFX8-LABEL: udot2_MultipleUses_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s6, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_lshr_b32 s3, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 16
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s2, s6, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s4, s3, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s6, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s2
; GFX10-DL-NEXT: s_and_b32 s1, s4, s2
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX10-DL-NEXT: s_lshr_b32 s2, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 16
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2_MultipleUses_mul1: ; GFX8-LABEL: idot2_MultipleUses_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_sext_i32_i16 s1, s3 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
; GFX8-NEXT: s_ashr_i32 s2, s2, 16 ; GFX8-NEXT: s_ashr_i32 s2, s2, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_ashr_i32 s3, s3, 16 ; GFX8-NEXT: s_ashr_i32 s3, s3, 16
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_mov_b32_e32 v4, s2 ; GFX8-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v2, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2_MultipleUses_mul1: ; GFX9-NODL-LABEL: idot2_MultipleUses_mul1:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v4, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v2, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s6, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2_MultipleUses_mul1: ; GFX9-DL-LABEL: idot2_MultipleUses_mul1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-DL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-DL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s3, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s3, v2, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2_MultipleUses_mul1: ; GFX10-DL-LABEL: idot2_MultipleUses_mul1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX10-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX10-DL-NEXT: s_sext_i32_i16 s1, s3 ; GFX10-DL-NEXT: s_sext_i32_i16 s6, s3
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX10-DL-NEXT: s_ashr_i32 s2, s2, 16
; GFX10-DL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX10-DL-NEXT: s_ashr_i32 s3, s3, 16
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s3, s2, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s6, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
Show All 25 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 16 ; GFX7-NEXT: s_lshr_b32 s6, s4, 16
; GFX7-NEXT: s_lshr_b32 s9, s5, 16 ; GFX7-NEXT: s_lshr_b32 s7, s5, 16
; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v1, s9, v0, v1
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v0, v1
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v1, s7, v0, v1
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_MultipleUses_mul2: ; GFX8-LABEL: udot2_MultipleUses_mul2:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 16 ; GFX10-DL-NEXT: s_lshr_b32 s6, s3, 16
; GFX10-DL-NEXT: s_lshr_b32 s1, s4, 16 ; GFX10-DL-NEXT: s_lshr_b32 s7, s4, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_and_b32 s3, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s3, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s7, s6, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s7, s6, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; GFX8-LABEL: idot2_MultipleUses_mul2: ; GFX8-LABEL: idot2_MultipleUses_mul2:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i16 s0, s2 ; GFX8-NEXT: s_sext_i32_i16 s5, s2
; GFX8-NEXT: s_ashr_i32 s2, s2, 16 ; GFX8-NEXT: s_ashr_i32 s2, s2, 16
; GFX8-NEXT: s_sext_i32_i16 s1, s3 ; GFX8-NEXT: s_sext_i32_i16 s6, s3
; GFX8-NEXT: s_ashr_i32 s3, s3, 16 ; GFX8-NEXT: s_ashr_i32 s3, s3, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v2, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot2_MultipleUses_mul2: ; GFX9-NODL-LABEL: idot2_MultipleUses_mul2:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-NODL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot2_MultipleUses_mul2: ; GFX9-DL-LABEL: idot2_MultipleUses_mul2:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i16 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i16 s5, s2
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 16
; GFX9-DL-NEXT: s_sext_i32_i16 s1, s3 ; GFX9-DL-NEXT: s_sext_i32_i16 s6, s3
; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16 ; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s3, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v2, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot2_MultipleUses_mul2: ; GFX10-DL-LABEL: idot2_MultipleUses_mul2:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 16 ; GFX10-DL-NEXT: s_ashr_i32 s5, s2, 16
; GFX10-DL-NEXT: s_ashr_i32 s1, s3, 16 ; GFX10-DL-NEXT: s_ashr_i32 s6, s3, 16
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2 ; GFX10-DL-NEXT: s_sext_i32_i16 s2, s2
; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3 ; GFX10-DL-NEXT: s_sext_i32_i16 s3, s3
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s3, s2, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<2 x i16> addrspace(1)* %src2, <2 x i16> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1 %vec1 = load <2 x i16>, <2 x i16> addrspace(1)* %src1
%vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2 %vec2 = load <2 x i16>, <2 x i16> addrspace(1)* %src2
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot2_acc16: ; GFX8-LABEL: udot2_acc16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s3, s1, s2 ; GFX8-NEXT: s_and_b32 s3, s1, s0
; GFX8-NEXT: s_lshr_b32 s1, s1, 16 ; GFX8-NEXT: s_lshr_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s2, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s2, s0
; GFX8-NEXT: s_lshr_b32 s0, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s2, 16
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot2_acc16: ; GFX9-NODL-LABEL: udot2_acc16:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_mov_b32 s2, 0xffff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX9-NODL-NEXT: s_mov_b32 s0, 0xffff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s2 ; GFX9-NODL-NEXT: s_and_b32 s3, s1, s0
; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 16 ; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 16
; GFX9-NODL-NEXT: s_and_b32 s2, s0, s2 ; GFX9-NODL-NEXT: s_and_b32 s0, s2, s0
; GFX9-NODL-NEXT: s_lshr_b32 s0, s0, 16 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot2_acc16: ; GFX9-DL-LABEL: udot2_acc16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_dot2_u32_u16 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot2_acc16: ; GFX10-DL-LABEL: udot2_acc16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: flat_load_ushort v2, v[2:3] ; GFX8-NEXT: flat_load_ushort v2, v[2:3]
; GFX8-NEXT: flat_load_ushort v3, v[0:1] ; GFX8-NEXT: flat_load_ushort v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt vmcnt(1) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(1) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b16_e32 v4, 8, v2 ; GFX8-NEXT: v_bfe_i32 v1, v2, 0, 8
; GFX8-NEXT: v_lshrrev_b16_e32 v2, 8, v2
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_bfe_i32 v5, v3, 0, 8 ; GFX8-NEXT: v_bfe_i32 v3, v0, 0, 8
; GFX8-NEXT: v_lshrrev_b16_e32 v3, 8, v3 ; GFX8-NEXT: v_lshrrev_b16_e32 v0, 8, v0
; GFX8-NEXT: v_bfe_i32 v4, v4, 0, 8
; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 8
; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 8
; GFX8-NEXT: v_mad_i32_i24 v3, v3, v4, s2 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX8-NEXT: v_mad_i32_i24 v2, v5, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v0, v0, v2, s2
; GFX8-NEXT: v_mad_i32_i24 v2, v3, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: notsdot2_sext8: ; GFX9-NODL-LABEL: notsdot2_sext8:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NODL-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-NODL-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-NODL-NEXT: global_load_ushort v3, v[0:1], off ; GFX9-NODL-NEXT: global_load_ushort v0, v[0:1], off
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt vmcnt(1) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(1)
; GFX9-NODL-NEXT: v_lshrrev_b16_e32 v4, 8, v2 ; GFX9-NODL-NEXT: v_bfe_i32 v1, v2, 0, 8
; GFX9-NODL-NEXT: v_lshrrev_b16_e32 v2, 8, v2
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_bfe_i32 v5, v3, 0, 8 ; GFX9-NODL-NEXT: v_bfe_i32 v3, v0, 0, 8
; GFX9-NODL-NEXT: v_lshrrev_b16_e32 v3, 8, v3 ; GFX9-NODL-NEXT: v_lshrrev_b16_e32 v0, 8, v0
; GFX9-NODL-NEXT: v_bfe_i32 v4, v4, 0, 8
; GFX9-NODL-NEXT: v_bfe_i32 v3, v3, 0, 8
; GFX9-NODL-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX9-NODL-NEXT: v_bfe_i32 v2, v2, 0, 8
; GFX9-NODL-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: v_mad_i32_i24 v3, v3, v4, s2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, v0, v2, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, v5, v2, v3 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, v3, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: notsdot2_sext8: ; GFX9-DL-LABEL: notsdot2_sext8:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5
; GFX9-DL-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-DL-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-DL-NEXT: global_load_ushort v3, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v0, v[0:1], off
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt vmcnt(1) ; GFX9-DL-NEXT: s_waitcnt vmcnt(1)
; GFX9-DL-NEXT: v_lshrrev_b16_e32 v4, 8, v2 ; GFX9-DL-NEXT: v_bfe_i32 v1, v2, 0, 8
; GFX9-DL-NEXT: v_lshrrev_b16_e32 v2, 8, v2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_bfe_i32 v5, v3, 0, 8 ; GFX9-DL-NEXT: v_bfe_i32 v3, v0, 0, 8
; GFX9-DL-NEXT: v_lshrrev_b16_e32 v3, 8, v3 ; GFX9-DL-NEXT: v_lshrrev_b16_e32 v0, 8, v0
; GFX9-DL-NEXT: v_bfe_i32 v4, v4, 0, 8
; GFX9-DL-NEXT: v_bfe_i32 v3, v3, 0, 8
; GFX9-DL-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX9-DL-NEXT: v_bfe_i32 v2, v2, 0, 8
; GFX9-DL-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mad_i32_i24 v3, v3, v4, s2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, v0, v2, s2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, v5, v2, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, v3, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: notsdot2_sext8: ; GFX10-DL-LABEL: notsdot2_sext8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
▲ Show 20 Lines • Show All 47 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/idot4s.ll

Show All 10 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_sext_i32_i8 s7, s4 ; GFX7-NEXT: s_sext_i32_i8 s6, s4
; GFX7-NEXT: s_sext_i32_i8 s8, s5 ; GFX7-NEXT: s_sext_i32_i8 s7, s5
; GFX7-NEXT: s_bfe_i32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_i32 s9, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v0, s8 ; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_i32 s12, s5, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s7, v0, v1
; GFX7-NEXT: s_bfe_i32 s9, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: s_bfe_i32 s11, s4, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s12 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: s_bfe_i32 s11, s5, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s6, v0, v1
; GFX7-NEXT: s_bfe_i32 s8, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: s_bfe_i32 s10, s4, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: s_ashr_i32 s5, s5, 24 ; GFX7-NEXT: s_ashr_i32 s5, s5, 24
; GFX7-NEXT: v_mad_i32_i24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX7-NEXT: s_ashr_i32 s4, s4, 24 ; GFX7-NEXT: s_ashr_i32 s4, s4, 24
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mad_i32_i24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_acc32: ; GFX8-LABEL: idot4_acc32:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i8 s0, s2 ; GFX8-NEXT: s_sext_i32_i8 s4, s2
; GFX8-NEXT: s_sext_i32_i8 s1, s3 ; GFX8-NEXT: s_sext_i32_i8 s5, s3
; GFX8-NEXT: s_bfe_i32 s6, s3, 0x80008 ; GFX8-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: s_bfe_i32 s8, s3, 0x80010 ; GFX8-NEXT: s_bfe_i32 s9, s3, 0x80010
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX8-NEXT: s_bfe_i32 s5, s2, 0x80008 ; GFX8-NEXT: s_bfe_i32 s6, s2, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v3, s6 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_bfe_i32 s7, s2, 0x80010 ; GFX8-NEXT: s_bfe_i32 s8, s2, 0x80010
; GFX8-NEXT: v_mad_i32_i24 v2, s5, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s8 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: s_ashr_i32 s3, s3, 24 ; GFX8-NEXT: s_ashr_i32 s3, s3, 24
; GFX8-NEXT: v_mad_i32_i24 v2, s7, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX8-NEXT: s_ashr_i32 s2, s2, 24 ; GFX8-NEXT: s_ashr_i32 s2, s2, 24
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_acc32: ; GFX9-NODL-LABEL: idot4_acc32:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i8 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i8 s4, s2
; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i8 s5, s3
; GFX9-NODL-NEXT: s_bfe_i32 s6, s3, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NODL-NEXT: s_bfe_i32 s8, s3, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s9, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX9-NODL-NEXT: s_bfe_i32 s5, s2, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s6, s2, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NODL-NEXT: s_bfe_i32 s7, s2, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s8, s2, 0x80010
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s5, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s8 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 24
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s7, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot4_acc32: ; GFX9-DL-LABEL: idot4_acc32:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-DL-NEXT: v_dot4_i32_i8 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_dot4_i32_i8 v2, s4, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot4_acc32: ; GFX10-DL-LABEL: idot4_acc32:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot4_i32_i8 v2, s3, s4, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot4_i32_i8 v2, s2, s3, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_acc16: ; GFX8-LABEL: idot4_acc16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i8 s0, s2 ; GFX8-NEXT: s_sext_i32_i8 s1, s2
; GFX8-NEXT: s_sext_i32_i8 s1, s3 ; GFX8-NEXT: s_bfe_i32 s3, s2, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_i32 s4, s3, 0x80008 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x80010
; GFX8-NEXT: s_bfe_i32 s5, s3, 0x80010 ; GFX8-NEXT: s_sext_i32_i8 s1, s0
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s3
; GFX8-NEXT: s_bfe_i32 s1, s2, 0x80008 ; GFX8-NEXT: s_bfe_i32 s4, s0, 0x80008
; GFX8-NEXT: s_bfe_i32 s4, s2, 0x80010 ; GFX8-NEXT: s_bfe_i32 s3, s0, 0x80010
; GFX8-NEXT: s_ashr_i32 s3, s3, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_ashr_i32 s2, s2, 24 ; GFX8-NEXT: s_ashr_i32 s2, s2, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_ashr_i32 s0, s0, 24
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s4, v4, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s3, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v4, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s4, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_acc16: ; GFX9-NODL-LABEL: idot4_acc16:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i8 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s2
; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s3 ; GFX9-NODL-NEXT: s_bfe_i32 s3, s2, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NODL-NEXT: s_bfe_i32 s4, s3, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s5, s2, 0x80010
; GFX9-NODL-NEXT: s_bfe_i32 s5, s3, 0x80010 ; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s3
; GFX9-NODL-NEXT: s_bfe_i32 s1, s2, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s4, s0, 0x80008
; GFX9-NODL-NEXT: s_bfe_i32 s4, s2, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s3, s0, 0x80010
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NODL-NEXT: s_ashr_i32 s0, s0, 24
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s4, v4, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s3, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v4, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s4, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v3, v2
; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot4_acc16: ; GFX9-DL-LABEL: idot4_acc16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot4_i32_i8 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_dot4_i32_i8 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot4_acc16: ; GFX10-DL-LABEL: idot4_acc16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
define amdgpu_kernel void @idot4_acc8(<4 x i8> addrspace(1)* %src1, define amdgpu_kernel void @idot4_acc8(<4 x i8> addrspace(1)* %src1,
; GFX7-LABEL: idot4_acc8: ; GFX7-LABEL: idot4_acc8:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: buffer_load_ubyte v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_load_ubyte v0, off, s[0:3], 0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: s_movk_i32 s5, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008
; GFX7-NEXT: s_and_b32 s6, s5, s8
; GFX7-NEXT: s_bfe_u32 s8, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_and_b32 s7, s6, s5
; GFX7-NEXT: s_and_b32 s5, s4, s5
; GFX7-NEXT: s_bfe_u32 s8, s6, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s7
; GFX7-NEXT: s_bfe_u32 s10, s6, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_lshr_b32 s6, s6, 24
; GFX7-NEXT: v_mov_b32_e32 v3, s10 ; GFX7-NEXT: v_mov_b32_e32 v3, s10
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_byte v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_acc8: ; GFX8-LABEL: idot4_acc8:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_u32 s5, s0, 0x80008 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX8-NEXT: s_and_b32 s3, s1, s2 ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX8-NEXT: s_and_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s0, s2, s0
; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX8-NEXT: s_and_b32 s2, s0, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_bfe_u32 s7, s0, 0x80010
; GFX8-NEXT: s_lshr_b32 s1, s1, 24 ; GFX8-NEXT: s_lshr_b32 s1, s1, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s6 ; GFX8-NEXT: v_mov_b32_e32 v5, s6
; GFX8-NEXT: s_lshr_b32 s0, s0, 24 ; GFX8-NEXT: s_lshr_b32 s2, s2, 24
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_acc8: ; GFX9-NODL-LABEL: idot4_acc8:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX9-NODL-NEXT: s_movk_i32 s0, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_bfe_u32 s5, s0, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s2 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s0
; GFX9-NODL-NEXT: s_and_b32 s0, s2, s0
; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX9-NODL-NEXT: s_and_b32 s2, s0, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NODL-NEXT: s_bfe_u32 s7, s0, 0x80010
; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s6
; GFX9-NODL-NEXT: s_lshr_b32 s0, s0, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s5, v4, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s7, v5, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s7, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot4_acc8: ; GFX9-DL-LABEL: idot4_acc8:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot4_acc8: ; GFX10-DL-LABEL: idot4_acc8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_sext_i32_i8 s7, s4 ; GFX7-NEXT: s_sext_i32_i8 s6, s4
; GFX7-NEXT: s_sext_i32_i8 s8, s5 ; GFX7-NEXT: s_sext_i32_i8 s7, s5
; GFX7-NEXT: s_bfe_i32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_i32 s9, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v0, s8 ; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_i32 s9, s4, 0x80008
; GFX7-NEXT: v_mad_i32_i24 v1, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s10
; GFX7-NEXT: s_bfe_i32 s12, s5, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v1, s9, v2, v1
; GFX7-NEXT: s_bfe_i32 s11, s4, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s12 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: s_bfe_i32 s8, s4, 0x80008
; GFX7-NEXT: v_mad_i32_i24 v1, s6, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s9
; GFX7-NEXT: s_bfe_i32 s11, s5, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v1, s8, v2, v1
; GFX7-NEXT: s_bfe_i32 s10, s4, 0x80010
; GFX7-NEXT: v_mad_i32_i24 v0, s6, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: s_ashr_i32 s5, s5, 24 ; GFX7-NEXT: s_ashr_i32 s5, s5, 24
; GFX7-NEXT: v_mad_i32_i24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX7-NEXT: s_ashr_i32 s4, s4, 24 ; GFX7-NEXT: s_ashr_i32 s4, s4, 24
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mad_i32_i24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_multiuse_mul1: ; GFX8-LABEL: idot4_multiuse_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_sext_i32_i8 s0, s2 ; GFX8-NEXT: s_sext_i32_i8 s4, s2
; GFX8-NEXT: s_sext_i32_i8 s1, s3 ; GFX8-NEXT: s_sext_i32_i8 s5, s3
; GFX8-NEXT: s_bfe_i32 s6, s3, 0x80008 ; GFX8-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s5
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: s_bfe_i32 s5, s2, 0x80008 ; GFX8-NEXT: s_bfe_i32 s6, s2, 0x80008
; GFX8-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v1, s4, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s6 ; GFX8-NEXT: v_mov_b32_e32 v2, s7
; GFX8-NEXT: s_bfe_i32 s8, s3, 0x80010 ; GFX8-NEXT: s_bfe_i32 s9, s3, 0x80010
; GFX8-NEXT: v_mad_i32_i24 v3, s5, v4, v3 ; GFX8-NEXT: v_mad_i32_i24 v1, s6, v2, v1
; GFX8-NEXT: s_bfe_i32 s7, s2, 0x80010 ; GFX8-NEXT: s_bfe_i32 s8, s2, 0x80010
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v3, s8 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: s_ashr_i32 s3, s3, 24 ; GFX8-NEXT: s_ashr_i32 s3, s3, 24
; GFX8-NEXT: v_mad_i32_i24 v2, s7, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX8-NEXT: s_ashr_i32 s2, s2, 24 ; GFX8-NEXT: s_ashr_i32 s2, s2, 24
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_multiuse_mul1: ; GFX9-NODL-LABEL: idot4_multiuse_mul1:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_sext_i32_i8 s0, s2 ; GFX9-NODL-NEXT: s_sext_i32_i8 s4, s2
; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s3 ; GFX9-NODL-NEXT: s_sext_i32_i8 s5, s3
; GFX9-NODL-NEXT: s_bfe_i32 s6, s3, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s5
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NODL-NEXT: s_bfe_i32 s5, s2, 0x80008 ; GFX9-NODL-NEXT: s_bfe_i32 s6, s2, 0x80008
; GFX9-NODL-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX9-NODL-NEXT: v_mad_i32_i24 v1, s4, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s7
; GFX9-NODL-NEXT: s_bfe_i32 s8, s3, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s9, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_i32_i24 v3, s5, v4, v3 ; GFX9-NODL-NEXT: v_mad_i32_i24 v1, s6, v2, v1
; GFX9-NODL-NEXT: s_bfe_i32 s7, s2, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s8, s2, 0x80010
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s8 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s3, s3, 24
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s7, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s2, s2, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot4_multiuse_mul1: ; GFX9-DL-LABEL: idot4_multiuse_mul1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_sext_i32_i8 s0, s2 ; GFX9-DL-NEXT: s_sext_i32_i8 s4, s2
; GFX9-DL-NEXT: s_sext_i32_i8 s1, s3 ; GFX9-DL-NEXT: s_sext_i32_i8 s5, s3
; GFX9-DL-NEXT: s_bfe_i32 s6, s3, 0x80008 ; GFX9-DL-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-DL-NEXT: s_bfe_i32 s5, s2, 0x80008 ; GFX9-DL-NEXT: s_bfe_i32 s6, s2, 0x80008
; GFX9-DL-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v1, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s7
; GFX9-DL-NEXT: s_bfe_i32 s8, s3, 0x80010 ; GFX9-DL-NEXT: s_bfe_i32 s9, s3, 0x80010
; GFX9-DL-NEXT: v_mad_i32_i24 v3, s5, v4, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v1, s6, v2, v1
; GFX9-DL-NEXT: s_bfe_i32 s7, s2, 0x80010 ; GFX9-DL-NEXT: s_bfe_i32 s8, s2, 0x80010
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s8 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 24 ; GFX9-DL-NEXT: s_ashr_i32 s3, s3, 24
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s7, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 24 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot4_multiuse_mul1: ; GFX10-DL-LABEL: idot4_multiuse_mul1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_sext_i32_i8 s0, s2 ; GFX10-DL-NEXT: s_sext_i32_i8 s5, s2
; GFX10-DL-NEXT: s_sext_i32_i8 s1, s3 ; GFX10-DL-NEXT: s_sext_i32_i8 s6, s3
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80008 ; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80008
; GFX10-DL-NEXT: s_bfe_i32 s5, s3, 0x80008 ; GFX10-DL-NEXT: s_bfe_i32 s7, s3, 0x80008
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s5, s6, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s4, s7, v0
; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80010 ; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80010
; GFX10-DL-NEXT: s_bfe_i32 s5, s3, 0x80010 ; GFX10-DL-NEXT: s_bfe_i32 s7, s3, 0x80010
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: s_ashr_i32 s2, s2, 24
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 24 ; GFX10-DL-NEXT: s_ashr_i32 s3, s3, 24
; GFX10-DL-NEXT: s_ashr_i32 s1, s3, 24 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s5, s6, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s4, s7, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 38 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_ashr_i32 s7, s4, 24 ; GFX7-NEXT: s_ashr_i32 s6, s4, 24
; GFX7-NEXT: s_ashr_i32 s10, s5, 24 ; GFX7-NEXT: s_ashr_i32 s9, s5, 24
; GFX7-NEXT: s_bfe_i32 s11, s5, 0x80010 ; GFX7-NEXT: s_bfe_i32 s10, s5, 0x80010
; GFX7-NEXT: s_bfe_i32 s12, s5, 0x80008 ; GFX7-NEXT: s_bfe_i32 s11, s5, 0x80008
; GFX7-NEXT: s_sext_i32_i8 s5, s5 ; GFX7-NEXT: s_sext_i32_i8 s5, s5
; GFX7-NEXT: s_bfe_i32 s8, s4, 0x80010 ; GFX7-NEXT: s_bfe_i32 s7, s4, 0x80010
; GFX7-NEXT: s_bfe_i32 s9, s4, 0x80008 ; GFX7-NEXT: s_bfe_i32 s8, s4, 0x80008
; GFX7-NEXT: s_sext_i32_i8 s4, s4 ; GFX7-NEXT: s_sext_i32_i8 s4, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s12 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: v_mad_i32_i24 v0, s9, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s11 ; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: v_mad_i32_i24 v0, s8, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s10 ; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: v_mad_i32_i24 v0, s7, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s7, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_acc32_vecMul: ; GFX8-LABEL: idot4_acc32_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b16_e64 v2, 8, s2 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 8, s2
; GFX8-NEXT: v_lshrrev_b16_e64 v3, 8, s3 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 8, s3
; GFX8-NEXT: s_ashr_i32 s5, s3, 24 ; GFX8-NEXT: s_ashr_i32 s6, s3, 24
; GFX8-NEXT: s_bfe_i32 s6, s3, 0x80010 ; GFX8-NEXT: s_bfe_i32 s7, s3, 0x80010
; GFX8-NEXT: s_sext_i32_i8 s3, s3 ; GFX8-NEXT: s_sext_i32_i8 s3, s3
; GFX8-NEXT: s_ashr_i32 s0, s2, 24 ; GFX8-NEXT: s_ashr_i32 s4, s2, 24
; GFX8-NEXT: s_bfe_i32 s1, s2, 0x80010 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x80010
; GFX8-NEXT: s_sext_i32_i8 s2, s2 ; GFX8-NEXT: s_sext_i32_i8 s2, s2
; GFX8-NEXT: v_mov_b32_e32 v4, s3 ; GFX8-NEXT: v_mov_b32_e32 v2, s3
; GFX8-NEXT: v_mov_b32_e32 v5, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s8
; GFX8-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX8-NEXT: v_bfe_i32 v3, v3, 0, 8 ; GFX8-NEXT: v_bfe_i32 v1, v1, 0, 8
; GFX8-NEXT: v_mad_i32_i24 v4, s2, v4, v5 ; GFX8-NEXT: v_mad_i32_i24 v2, s2, v2, v3
; GFX8-NEXT: v_mad_i32_i24 v2, v2, v3, v4 ; GFX8-NEXT: v_mad_i32_i24 v0, v0, v1, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s6 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s5, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s6
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s4, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_acc32_vecMul: ; GFX9-NODL-LABEL: idot4_acc32_vecMul:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v2, 8, s2 ; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v0, 8, s2
; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v3, 8, s3 ; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v1, 8, s3
; GFX9-NODL-NEXT: s_ashr_i32 s5, s3, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s6, s3, 24
; GFX9-NODL-NEXT: s_bfe_i32 s6, s3, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s7, s3, 0x80010
; GFX9-NODL-NEXT: s_sext_i32_i8 s3, s3 ; GFX9-NODL-NEXT: s_sext_i32_i8 s3, s3
; GFX9-NODL-NEXT: s_ashr_i32 s0, s2, 24 ; GFX9-NODL-NEXT: s_ashr_i32 s4, s2, 24
; GFX9-NODL-NEXT: s_bfe_i32 s1, s2, 0x80010 ; GFX9-NODL-NEXT: s_bfe_i32 s5, s2, 0x80010
; GFX9-NODL-NEXT: s_sext_i32_i8 s2, s2 ; GFX9-NODL-NEXT: s_sext_i32_i8 s2, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s3
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s8
; GFX9-NODL-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX9-NODL-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX9-NODL-NEXT: v_bfe_i32 v3, v3, 0, 8 ; GFX9-NODL-NEXT: v_bfe_i32 v1, v1, 0, 8
; GFX9-NODL-NEXT: v_mad_i32_i24 v4, s2, v4, v5 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s2, v2, v3
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, v2, v3, v4 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, v0, v1, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v0, s5, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s6
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s4, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot4_acc32_vecMul: ; GFX9-DL-LABEL: idot4_acc32_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s8, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_lshrrev_b16_e64 v2, 8, s2 ; GFX9-DL-NEXT: v_lshrrev_b16_e64 v0, 8, s2
; GFX9-DL-NEXT: v_lshrrev_b16_e64 v3, 8, s3 ; GFX9-DL-NEXT: v_lshrrev_b16_e64 v1, 8, s3
; GFX9-DL-NEXT: s_ashr_i32 s5, s3, 24 ; GFX9-DL-NEXT: s_ashr_i32 s6, s3, 24
; GFX9-DL-NEXT: s_bfe_i32 s6, s3, 0x80010 ; GFX9-DL-NEXT: s_bfe_i32 s7, s3, 0x80010
; GFX9-DL-NEXT: s_sext_i32_i8 s3, s3 ; GFX9-DL-NEXT: s_sext_i32_i8 s3, s3
; GFX9-DL-NEXT: s_ashr_i32 s0, s2, 24 ; GFX9-DL-NEXT: s_ashr_i32 s4, s2, 24
; GFX9-DL-NEXT: s_bfe_i32 s1, s2, 0x80010 ; GFX9-DL-NEXT: s_bfe_i32 s5, s2, 0x80010
; GFX9-DL-NEXT: s_sext_i32_i8 s2, s2 ; GFX9-DL-NEXT: s_sext_i32_i8 s2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s3
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s8
; GFX9-DL-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX9-DL-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX9-DL-NEXT: v_bfe_i32 v3, v3, 0, 8 ; GFX9-DL-NEXT: v_bfe_i32 v1, v1, 0, 8
; GFX9-DL-NEXT: v_mad_i32_i24 v4, s2, v4, v5 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s2, v2, v3
; GFX9-DL-NEXT: v_mad_i32_i24 v2, v2, v3, v4 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, v0, v1, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s5, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s6
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s4, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot4_acc32_vecMul: ; GFX10-DL-LABEL: idot4_acc32_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v2, 8, s2 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v0, 8, s2
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v3, 8, s3 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v1, 8, s3
; GFX10-DL-NEXT: v_mov_b32_e32 v4, s4 ; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: s_sext_i32_i8 s0, s2 ; GFX10-DL-NEXT: s_sext_i32_i8 s5, s2
; GFX10-DL-NEXT: s_sext_i32_i8 s1, s3 ; GFX10-DL-NEXT: s_sext_i32_i8 s6, s3
; GFX10-DL-NEXT: v_bfe_i32 v2, v2, 0, 8 ; GFX10-DL-NEXT: v_bfe_i32 v0, v0, 0, 8
; GFX10-DL-NEXT: v_bfe_i32 v3, v3, 0, 8 ; GFX10-DL-NEXT: v_bfe_i32 v1, v1, 0, 8
; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80010 ; GFX10-DL-NEXT: s_bfe_i32 s4, s2, 0x80010
; GFX10-DL-NEXT: s_ashr_i32 s2, s2, 24
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s5, s6, v2
; GFX10-DL-NEXT: s_bfe_i32 s5, s3, 0x80010 ; GFX10-DL-NEXT: s_bfe_i32 s5, s3, 0x80010
; GFX10-DL-NEXT: v_mad_i32_i24 v4, s0, s1, v4 ; GFX10-DL-NEXT: s_ashr_i32 s3, s3, 24
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 24 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, v0, v1, v2
; GFX10-DL-NEXT: s_ashr_i32 s1, s3, 24 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s4, s5, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, v2, v3, v4 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s3, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; GFX7-NEXT: v_mad_i32_i24 v0, s6, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s6, v1, v0
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot4_acc16_vecMul: ; GFX8-LABEL: idot4_acc16_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_mov_b32 s2, 0xffff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s1, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s3, s1, 16 ; GFX8-NEXT: s_bfe_i32 s6, s3, 0x80000
; GFX8-NEXT: s_bfe_i32 s6, s2, 0x80000 ; GFX8-NEXT: s_lshr_b32 s4, s3, 16
; GFX8-NEXT: s_lshr_b32 s4, s2, 16 ; GFX8-NEXT: v_ashrrev_i16_e64 v3, 8, s3
; GFX8-NEXT: s_bfe_i32 s5, s1, 0x80000 ; GFX8-NEXT: s_bfe_i32 s3, s4, 0x80000
; GFX8-NEXT: v_ashrrev_i16_e64 v4, 8, s1 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_bfe_i32 s1, s3, 0x80000 ; GFX8-NEXT: s_bfe_i32 s5, s0, 0x80000
; GFX8-NEXT: v_ashrrev_i16_e64 v6, 8, s3 ; GFX8-NEXT: v_ashrrev_i16_e64 v4, 8, s0
; GFX8-NEXT: s_and_b32 s3, s0, s6 ; GFX8-NEXT: s_bfe_i32 s0, s1, 0x80000
; GFX8-NEXT: v_ashrrev_i16_e64 v3, 8, s2 ; GFX8-NEXT: v_ashrrev_i16_e64 v6, 8, s1
; GFX8-NEXT: s_bfe_i32 s2, s4, 0x80000 ; GFX8-NEXT: s_and_b32 s1, s2, s6
; GFX8-NEXT: v_ashrrev_i16_e64 v5, 8, s4 ; GFX8-NEXT: v_ashrrev_i16_e64 v5, 8, s4
; GFX8-NEXT: s_and_b32 s4, s0, s5 ; GFX8-NEXT: s_and_b32 s4, s2, s5
; GFX8-NEXT: v_mov_b32_e32 v7, s3 ; GFX8-NEXT: v_mov_b32_e32 v7, s1
; GFX8-NEXT: s_and_b32 s2, s0, s2 ; GFX8-NEXT: s_and_b32 s3, s2, s3
; GFX8-NEXT: s_and_b32 s0, s0, s1 ; GFX8-NEXT: s_and_b32 s0, s2, s0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s4, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v4, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v4, v3, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v6, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v6, v5, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: idot4_acc16_vecMul: ; GFX9-NODL-LABEL: idot4_acc16_vecMul:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: idot4_acc16_vecMul: ; GFX10-DL-LABEL: idot4_acc16_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: v_mov_b32_e32 v2, 0xffff ; GFX10-DL-NEXT: v_mov_b32_e32 v2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v3, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v3, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_i32 s4, s0, 0x80000
; GFX10-DL-NEXT: s_bfe_i32 s3, s1, 0x80000
; GFX10-DL-NEXT: s_lshr_b32 s2, s0, 16
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 8, s0
; GFX10-DL-NEXT: s_lshr_b32 s5, s1, 16
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v5, 8, s1
; GFX10-DL-NEXT: v_and_b32_e32 v6, s3, v2
; GFX10-DL-NEXT: v_and_b32_e32 v7, s4, v2
; GFX10-DL-NEXT: s_bfe_i32 s0, s2, 0x80000 ; GFX10-DL-NEXT: s_bfe_i32 s0, s2, 0x80000
; GFX10-DL-NEXT: s_bfe_i32 s1, s3, 0x80000
; GFX10-DL-NEXT: s_lshr_b32 s4, s2, 16
; GFX10-DL-NEXT: s_lshr_b32 s5, s3, 16
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 8, s2
; GFX10-DL-NEXT: v_and_b32_e32 v7, s0, v2
; GFX10-DL-NEXT: v_and_b32_e32 v6, s1, v2
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v5, 8, s3
; GFX10-DL-NEXT: s_bfe_i32 s0, s4, 0x80000
; GFX10-DL-NEXT: s_bfe_i32 s1, s5, 0x80000 ; GFX10-DL-NEXT: s_bfe_i32 s1, s5, 0x80000
; GFX10-DL-NEXT: v_lshl_or_b32 v4, v4, 16, v7 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v11, 8, s2
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v8, 8, s4
; GFX10-DL-NEXT: v_lshl_or_b32 v5, v5, 16, v6 ; GFX10-DL-NEXT: v_lshl_or_b32 v5, v5, 16, v6
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v6, 8, s5 ; GFX10-DL-NEXT: v_lshl_or_b32 v4, v4, 16, v7
; GFX10-DL-NEXT: v_and_b32_e32 v7, s1, v2 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v7, 8, s5
; GFX10-DL-NEXT: v_and_b32_e32 v8, s1, v2
; GFX10-DL-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, s0, v2
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5
; GFX10-DL-NEXT: v_lshl_or_b32 v5, v6, 16, v7 ; GFX10-DL-NEXT: v_lshl_or_b32 v5, v7, 16, v8
; GFX10-DL-NEXT: v_lshl_or_b32 v2, v8, 16, v2 ; GFX10-DL-NEXT: v_lshl_or_b32 v2, v11, 16, v2
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v5 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v5
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v4, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v4, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
Show All 24 Lines

llvm/test/CodeGen/AMDGPU/idot4u.ll

Show All 11 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_movk_i32 s8, 0xff ; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8 ; GFX7-NEXT: s_and_b32 s6, s4, s8
; GFX7-NEXT: s_and_b32 s8, s5, s8 ; GFX7-NEXT: s_and_b32 s7, s5, s8
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v0, s8 ; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_u32 s12, s5, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s12 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: s_bfe_u32 s11, s5, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_lshr_b32 s5, s5, 24
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_acc32: ; GFX8-LABEL: udot4_acc32:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff ; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s6, s3, s2 ; GFX8-NEXT: s_and_b32 s5, s3, s2
; GFX8-NEXT: s_and_b32 s2, s4, s2 ; GFX8-NEXT: s_and_b32 s2, s4, s2
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX8-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX8-NEXT: s_bfe_u32 s7, s3, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v1, s8
; GFX8-NEXT: s_bfe_u32 s9, s3, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v1, s10 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX8-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s6, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: s_lshr_b32 s4, s4, 24 ; GFX8-NEXT: s_lshr_b32 s4, s4, 24
; GFX8-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX8-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX8-NEXT: s_lshr_b32 s3, s3, 24 ; GFX8-NEXT: s_lshr_b32 s3, s3, 24
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v1, v0 ; GFX8-NEXT: v_mad_u32_u24 v2, s3, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_acc32: ; GFX9-NODL-LABEL: udot4_acc32:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff ; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_and_b32 s6, s3, s2 ; GFX9-NODL-NEXT: s_and_b32 s5, s3, s2
; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2
; GFX9-NODL-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NODL-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX9-NODL-NEXT: s_bfe_u32 s7, s3, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NODL-NEXT: s_bfe_u32 s9, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NODL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX9-NODL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NODL-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s6, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v1, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_acc32: ; GFX9-DL-LABEL: udot4_acc32:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s4, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_acc32: ; GFX10-DL-LABEL: udot4_acc32:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot4_u32_u8 v2, s3, s4, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot4_u32_u8 v2, s2, s3, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 33 Lines
define amdgpu_kernel void @udot4_acc16(<4 x i8> addrspace(1)* %src1, define amdgpu_kernel void @udot4_acc16(<4 x i8> addrspace(1)* %src1,
; GFX7-LABEL: udot4_acc16: ; GFX7-LABEL: udot4_acc16:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: s_movk_i32 s5, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008
; GFX7-NEXT: s_and_b32 s6, s5, s8
; GFX7-NEXT: s_bfe_u32 s8, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_and_b32 s7, s6, s5
; GFX7-NEXT: s_and_b32 s5, s4, s5
; GFX7-NEXT: s_bfe_u32 s8, s6, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s7
; GFX7-NEXT: s_bfe_u32 s10, s6, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_lshr_b32 s6, s6, 24
; GFX7-NEXT: v_mov_b32_e32 v3, s10 ; GFX7-NEXT: v_mov_b32_e32 v3, s10
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_acc16: ; GFX8-LABEL: udot4_acc16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s1, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s1, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX8-NEXT: v_mov_b32_e32 v4, s5
; GFX8-NEXT: s_and_b32 s3, s1, s0 ; GFX8-NEXT: s_and_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s0, s2, s0 ; GFX8-NEXT: s_and_b32 s0, s2, s0
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mov_b32_e32 v3, s0
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v4, s5
; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX8-NEXT: s_lshr_b32 s2, s2, 24 ; GFX8-NEXT: s_lshr_b32 s2, s2, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: v_mov_b32_e32 v5, s7
; GFX8-NEXT: s_lshr_b32 s1, s1, 24 ; GFX8-NEXT: s_lshr_b32 s1, s1, 24
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s3, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s4, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_acc16: ; GFX9-NODL-LABEL: udot4_acc16:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s1, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s1, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: s_movk_i32 s0, 0xff ; GFX9-NODL-NEXT: s_movk_i32 s0, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX9-NODL-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s5
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s0 ; GFX9-NODL-NEXT: s_and_b32 s3, s1, s0
; GFX9-NODL-NEXT: s_and_b32 s0, s2, s0 ; GFX9-NODL-NEXT: s_and_b32 s0, s2, s0
; GFX9-NODL-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s0
; GFX9-NODL-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s5
; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s7
; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v3, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s4, v4, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s4, v4, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_acc16: ; GFX9-DL-LABEL: udot4_acc16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_acc16: ; GFX10-DL-LABEL: udot4_acc16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
define amdgpu_kernel void @udot4_acc8(<4 x i8> addrspace(1)* %src1, define amdgpu_kernel void @udot4_acc8(<4 x i8> addrspace(1)* %src1,
; GFX7-LABEL: udot4_acc8: ; GFX7-LABEL: udot4_acc8:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: buffer_load_ubyte v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_load_ubyte v0, off, s[0:3], 0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: s_movk_i32 s5, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008
; GFX7-NEXT: s_and_b32 s6, s5, s8
; GFX7-NEXT: s_bfe_u32 s8, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_and_b32 s7, s6, s5
; GFX7-NEXT: s_and_b32 s5, s4, s5
; GFX7-NEXT: s_bfe_u32 s8, s6, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s7
; GFX7-NEXT: s_bfe_u32 s10, s6, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8
; GFX7-NEXT: s_lshr_b32 s6, s6, 24
; GFX7-NEXT: v_mov_b32_e32 v3, s10 ; GFX7-NEXT: v_mov_b32_e32 v3, s10
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v2, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_byte v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_acc8: ; GFX8-LABEL: udot4_acc8:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_u32 s5, s0, 0x80008 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX8-NEXT: s_and_b32 s3, s1, s2 ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX8-NEXT: s_and_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s0, s2, s0
; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX8-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX8-NEXT: s_and_b32 s2, s0, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX8-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_bfe_u32 s7, s0, 0x80010
; GFX8-NEXT: s_lshr_b32 s1, s1, 24 ; GFX8-NEXT: s_lshr_b32 s1, s1, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s6 ; GFX8-NEXT: v_mov_b32_e32 v5, s6
; GFX8-NEXT: s_lshr_b32 s0, s0, 24 ; GFX8-NEXT: s_lshr_b32 s2, s2, 24
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_acc8: ; GFX9-NODL-LABEL: udot4_acc8:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX9-NODL-NEXT: s_movk_i32 s0, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_bfe_u32 s5, s0, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s5, s2, 0x80008
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s2 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s2, 0x80010
; GFX9-NODL-NEXT: s_and_b32 s3, s1, s0
; GFX9-NODL-NEXT: s_and_b32 s0, s2, s0
; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX9-NODL-NEXT: s_and_b32 s2, s0, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s6, s1, 0x80010
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NODL-NEXT: s_bfe_u32 s7, s0, 0x80010
; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s1, s1, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s6 ; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s6
; GFX9-NODL-NEXT: s_lshr_b32 s0, s0, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s5, v4, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s7, v5, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s7, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_acc8: ; GFX9-DL-LABEL: udot4_acc8:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_acc8: ; GFX10-DL-LABEL: udot4_acc8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 140 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: udot2_8: ; GFX10-DL-LABEL: udot2_8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s2, 0xff ; GFX10-DL-NEXT: s_movk_i32 s2, 0xff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[4:5], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s3, s0, s2
; GFX10-DL-NEXT: s_and_b32 s1, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s1, s2
; GFX10-DL-NEXT: s_bfe_u32 s2, s4, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s0, s0, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s3, s3, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s1, s1, 0x80008
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i8 addrspace(1)* nocapture %dst) { i8 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_CommutationInsideMAD: ; GFX9-DL-LABEL: udot4_CommutationInsideMAD:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s3, v3, v2 ; GFX9-DL-NEXT: v_dot4_u32_u8 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_CommutationInsideMAD: ; GFX10-DL-LABEL: udot4_CommutationInsideMAD:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 172 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: udot4_CommutationAccrossMADs: ; GFX10-DL-LABEL: udot4_CommutationAccrossMADs:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s2, 0xff ; GFX10-DL-NEXT: s_movk_i32 s2, 0xff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_u32 s0, s3, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s3, s0, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x80008
; GFX10-DL-NEXT: s_and_b32 s5, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s5, s0, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s1, s2
; GFX10-DL-NEXT: s_bfe_u32 s6, s3, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x80010
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s4, s3, v2
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 24 ; GFX10-DL-NEXT: s_bfe_u32 s3, s0, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s1, s4, 24 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s5, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s5, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s4, s3, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s1, s0, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i8 addrspace(1)* nocapture %dst) { i8 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 30 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_movk_i32 s8, 0xff ; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8 ; GFX7-NEXT: s_and_b32 s6, s4, s8
; GFX7-NEXT: s_and_b32 s8, s5, s8 ; GFX7-NEXT: s_and_b32 s7, s5, s8
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v0, s8 ; GFX7-NEXT: v_mov_b32_e32 v0, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008
; GFX7-NEXT: v_mad_u32_u24 v1, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s10
; GFX7-NEXT: s_bfe_u32 s12, s5, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s12 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008
; GFX7-NEXT: v_mad_u32_u24 v1, s6, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s9
; GFX7-NEXT: s_bfe_u32 s11, s5, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v1, s8, v2, v1
; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_lshr_b32 s5, s5, 24
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_multiuse_mul1: ; GFX8-LABEL: udot4_multiuse_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff ; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s6, s3, s2 ; GFX8-NEXT: s_and_b32 s5, s3, s2
; GFX8-NEXT: s_and_b32 s2, s4, s2 ; GFX8-NEXT: s_and_b32 s2, s4, s2
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX8-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_bfe_u32 s7, s3, 0x80008
; GFX8-NEXT: v_mad_u32_u24 v1, s6, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v1, s7, v2, v1
; GFX8-NEXT: s_bfe_u32 s9, s3, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v1, s10 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX8-NEXT: v_mad_u32_u24 v1, s5, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v2, s7
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v1, s6, v2, v1
; GFX8-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX8-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: s_lshr_b32 s4, s4, 24 ; GFX8-NEXT: s_lshr_b32 s4, s4, 24
; GFX8-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX8-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX8-NEXT: s_lshr_b32 s3, s3, 24 ; GFX8-NEXT: s_lshr_b32 s3, s3, 24
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v1, v0 ; GFX8-NEXT: v_mad_u32_u24 v2, s3, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_multiuse_mul1: ; GFX9-NODL-LABEL: udot4_multiuse_mul1:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff ; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_and_b32 s6, s3, s2 ; GFX9-NODL-NEXT: s_and_b32 s5, s3, s2
; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2
; GFX9-NODL-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NODL-NEXT: s_bfe_u32 s7, s3, 0x80008
; GFX9-NODL-NEXT: v_mad_u32_u24 v1, s6, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NODL-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v1, s7, v2, v1
; GFX9-NODL-NEXT: s_bfe_u32 s9, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NODL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX9-NODL-NEXT: v_mad_u32_u24 v1, s5, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s7
; GFX9-NODL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v1, s6, v2, v1
; GFX9-NODL-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v1, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_multiuse_mul1: ; GFX9-DL-LABEL: udot4_multiuse_mul1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_movk_i32 s2, 0xff ; GFX9-DL-NEXT: s_movk_i32 s2, 0xff
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s6, s3, s2 ; GFX9-DL-NEXT: s_and_b32 s5, s3, s2
; GFX9-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-DL-NEXT: s_and_b32 s2, s4, s2
; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s5
; GFX9-DL-NEXT: s_bfe_u32 s7, s3, 0x80008
; GFX9-DL-NEXT: v_mad_u32_u24 v1, s6, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s8
; GFX9-DL-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX9-DL-NEXT: v_mad_u32_u24 v1, s7, v2, v1
; GFX9-DL-NEXT: s_bfe_u32 s9, s3, 0x80010
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s10 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-DL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX9-DL-NEXT: v_mad_u32_u24 v1, s5, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s7
; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-DL-NEXT: v_mad_u32_u24 v1, s6, v2, v1
; GFX9-DL-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s9
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 24 ; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 24
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s4
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v1, v0 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_multiuse_mul1: ; GFX10-DL-LABEL: udot4_multiuse_mul1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s2, 0xff ; GFX10-DL-NEXT: s_movk_i32 s2, 0xff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s6, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_bfe_u32 s5, s3, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s2, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s5, s7, v0
; GFX10-DL-NEXT: s_bfe_u32 s5, s3, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x80010
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s2, v0
; GFX10-DL-NEXT: s_lshr_b32 s2, s3, 24
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s5, s7, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s3, s2
; GFX10-DL-NEXT: s_and_b32 s1, s4, s2
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX10-DL-NEXT: s_bfe_u32 s2, s3, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s5, s4, 0x80008
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s5, v2
; GFX10-DL-NEXT: s_bfe_u32 s2, s3, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s5, s4, 0x80010
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s4, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s5, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 38 Lines
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_movk_i32 s8, 0xff ; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s12, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, s8 ; GFX7-NEXT: s_and_b32 s6, s4, s8
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008
; GFX7-NEXT: s_and_b32 s8, s5, s8 ; GFX7-NEXT: s_and_b32 s7, s5, s8
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v0, s10 ; GFX7-NEXT: v_mov_b32_e32 v0, s9
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s8, v0, v1
; GFX7-NEXT: s_bfe_u32 s12, s5, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s5, 0x80010
; GFX7-NEXT: v_mov_b32_e32 v2, s8 ; GFX7-NEXT: v_mov_b32_e32 v2, s7
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX7-NEXT: v_add_i32_e32 v1, vcc, s6, v0 ; GFX7-NEXT: v_add_i32_e32 v1, vcc, s12, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s6, v2, v0
; GFX7-NEXT: v_mov_b32_e32 v2, s12 ; GFX7-NEXT: v_mov_b32_e32 v2, s11
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_lshr_b32 s5, s5, 24
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s10, v2, v0
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: v_mov_b32_e32 v2, s5 ; GFX7-NEXT: v_mov_b32_e32 v2, s5
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v2, v0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_multiuse_add1: ; GFX8-LABEL: udot4_multiuse_add1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff ; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s6, s3, s2 ; GFX8-NEXT: s_and_b32 s5, s3, s2
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX8-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX8-NEXT: s_and_b32 s2, s4, s2 ; GFX8-NEXT: s_and_b32 s2, s4, s2
; GFX8-NEXT: s_bfe_u32 s7, s3, 0x80008 ; GFX8-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v0, s8 ; GFX8-NEXT: v_mov_b32_e32 v0, s7
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: v_mad_u32_u24 v0, s7, v0, v1 ; GFX8-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x80010 ; GFX8-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: s_bfe_u32 s9, s3, 0x80010 ; GFX8-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX8-NEXT: v_add_u32_e32 v1, vcc, s5, v0 ; GFX8-NEXT: v_add_u32_e32 v1, vcc, s10, v0
; GFX8-NEXT: v_mad_u32_u24 v0, s6, v2, v0 ; GFX8-NEXT: v_mad_u32_u24 v0, s5, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v2, s10 ; GFX8-NEXT: v_mov_b32_e32 v2, s9
; GFX8-NEXT: s_lshr_b32 s4, s4, 24 ; GFX8-NEXT: s_lshr_b32 s4, s4, 24
; GFX8-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX8-NEXT: v_mad_u32_u24 v0, s8, v2, v0
; GFX8-NEXT: s_lshr_b32 s3, s3, 24 ; GFX8-NEXT: s_lshr_b32 s3, s3, 24
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mad_u32_u24 v0, s3, v2, v0 ; GFX8-NEXT: v_mad_u32_u24 v0, s3, v2, v0
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v0, v1 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_multiuse_add1: ; GFX9-NODL-LABEL: udot4_multiuse_add1:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff ; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NODL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_and_b32 s6, s3, s2 ; GFX9-NODL-NEXT: s_and_b32 s5, s3, s2
; GFX9-NODL-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2
; GFX9-NODL-NEXT: s_bfe_u32 s7, s3, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s7
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s7, v0, v1 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX9-NODL-NEXT: s_bfe_u32 s10, s4, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NODL-NEXT: s_bfe_u32 s9, s3, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX9-NODL-NEXT: v_add_u32_e32 v1, s5, v0 ; GFX9-NODL-NEXT: v_add_u32_e32 v1, s10, v0
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s6, v2, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s5, v2, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s10 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s9
; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s4, s4, 24
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s8, v2, v0
; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s3, v2, v0 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s3, v2, v0
; GFX9-NODL-NEXT: v_add_u32_e32 v2, v0, v1 ; GFX9-NODL-NEXT: v_add_u32_e32 v2, v0, v1
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_multiuse_add1: ; GFX9-DL-LABEL: udot4_multiuse_add1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_movk_i32 s2, 0xff ; GFX9-DL-NEXT: s_movk_i32 s2, 0xff
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s10, s[0:1], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s6, s3, s2 ; GFX9-DL-NEXT: s_and_b32 s5, s3, s2
; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX9-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-DL-NEXT: s_and_b32 s2, s4, s2
; GFX9-DL-NEXT: s_bfe_u32 s7, s3, 0x80008 ; GFX9-DL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s7
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s10
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s7, v0, v1 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s6, v0, v1
; GFX9-DL-NEXT: s_bfe_u32 s10, s4, 0x80010 ; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: s_bfe_u32 s9, s3, 0x80010 ; GFX9-DL-NEXT: s_bfe_u32 s8, s3, 0x80010
; GFX9-DL-NEXT: v_add_u32_e32 v1, s5, v0 ; GFX9-DL-NEXT: v_add_u32_e32 v1, s10, v0
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s6, v2, v0 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s5, v2, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s10 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s9
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 24 ; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 24
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s9, v2, v0 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s8, v2, v0
; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s3, v2, v0 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s3, v2, v0
; GFX9-DL-NEXT: v_add_u32_e32 v2, v0, v1 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_multiuse_add1: ; GFX10-DL-LABEL: udot4_multiuse_add1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s2, 0xff ; GFX10-DL-NEXT: s_movk_i32 s2, 0xff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_u32 s0, s3, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s6, s3, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_and_b32 s6, s3, s2 ; GFX10-DL-NEXT: s_and_b32 s8, s3, s2
; GFX10-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX10-DL-NEXT: s_and_b32 s2, s4, s2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s7, v0
; GFX10-DL-NEXT: s_bfe_u32 s0, s3, 0x80010 ; GFX10-DL-NEXT: s_bfe_u32 s6, s3, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x80010 ; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x80010
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s6, s2, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s8, s2, v0
; GFX10-DL-NEXT: s_lshr_b32 s2, s3, 24 ; GFX10-DL-NEXT: s_lshr_b32 s2, s3, 24
; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 24 ; GFX10-DL-NEXT: s_lshr_b32 s3, s4, 24
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, s5, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v0, s5, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s0, s1, v3 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s6, s7, v1
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s2, s3, v3 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s2, s3, v1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v1, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 36 Lines
; GFX7-LABEL: notdot4_mixedtypes: ; GFX7-LABEL: notdot4_mixedtypes:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s8, 0xffff ; GFX7-NEXT: s_mov_b32 s8, 0xffff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_sext_i32_i8 s6, s4 ; GFX7-NEXT: s_sext_i32_i8 s7, s6
; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s9, s6, 0x80008
; GFX7-NEXT: s_sext_i32_i8 s7, s5 ; GFX7-NEXT: s_sext_i32_i8 s5, s4
; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008
; GFX7-NEXT: s_and_b32 s7, s7, s8 ; GFX7-NEXT: s_and_b32 s7, s7, s8
; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80008
; GFX7-NEXT: v_mov_b32_e32 v1, s9 ; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: s_bfe_u32 s11, s5, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s6, 0x80010
; GFX7-NEXT: s_and_b32 s6, s6, s8 ; GFX7-NEXT: s_and_b32 s5, s5, s8
; GFX7-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: s_bfe_u32 s12, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s12, s4, 0x80010
; GFX7-NEXT: s_lshr_b32 s5, s5, 24 ; GFX7-NEXT: s_lshr_b32 s6, s6, 24
; GFX7-NEXT: v_mov_b32_e32 v2, s11 ; GFX7-NEXT: v_mov_b32_e32 v2, s11
; GFX7-NEXT: s_lshr_b32 s4, s4, 24 ; GFX7-NEXT: s_lshr_b32 s4, s4, 24
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v3, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v3, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s12, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s12, v2, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: notdot4_mixedtypes: ; GFX8-LABEL: notdot4_mixedtypes:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_u32 s0, s2, 0x80008 ; GFX8-NEXT: s_bfe_u32 s1, s2, 0x80008
; GFX8-NEXT: s_bfe_u32 s1, s3, 0x80008 ; GFX8-NEXT: s_sext_i32_i8 s3, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_sext_i32_i8 s4, s3 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x80010
; GFX8-NEXT: s_bfe_u32 s5, s3, 0x80010 ; GFX8-NEXT: s_bfe_u32 s1, s0, 0x80008
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s3
; GFX8-NEXT: s_sext_i32_i8 s1, s2 ; GFX8-NEXT: s_sext_i32_i8 s4, s0
; GFX8-NEXT: s_bfe_u32 s4, s2, 0x80010 ; GFX8-NEXT: s_bfe_u32 s3, s0, 0x80010
; GFX8-NEXT: s_lshr_b32 s3, s3, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_lshr_b32 s2, s2, 24 ; GFX8-NEXT: s_lshr_b32 s2, s2, 24
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_lshr_b32 s0, s0, 24
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s4, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s1, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s4, v5, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: notdot4_mixedtypes: ; GFX9-NODL-LABEL: notdot4_mixedtypes:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_bfe_u32 s0, s2, 0x80008 ; GFX9-NODL-NEXT: s_bfe_u32 s1, s2, 0x80008
; GFX9-NODL-NEXT: s_bfe_u32 s1, s3, 0x80008 ; GFX9-NODL-NEXT: s_sext_i32_i8 s3, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NODL-NEXT: s_sext_i32_i8 s4, s3 ; GFX9-NODL-NEXT: s_bfe_u32 s5, s2, 0x80010
; GFX9-NODL-NEXT: s_bfe_u32 s5, s3, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s1, s0, 0x80008
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s3
; GFX9-NODL-NEXT: s_sext_i32_i8 s1, s2 ; GFX9-NODL-NEXT: s_sext_i32_i8 s4, s0
; GFX9-NODL-NEXT: s_bfe_u32 s4, s2, 0x80010 ; GFX9-NODL-NEXT: s_bfe_u32 s3, s0, 0x80010
; GFX9-NODL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s2, s2, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NODL-NEXT: s_lshr_b32 s0, s0, 24
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s4, v4, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NODL-NEXT: v_mad_i32_i24 v2, s1, v4, v2
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s4, v5, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_short v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: notdot4_mixedtypes: ; GFX9-DL-LABEL: notdot4_mixedtypes:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_bfe_u32 s0, s2, 0x80008 ; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x80008
; GFX9-DL-NEXT: s_bfe_u32 s1, s3, 0x80008 ; GFX9-DL-NEXT: s_sext_i32_i8 s3, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_sext_i32_i8 s4, s3 ; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x80010
; GFX9-DL-NEXT: s_bfe_u32 s5, s3, 0x80010 ; GFX9-DL-NEXT: s_bfe_u32 s1, s0, 0x80008
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s3
; GFX9-DL-NEXT: s_sext_i32_i8 s1, s2 ; GFX9-DL-NEXT: s_sext_i32_i8 s4, s0
; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x80010 ; GFX9-DL-NEXT: s_bfe_u32 s3, s0, 0x80010
; GFX9-DL-NEXT: s_lshr_b32 s3, s3, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 24 ; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 24
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s4, v4, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v5, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v4, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v5, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: notdot4_mixedtypes: ; GFX10-DL-LABEL: notdot4_mixedtypes:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x80008
; GFX10-DL-NEXT: s_bfe_u32 s1, s3, 0x80008 ; GFX10-DL-NEXT: s_bfe_u32 s3, s1, 0x80008
; GFX10-DL-NEXT: s_sext_i32_i8 s4, s2 ; GFX10-DL-NEXT: s_sext_i32_i8 s4, s0
; GFX10-DL-NEXT: s_sext_i32_i8 s5, s3 ; GFX10-DL-NEXT: s_sext_i32_i8 s5, s1
; GFX10-DL-NEXT: s_bfe_u32 s6, s2, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s7, s3, 0x80010
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v2
; GFX10-DL-NEXT: s_lshr_b32 s0, s2, 24 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s1, s3, 24 ; GFX10-DL-NEXT: s_bfe_u32 s3, s1, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 24
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s6, s7, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s3, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i16 addrspace(1)* nocapture %dst) { i16 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 33 Lines
} }
; TODO: cleanup s_lshr_b32 and support this pattern. ; TODO: cleanup s_lshr_b32 and support this pattern.
define amdgpu_kernel void @udot4_acc32_vecMul(<4 x i8> addrspace(1)* %src1, define amdgpu_kernel void @udot4_acc32_vecMul(<4 x i8> addrspace(1)* %src1,
; GFX7-LABEL: udot4_acc32_vecMul: ; GFX7-LABEL: udot4_acc32_vecMul:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_movk_i32 s12, 0xff ; GFX7-NEXT: s_movk_i32 s11, 0xff
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s7, s4, 24 ; GFX7-NEXT: s_lshr_b32 s6, s4, 24
; GFX7-NEXT: s_lshr_b32 s9, s5, 24 ; GFX7-NEXT: s_bfe_u32 s7, s4, 0x80008
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80008 ; GFX7-NEXT: s_bfe_u32 s10, s4, 0x80010
; GFX7-NEXT: s_bfe_u32 s13, s5, 0x80010 ; GFX7-NEXT: s_lshr_b32 s8, s5, 24
; GFX7-NEXT: s_and_b32 s5, s5, s12 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x80008
; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s12, s5, 0x80010
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_and_b32 s5, s5, s11
; GFX7-NEXT: s_and_b32 s4, s4, s12 ; GFX7-NEXT: s_and_b32 s4, s4, s11
; GFX7-NEXT: s_load_dword s11, s[0:1], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s13
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s9 ; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_acc32_vecMul: ; GFX8-LABEL: udot4_acc32_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff ; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s6, s3, 24 ; GFX8-NEXT: s_lshr_b32 s5, s3, 24
; GFX8-NEXT: s_bfe_u32 s8, s3, 0x80010 ; GFX8-NEXT: s_lshr_b32 s6, s4, 24
; GFX8-NEXT: s_bfe_u32 s7, s3, 0x80010
; GFX8-NEXT: v_lshrrev_b16_e64 v0, 8, s3 ; GFX8-NEXT: v_lshrrev_b16_e64 v0, 8, s3
; GFX8-NEXT: s_and_b32 s3, s3, s2 ; GFX8-NEXT: s_and_b32 s3, s3, s2
; GFX8-NEXT: s_and_b32 s2, s4, s2 ; GFX8-NEXT: s_and_b32 s2, s4, s2
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: s_bfe_u32 s8, s4, 0x80010
; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX8-NEXT: v_lshrrev_b16_e64 v1, 8, s4 ; GFX8-NEXT: v_lshrrev_b16_e64 v1, 8, s4
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v3, s4
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v2, s3, v2, v3
; GFX8-NEXT: v_mad_u32_u24 v0, v0, v1, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, v0, v1, v2
; GFX8-NEXT: v_mov_b32_e32 v1, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s8
; GFX8-NEXT: s_lshr_b32 s7, s4, 24 ; GFX8-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX8-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX8-NEXT: v_mov_b32_e32 v1, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v1, v0
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_acc32_vecMul: ; GFX9-NODL-LABEL: udot4_acc32_vecMul:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff ; GFX9-NODL-NEXT: s_movk_i32 s2, 0xff
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NODL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_lshr_b32 s6, s3, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s5, s3, 24
; GFX9-NODL-NEXT: s_bfe_u32 s8, s3, 0x80010 ; GFX9-NODL-NEXT: s_lshr_b32 s6, s4, 24
; GFX9-NODL-NEXT: s_bfe_u32 s7, s3, 0x80010
; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v0, 8, s3 ; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v0, 8, s3
; GFX9-NODL-NEXT: s_and_b32 s3, s3, s2 ; GFX9-NODL-NEXT: s_and_b32 s3, s3, s2
; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-NODL-NEXT: s_and_b32 s2, s4, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NODL-NEXT: s_bfe_u32 s8, s4, 0x80010
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NODL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v1, 8, s4 ; GFX9-NODL-NEXT: v_lshrrev_b16_e64 v1, 8, s4
; GFX9-NODL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v2, v3 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s3, v2, v3
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, v0, v1, v2 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, v0, v1, v2
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s9 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NODL-NEXT: s_lshr_b32 s7, s4, 24 ; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX9-NODL-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s6
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s5, v1, v0
; GFX9-NODL-NEXT: v_mad_u32_u24 v2, s6, v1, v0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_acc32_vecMul: ; GFX9-DL-LABEL: udot4_acc32_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_movk_i32 s2, 0xff ; GFX9-DL-NEXT: s_movk_i32 s2, 0xff
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_lshr_b32 s6, s3, 24 ; GFX9-DL-NEXT: s_lshr_b32 s5, s3, 24
; GFX9-DL-NEXT: s_bfe_u32 s8, s3, 0x80010 ; GFX9-DL-NEXT: s_lshr_b32 s6, s4, 24
; GFX9-DL-NEXT: s_bfe_u32 s7, s3, 0x80010
; GFX9-DL-NEXT: v_lshrrev_b16_e64 v0, 8, s3 ; GFX9-DL-NEXT: v_lshrrev_b16_e64 v0, 8, s3
; GFX9-DL-NEXT: s_and_b32 s3, s3, s2 ; GFX9-DL-NEXT: s_and_b32 s3, s3, s2
; GFX9-DL-NEXT: s_and_b32 s2, s4, s2 ; GFX9-DL-NEXT: s_and_b32 s2, s4, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x80010
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5
; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x80010
; GFX9-DL-NEXT: v_lshrrev_b16_e64 v1, 8, s4 ; GFX9-DL-NEXT: v_lshrrev_b16_e64 v1, 8, s4
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v2, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s3, v2, v3
; GFX9-DL-NEXT: v_mad_u32_u24 v0, v0, v1, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, v0, v1, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s8
; GFX9-DL-NEXT: s_lshr_b32 s7, s4, 24 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX9-DL-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s6
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v1, v0
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s6, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_acc32_vecMul: ; GFX10-DL-LABEL: udot4_acc32_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s3, 0xff ; GFX10-DL-NEXT: s_movk_i32 s3, 0xff
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s4
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s5
; GFX10-DL-NEXT: s_and_b32 s7, s4, s3
; GFX10-DL-NEXT: s_and_b32 s3, s5, s3
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s6
; GFX10-DL-NEXT: v_and_b32_sdwa v0, s2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-DL-NEXT: v_and_b32_sdwa v1, s2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-DL-NEXT: s_bfe_u32 s2, s4, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s3, v2
; GFX10-DL-NEXT: s_bfe_u32 s3, s5, 0x80010
; GFX10-DL-NEXT: s_lshr_b32 s5, s5, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v0, v0, v1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v0, s2, s3, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s4, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_mov_b32_e32 v3, s5
; GFX10-DL-NEXT: s_and_b32 s0, s4, s3
; GFX10-DL-NEXT: s_and_b32 s1, s5, s3
; GFX10-DL-NEXT: v_mov_b32_e32 v4, s6
; GFX10-DL-NEXT: v_and_b32_sdwa v2, s2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-DL-NEXT: v_and_b32_sdwa v3, s2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-DL-NEXT: s_bfe_u32 s3, s4, 0x80010
; GFX10-DL-NEXT: s_bfe_u32 s2, s5, 0x80010
; GFX10-DL-NEXT: v_mad_u32_u24 v4, s0, s1, v4
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 24
; GFX10-DL-NEXT: v_mad_u32_u24 v2, v2, v3, v4
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s3, s2, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<4 x i8> addrspace(1)* %src2, <4 x i8> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1 %vec1 = load <4 x i8>, <4 x i8> addrspace(1)* %src1
%vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2 %vec2 = load <4 x i8>, <4 x i8> addrspace(1)* %src2
Show All 19 Lines
; TODO: This pattern should be recognized. ; TODO: This pattern should be recognized.
define amdgpu_kernel void @udot4_acc16_vecMul(<4 x i8> addrspace(1)* %src1, define amdgpu_kernel void @udot4_acc16_vecMul(<4 x i8> addrspace(1)* %src1,
; GFX7-LABEL: udot4_acc16_vecMul: ; GFX7-LABEL: udot4_acc16_vecMul:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_load_ushort v0, off, s[0:3], 0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_movk_i32 s7, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s6, s4, 24 ; GFX7-NEXT: s_bfe_u32 s10, s6, 0x80008
; GFX7-NEXT: s_bfe_u32 s7, s4, 0x80008 ; GFX7-NEXT: s_bfe_u32 s12, s6, 0x80010
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x80008 ; GFX7-NEXT: s_lshr_b32 s9, s6, 24
; GFX7-NEXT: s_bfe_u32 s12, s5, 0x80010 ; GFX7-NEXT: s_and_b32 s6, s6, s7
; GFX7-NEXT: s_lshr_b32 s9, s5, 24 ; GFX7-NEXT: s_lshr_b32 s5, s4, 24
; GFX7-NEXT: s_and_b32 s5, s5, s8 ; GFX7-NEXT: s_bfe_u32 s8, s4, 0x80008
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010 ; GFX7-NEXT: s_bfe_u32 s11, s4, 0x80010
; GFX7-NEXT: s_and_b32 s4, s4, s8 ; GFX7-NEXT: s_and_b32 s4, s4, s7
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s6
; GFX7-NEXT: v_mov_b32_e32 v2, s10 ; GFX7-NEXT: v_mov_b32_e32 v2, s10
; GFX7-NEXT: v_mov_b32_e32 v3, s12 ; GFX7-NEXT: v_mov_b32_e32 v3, s12
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s4, v1, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s7, v2, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s8, v2, v0
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s11, v3, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s9 ; GFX7-NEXT: v_mov_b32_e32 v1, s9
; GFX7-NEXT: v_mad_u32_u24 v0, s6, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot4_acc16_vecMul: ; GFX8-LABEL: udot4_acc16_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: udot4_acc16_vecMul: ; GFX10-DL-LABEL: udot4_acc16_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: v_mov_b32_e32 v2, 0xffff ; GFX10-DL-NEXT: v_mov_b32_e32 v2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v3, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v3, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v4, 8, s2 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v4, 8, s0
; GFX10-DL-NEXT: v_and_b32_sdwa v7, v2, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_and_b32_sdwa v7, v2, s0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v5, 8, s3 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v5, 8, s1
; GFX10-DL-NEXT: v_and_b32_sdwa v6, v2, s3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_and_b32_sdwa v6, v2, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX10-DL-NEXT: s_lshr_b32 s0, s2, 16 ; GFX10-DL-NEXT: s_lshr_b32 s2, s0, 16
; GFX10-DL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX10-DL-NEXT: s_lshr_b32 s3, s1, 16
; GFX10-DL-NEXT: v_lshl_or_b32 v4, v4, 16, v7 ; GFX10-DL-NEXT: v_lshl_or_b32 v4, v4, 16, v7
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 24 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 24
; GFX10-DL-NEXT: v_lshl_or_b32 v5, v5, 16, v6 ; GFX10-DL-NEXT: v_lshl_or_b32 v5, v5, 16, v6
; GFX10-DL-NEXT: s_lshr_b32 s3, s3, 24 ; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 24
; GFX10-DL-NEXT: v_and_b32_sdwa v6, v2, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_and_b32_sdwa v6, v2, s3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX10-DL-NEXT: v_and_b32_sdwa v2, v2, s0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_and_b32_sdwa v2, v2, s2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5
; GFX10-DL-NEXT: v_lshl_or_b32 v5, s3, 16, v6 ; GFX10-DL-NEXT: v_lshl_or_b32 v5, s1, 16, v6
; GFX10-DL-NEXT: v_lshl_or_b32 v2, s2, 16, v2 ; GFX10-DL-NEXT: v_lshl_or_b32 v2, s0, 16, v2
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v5 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v5
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v4, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v4, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v3, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-NODL-LABEL: udot4_acc8_vecMul: ; GFX9-NODL-LABEL: udot4_acc8_vecMul:
; GFX9-NODL: ; %bb.0: ; %entry ; GFX9-NODL: ; %bb.0: ; %entry
; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NODL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NODL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NODL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NODL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NODL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NODL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NODL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NODL-NEXT: s_lshr_b32 s0, s2, 16 ; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s2
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s3 ; GFX9-NODL-NEXT: s_lshr_b32 s1, s2, 16
; GFX9-NODL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX9-NODL-NEXT: s_lshr_b32 s3, s2, 24
; GFX9-NODL-NEXT: s_lshr_b32 s4, s3, 24 ; GFX9-NODL-NEXT: v_mul_lo_u16_e32 v3, s0, v3
; GFX9-NODL-NEXT: v_mul_lo_u16_e32 v3, s2, v3 ; GFX9-NODL-NEXT: v_mul_lo_u16_sdwa v4, s0, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
; GFX9-NODL-NEXT: v_mul_lo_u16_sdwa v4, s2, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
; GFX9-NODL-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NODL-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-NODL-NEXT: s_lshr_b32 s2, s0, 16
; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s1 ; GFX9-NODL-NEXT: v_mov_b32_e32 v5, s1
; GFX9-NODL-NEXT: s_lshr_b32 s5, s2, 24 ; GFX9-NODL-NEXT: s_lshr_b32 s4, s0, 24
; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NODL-NEXT: v_mov_b32_e32 v4, s3
; GFX9-NODL-NEXT: v_mul_lo_u16_sdwa v4, s5, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NODL-NEXT: v_mul_lo_u16_sdwa v4, s4, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NODL-NEXT: v_mul_lo_u16_e32 v5, s0, v5 ; GFX9-NODL-NEXT: v_mul_lo_u16_e32 v5, s2, v5
; GFX9-NODL-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-NODL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX9-NODL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-NODL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-NODL-NEXT: v_or_b32_e32 v4, v3, v4 ; GFX9-NODL-NEXT: v_or_b32_e32 v4, v3, v4
; GFX9-NODL-NEXT: v_lshrrev_b32_e32 v5, 8, v4 ; GFX9-NODL-NEXT: v_lshrrev_b32_e32 v5, 8, v4
; GFX9-NODL-NEXT: s_waitcnt vmcnt(0) ; GFX9-NODL-NEXT: s_waitcnt vmcnt(0)
; GFX9-NODL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-NODL-NEXT: v_add_u32_e32 v2, v3, v2
; GFX9-NODL-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-NODL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-NODL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NODL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NODL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 ; GFX9-NODL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NODL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NODL-NEXT: s_endpgm ; GFX9-NODL-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot4_acc8_vecMul: ; GFX9-DL-LABEL: udot4_acc8_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_lshr_b32 s0, s2, 16 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s3 ; GFX9-DL-NEXT: s_lshr_b32 s1, s2, 16
; GFX9-DL-NEXT: s_lshr_b32 s1, s3, 16 ; GFX9-DL-NEXT: s_lshr_b32 s3, s2, 24
; GFX9-DL-NEXT: s_lshr_b32 s4, s3, 24 ; GFX9-DL-NEXT: v_mul_lo_u16_e32 v3, s0, v3
; GFX9-DL-NEXT: v_mul_lo_u16_e32 v3, s2, v3 ; GFX9-DL-NEXT: v_mul_lo_u16_sdwa v4, s0, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
; GFX9-DL-NEXT: v_mul_lo_u16_sdwa v4, s2, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
; GFX9-DL-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-DL-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-DL-NEXT: s_lshr_b32 s2, s0, 16
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s1
; GFX9-DL-NEXT: s_lshr_b32 s5, s2, 24 ; GFX9-DL-NEXT: s_lshr_b32 s4, s0, 24
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s3
; GFX9-DL-NEXT: v_mul_lo_u16_sdwa v4, s5, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-DL-NEXT: v_mul_lo_u16_sdwa v4, s4, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-DL-NEXT: v_mul_lo_u16_e32 v5, s0, v5 ; GFX9-DL-NEXT: v_mul_lo_u16_e32 v5, s2, v5
; GFX9-DL-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX9-DL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX9-DL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX9-DL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX9-DL-NEXT: v_or_b32_e32 v4, v3, v4 ; GFX9-DL-NEXT: v_or_b32_e32 v4, v3, v4
; GFX9-DL-NEXT: v_lshrrev_b32_e32 v5, 8, v4 ; GFX9-DL-NEXT: v_lshrrev_b32_e32 v5, 8, v4
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot4_acc8_vecMul: ; GFX10-DL-LABEL: udot4_acc8_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v3, 8, s2 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v3, 8, s0
; GFX10-DL-NEXT: v_lshrrev_b16_e64 v4, 8, s3 ; GFX10-DL-NEXT: v_lshrrev_b16_e64 v4, 8, s1
; GFX10-DL-NEXT: s_lshr_b32 s0, s2, 24 ; GFX10-DL-NEXT: s_lshr_b32 s2, s0, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s3, 24 ; GFX10-DL-NEXT: s_lshr_b32 s3, s1, 24
; GFX10-DL-NEXT: s_lshr_b32 s4, s2, 16 ; GFX10-DL-NEXT: s_lshr_b32 s4, s0, 16
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s2, s3
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, v3, v4 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, v3, v4
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, s0, s1 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, s0, s1
; GFX10-DL-NEXT: s_lshr_b32 s0, s3, 16 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s2, s3
; GFX10-DL-NEXT: s_lshr_b32 s0, s1, 16
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v3 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v3
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 8, v4 ; GFX10-DL-NEXT: v_or_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 8, v5
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s4, s0 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s4, s0
; GFX10-DL-NEXT: v_and_b32_e32 v3, 0xffff, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, 0xffff, v3
; GFX10-DL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-DL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4 ; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v5, 8, v4 ; GFX10-DL-NEXT: v_lshrrev_b32_e32 v5, 8, v4
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v5 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v5
Show All 25 Lines

llvm/test/CodeGen/AMDGPU/idot8s.ll

Show All 10 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s21, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_bfe_i32 s8, s0, 0x40000 ; GFX7-NEXT: s_bfe_i32 s2, s0, 0x40000
; GFX7-NEXT: s_bfe_i32 s9, s1, 0x40000 ; GFX7-NEXT: s_bfe_i32 s8, s1, 0x40000
; GFX7-NEXT: s_bfe_i32 s11, s1, 0x40004 ; GFX7-NEXT: s_bfe_i32 s10, s1, 0x40004
; GFX7-NEXT: v_mov_b32_e32 v0, s9 ; GFX7-NEXT: v_mov_b32_e32 v0, s8
; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: v_mad_i32_i24 v0, s8, v0, v1
; GFX7-NEXT: s_bfe_i32 s10, s0, 0x40004
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: s_bfe_i32 s13, s1, 0x40008
; GFX7-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX7-NEXT: s_bfe_i32 s12, s0, 0x40008
; GFX7-NEXT: v_mov_b32_e32 v1, s13
; GFX7-NEXT: s_bfe_i32 s15, s1, 0x4000c
; GFX7-NEXT: v_mad_i32_i24 v0, s12, v1, v0
; GFX7-NEXT: s_bfe_i32 s14, s0, 0x4000c
; GFX7-NEXT: v_mov_b32_e32 v1, s15
; GFX7-NEXT: s_bfe_i32 s17, s1, 0x40010
; GFX7-NEXT: v_mad_i32_i24 v0, s14, v1, v0
; GFX7-NEXT: s_bfe_i32 s16, s0, 0x40010
; GFX7-NEXT: v_mov_b32_e32 v1, s17
; GFX7-NEXT: s_bfe_i32 s19, s1, 0x40014
; GFX7-NEXT: s_bfe_i32 s21, s1, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s16, v1, v0
; GFX7-NEXT: s_bfe_i32 s18, s0, 0x40014
; GFX7-NEXT: v_mov_b32_e32 v1, s19
; GFX7-NEXT: s_bfe_i32 s20, s0, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s18, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s21 ; GFX7-NEXT: v_mov_b32_e32 v1, s21
; GFX7-NEXT: v_mad_i32_i24 v0, s2, v0, v1
; GFX7-NEXT: s_bfe_i32 s9, s0, 0x40004
; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: s_bfe_i32 s12, s1, 0x40008
; GFX7-NEXT: v_mad_i32_i24 v0, s9, v1, v0
; GFX7-NEXT: s_bfe_i32 s11, s0, 0x40008
; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: s_bfe_i32 s14, s1, 0x4000c
; GFX7-NEXT: v_mad_i32_i24 v0, s11, v1, v0
; GFX7-NEXT: s_bfe_i32 s13, s0, 0x4000c
; GFX7-NEXT: v_mov_b32_e32 v1, s14
; GFX7-NEXT: s_bfe_i32 s16, s1, 0x40010
; GFX7-NEXT: v_mad_i32_i24 v0, s13, v1, v0
; GFX7-NEXT: s_bfe_i32 s15, s0, 0x40010
; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: s_bfe_i32 s18, s1, 0x40014
; GFX7-NEXT: s_bfe_i32 s20, s1, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s15, v1, v0
; GFX7-NEXT: s_bfe_i32 s17, s0, 0x40014
; GFX7-NEXT: v_mov_b32_e32 v1, s18
; GFX7-NEXT: s_bfe_i32 s19, s0, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s17, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s20
; GFX7-NEXT: s_ashr_i32 s1, s1, 28 ; GFX7-NEXT: s_ashr_i32 s1, s1, 28
; GFX7-NEXT: v_mad_i32_i24 v0, s20, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s19, v1, v0
; GFX7-NEXT: s_ashr_i32 s0, s0, 28 ; GFX7-NEXT: s_ashr_i32 s0, s0, 28
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mad_i32_i24 v0, s0, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s0, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_acc32: ; GFX8-LABEL: idot8_acc32:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x40000
; GFX8-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX8-NEXT: s_bfe_i32 s6, s4, 0x40000
; GFX8-NEXT: s_bfe_i32 s7, s4, 0x40004 ; GFX8-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v0, s5, v0, v1
; GFX8-NEXT: s_bfe_i32 s6, s2, 0x40004 ; GFX8-NEXT: s_bfe_i32 s7, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s8
; GFX8-NEXT: s_bfe_i32 s9, s4, 0x40008 ; GFX8-NEXT: s_bfe_i32 s10, s4, 0x40008
; GFX8-NEXT: v_mad_i32_i24 v2, s6, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s7, v1, v0
; GFX8-NEXT: s_bfe_i32 s8, s2, 0x40008 ; GFX8-NEXT: s_bfe_i32 s9, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: s_bfe_i32 s11, s4, 0x4000c ; GFX8-NEXT: s_bfe_i32 s12, s4, 0x4000c
; GFX8-NEXT: v_mad_i32_i24 v2, s8, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s9, v1, v0
; GFX8-NEXT: s_bfe_i32 s10, s2, 0x4000c ; GFX8-NEXT: s_bfe_i32 s11, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s12
; GFX8-NEXT: s_bfe_i32 s13, s4, 0x40010 ; GFX8-NEXT: s_bfe_i32 s14, s4, 0x40010
; GFX8-NEXT: v_mad_i32_i24 v2, s10, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s11, v1, v0
; GFX8-NEXT: s_bfe_i32 s12, s2, 0x40010 ; GFX8-NEXT: s_bfe_i32 s13, s2, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v1, s14
; GFX8-NEXT: s_bfe_i32 s15, s4, 0x40014 ; GFX8-NEXT: s_bfe_i32 s16, s4, 0x40014
; GFX8-NEXT: s_bfe_i32 s17, s4, 0x40018 ; GFX8-NEXT: s_bfe_i32 s18, s4, 0x40018
; GFX8-NEXT: v_mad_i32_i24 v2, s12, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s13, v1, v0
; GFX8-NEXT: s_bfe_i32 s14, s2, 0x40014 ; GFX8-NEXT: s_bfe_i32 s15, s2, 0x40014
; GFX8-NEXT: v_mov_b32_e32 v3, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s16
; GFX8-NEXT: s_bfe_i32 s16, s2, 0x40018 ; GFX8-NEXT: s_bfe_i32 s17, s2, 0x40018
; GFX8-NEXT: v_mad_i32_i24 v2, s14, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s15, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s17 ; GFX8-NEXT: v_mov_b32_e32 v1, s18
; GFX8-NEXT: s_ashr_i32 s4, s4, 28 ; GFX8-NEXT: s_ashr_i32 s4, s4, 28
; GFX8-NEXT: v_mad_i32_i24 v2, s16, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s17, v1, v0
; GFX8-NEXT: s_ashr_i32 s2, s2, 28 ; GFX8-NEXT: s_ashr_i32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_acc32: ; GFX9-LABEL: idot8_acc32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX9-NEXT: s_bfe_i32 s5, s2, 0x40000
; GFX9-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX9-NEXT: s_bfe_i32 s6, s4, 0x40000
; GFX9-NEXT: s_bfe_i32 s7, s4, 0x40004 ; GFX9-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-NEXT: v_mad_i32_i24 v0, s5, v0, v1
; GFX9-NEXT: s_bfe_i32 s6, s2, 0x40004 ; GFX9-NEXT: s_bfe_i32 s7, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NEXT: s_bfe_i32 s9, s4, 0x40008 ; GFX9-NEXT: s_bfe_i32 s10, s4, 0x40008
; GFX9-NEXT: v_mad_i32_i24 v2, s6, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s7, v1, v0
; GFX9-NEXT: s_bfe_i32 s8, s2, 0x40008 ; GFX9-NEXT: s_bfe_i32 s9, s2, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NEXT: s_bfe_i32 s11, s4, 0x4000c ; GFX9-NEXT: s_bfe_i32 s12, s4, 0x4000c
; GFX9-NEXT: v_mad_i32_i24 v2, s8, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s9, v1, v0
; GFX9-NEXT: s_bfe_i32 s10, s2, 0x4000c ; GFX9-NEXT: s_bfe_i32 s11, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s12
; GFX9-NEXT: s_bfe_i32 s13, s4, 0x40010 ; GFX9-NEXT: s_bfe_i32 s14, s4, 0x40010
; GFX9-NEXT: v_mad_i32_i24 v2, s10, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s11, v1, v0
; GFX9-NEXT: s_bfe_i32 s12, s2, 0x40010 ; GFX9-NEXT: s_bfe_i32 s13, s2, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v1, s14
; GFX9-NEXT: s_bfe_i32 s15, s4, 0x40014 ; GFX9-NEXT: s_bfe_i32 s16, s4, 0x40014
; GFX9-NEXT: s_bfe_i32 s17, s4, 0x40018 ; GFX9-NEXT: s_bfe_i32 s18, s4, 0x40018
; GFX9-NEXT: v_mad_i32_i24 v2, s12, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s13, v1, v0
; GFX9-NEXT: s_bfe_i32 s14, s2, 0x40014 ; GFX9-NEXT: s_bfe_i32 s15, s2, 0x40014
; GFX9-NEXT: v_mov_b32_e32 v3, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s16
; GFX9-NEXT: s_bfe_i32 s16, s2, 0x40018 ; GFX9-NEXT: s_bfe_i32 s17, s2, 0x40018
; GFX9-NEXT: v_mad_i32_i24 v2, s14, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s15, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s17 ; GFX9-NEXT: v_mov_b32_e32 v1, s18
; GFX9-NEXT: s_ashr_i32 s4, s4, 28 ; GFX9-NEXT: s_ashr_i32 s4, s4, 28
; GFX9-NEXT: v_mad_i32_i24 v2, s16, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s17, v1, v0
; GFX9-NEXT: s_ashr_i32 s2, s2, 28 ; GFX9-NEXT: s_ashr_i32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s4
; GFX9-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s2, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_acc32: ; GFX9-DL-LABEL: idot8_acc32:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s6
; GFX9-DL-NEXT: v_dot8_i32_i4 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_dot8_i32_i4 v2, s4, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_acc32: ; GFX10-DL-LABEL: idot8_acc32:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot8_i32_i4 v2, s4, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX10-DL-NEXT: v_dot8_i32_i4 v2, s2, s4, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_acc16: ; GFX8-LABEL: idot8_acc16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX8-NEXT: s_bfe_i32 s1, s2, 0x40000
; GFX8-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX8-NEXT: s_bfe_i32 s4, s2, 0x40004
; GFX8-NEXT: s_bfe_i32 s5, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_i32 s5, s4, 0x40004 ; GFX8-NEXT: s_bfe_i32 s6, s0, 0x40000
; GFX8-NEXT: s_bfe_i32 s6, s4, 0x40008 ; GFX8-NEXT: s_lshr_b32 s1, s0, 12
; GFX8-NEXT: s_lshr_b32 s1, s2, 12 ; GFX8-NEXT: s_lshr_b32 s7, s2, 12
; GFX8-NEXT: s_lshr_b32 s7, s4, 12 ; GFX8-NEXT: v_mov_b32_e32 v4, s5
; GFX8-NEXT: s_bfe_i32 s8, s2, 0x40004 ; GFX8-NEXT: s_bfe_i32 s9, s0, 0x40008
; GFX8-NEXT: s_bfe_i32 s9, s2, 0x40008 ; GFX8-NEXT: v_mov_b32_e32 v5, s4
; GFX8-NEXT: v_mov_b32_e32 v4, s6 ; GFX8-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v7, s5 ; GFX8-NEXT: v_lshlrev_b16_e64 v6, 12, s1
; GFX8-NEXT: v_lshlrev_b16_e64 v5, 12, s1 ; GFX8-NEXT: v_lshlrev_b16_e64 v7, 12, s7
; GFX8-NEXT: v_lshlrev_b16_e64 v6, 12, s7
; GFX8-NEXT: v_mul_i32_i24_e32 v4, s9, v4 ; GFX8-NEXT: v_mul_i32_i24_e32 v4, s9, v4
; GFX8-NEXT: s_bfe_i32 s10, s4, 0x40010 ; GFX8-NEXT: s_bfe_i32 s1, s2, 0x40010
; GFX8-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX8-NEXT: v_ashrrev_i16_e32 v6, 12, v6 ; GFX8-NEXT: v_ashrrev_i16_e32 v6, 12, v6
; GFX8-NEXT: s_bfe_i32 s12, s4, 0x40014 ; GFX8-NEXT: v_ashrrev_i16_e32 v7, 12, v7
; GFX8-NEXT: s_bfe_i32 s11, s2, 0x40010 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x40014
; GFX8-NEXT: v_mov_b32_e32 v8, s10 ; GFX8-NEXT: v_mov_b32_e32 v8, s1
; GFX8-NEXT: s_bfe_i32 s14, s4, 0x40018 ; GFX8-NEXT: s_bfe_i32 s4, s0, 0x40010
; GFX8-NEXT: s_bfe_i32 s13, s2, 0x40014 ; GFX8-NEXT: s_bfe_i32 s7, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v9, s12 ; GFX8-NEXT: v_mov_b32_e32 v9, s5
; GFX8-NEXT: s_bfe_i32 s15, s2, 0x40018 ; GFX8-NEXT: s_bfe_i32 s1, s0, 0x40014
; GFX8-NEXT: s_ashr_i32 s4, s4, 28 ; GFX8-NEXT: s_bfe_i32 s5, s0, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v10, s14
; GFX8-NEXT: s_ashr_i32 s2, s2, 28 ; GFX8-NEXT: s_ashr_i32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v10, s7
; GFX8-NEXT: s_ashr_i32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s6, v3, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s8, v5, v2
; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX8-NEXT: v_mad_u32_u24 v2, v5, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v6, v7, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s11, v8, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s4, v8, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s13, v9, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s1, v9, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s15, v10, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s5, v10, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_acc16: ; GFX9-LABEL: idot8_acc16:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX9-NEXT: s_bfe_i32 s1, s2, 0x40000
; GFX9-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX9-NEXT: s_bfe_i32 s4, s2, 0x40004
; GFX9-NEXT: s_bfe_i32 s5, s2, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_i32 s5, s4, 0x40004 ; GFX9-NEXT: s_bfe_i32 s6, s0, 0x40000
; GFX9-NEXT: s_bfe_i32 s6, s4, 0x40008 ; GFX9-NEXT: s_lshr_b32 s1, s0, 12
; GFX9-NEXT: s_lshr_b32 s1, s2, 12 ; GFX9-NEXT: s_lshr_b32 s7, s2, 12
; GFX9-NEXT: s_lshr_b32 s7, s4, 12 ; GFX9-NEXT: v_mov_b32_e32 v4, s5
; GFX9-NEXT: s_bfe_i32 s8, s2, 0x40004 ; GFX9-NEXT: s_bfe_i32 s9, s0, 0x40008
; GFX9-NEXT: s_bfe_i32 s9, s2, 0x40008 ; GFX9-NEXT: v_mov_b32_e32 v5, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s6 ; GFX9-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v7, s5 ; GFX9-NEXT: v_lshlrev_b16_e64 v6, 12, s1
; GFX9-NEXT: v_lshlrev_b16_e64 v5, 12, s1 ; GFX9-NEXT: v_lshlrev_b16_e64 v7, 12, s7
; GFX9-NEXT: v_lshlrev_b16_e64 v6, 12, s7
; GFX9-NEXT: v_mul_i32_i24_e32 v4, s9, v4 ; GFX9-NEXT: v_mul_i32_i24_e32 v4, s9, v4
; GFX9-NEXT: s_bfe_i32 s10, s4, 0x40010 ; GFX9-NEXT: s_bfe_i32 s1, s2, 0x40010
; GFX9-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX9-NEXT: v_ashrrev_i16_e32 v6, 12, v6 ; GFX9-NEXT: v_ashrrev_i16_e32 v6, 12, v6
; GFX9-NEXT: s_bfe_i32 s12, s4, 0x40014 ; GFX9-NEXT: v_ashrrev_i16_e32 v7, 12, v7
; GFX9-NEXT: s_bfe_i32 s11, s2, 0x40010 ; GFX9-NEXT: s_bfe_i32 s5, s2, 0x40014
; GFX9-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-NEXT: v_mov_b32_e32 v8, s1
; GFX9-NEXT: s_bfe_i32 s14, s4, 0x40018 ; GFX9-NEXT: s_bfe_i32 s4, s0, 0x40010
; GFX9-NEXT: s_bfe_i32 s13, s2, 0x40014 ; GFX9-NEXT: s_bfe_i32 s7, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-NEXT: v_mov_b32_e32 v9, s5
; GFX9-NEXT: s_bfe_i32 s15, s2, 0x40018 ; GFX9-NEXT: s_bfe_i32 s1, s0, 0x40014
; GFX9-NEXT: s_ashr_i32 s4, s4, 28 ; GFX9-NEXT: s_bfe_i32 s5, s0, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v10, s14
; GFX9-NEXT: s_ashr_i32 s2, s2, 28 ; GFX9-NEXT: s_ashr_i32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v10, s7
; GFX9-NEXT: s_ashr_i32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s6, v3, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s8, v5, v2
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-NEXT: v_mad_u32_u24 v2, v5, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, v6, v7, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s11, v8, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s4, v8, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s13, v9, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s1, v9, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s15, v10, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s5, v10, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_acc16: ; GFX9-DL-LABEL: idot8_acc16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX9-DL-NEXT: s_bfe_i32 s1, s2, 0x40000
; GFX9-DL-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX9-DL-NEXT: s_bfe_i32 s4, s2, 0x40004
; GFX9-DL-NEXT: s_bfe_i32 s5, s2, 0x40008
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_i32 s5, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s6, s0, 0x40000
; GFX9-DL-NEXT: s_bfe_i32 s6, s4, 0x40008 ; GFX9-DL-NEXT: s_lshr_b32 s1, s0, 12
; GFX9-DL-NEXT: s_lshr_b32 s1, s2, 12 ; GFX9-DL-NEXT: s_lshr_b32 s7, s2, 12
; GFX9-DL-NEXT: s_lshr_b32 s7, s4, 12 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5
; GFX9-DL-NEXT: s_bfe_i32 s8, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s9, s0, 0x40008
; GFX9-DL-NEXT: s_bfe_i32 s9, s2, 0x40008 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s6 ; GFX9-DL-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s5 ; GFX9-DL-NEXT: v_lshlrev_b16_e64 v6, 12, s1
; GFX9-DL-NEXT: v_lshlrev_b16_e64 v5, 12, s1 ; GFX9-DL-NEXT: v_lshlrev_b16_e64 v7, 12, s7
; GFX9-DL-NEXT: v_lshlrev_b16_e64 v6, 12, s7
; GFX9-DL-NEXT: v_mul_i32_i24_e32 v4, s9, v4 ; GFX9-DL-NEXT: v_mul_i32_i24_e32 v4, s9, v4
; GFX9-DL-NEXT: s_bfe_i32 s10, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s1, s2, 0x40010
; GFX9-DL-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX9-DL-NEXT: v_ashrrev_i16_e32 v6, 12, v6 ; GFX9-DL-NEXT: v_ashrrev_i16_e32 v6, 12, v6
; GFX9-DL-NEXT: s_bfe_i32 s12, s4, 0x40014 ; GFX9-DL-NEXT: v_ashrrev_i16_e32 v7, 12, v7
; GFX9-DL-NEXT: s_bfe_i32 s11, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s5, s2, 0x40014
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s1
; GFX9-DL-NEXT: s_bfe_i32 s14, s4, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s4, s0, 0x40010
; GFX9-DL-NEXT: s_bfe_i32 s13, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_i32 s7, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-DL-NEXT: v_mov_b32_e32 v9, s5
; GFX9-DL-NEXT: s_bfe_i32 s15, s2, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s1, s0, 0x40014
; GFX9-DL-NEXT: s_ashr_i32 s4, s4, 28 ; GFX9-DL-NEXT: s_bfe_i32 s5, s0, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v10, s14
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 28 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v10, s7
; GFX9-DL-NEXT: s_ashr_i32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v3, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v5, v2
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-DL-NEXT: v_mad_u32_u24 v2, v5, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, v6, v7, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s11, v8, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s4, v8, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s13, v9, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s1, v9, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s15, v10, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s5, v10, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_acc16: ; GFX10-DL-LABEL: idot8_acc16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 12 ; GFX10-DL-NEXT: s_lshr_b32 s4, s0, 12
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 12 ; GFX10-DL-NEXT: s_lshr_b32 s5, s1, 12
; GFX10-DL-NEXT: s_bfe_i32 s6, s4, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s6, s0, 0x40000
; GFX10-DL-NEXT: s_bfe_i32 s7, s5, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s7, s1, 0x40000
; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s0 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s1 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s5
; GFX10-DL-NEXT: s_bfe_i32 s9, s5, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s9, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_i32 s10, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_i32 s10, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_i32 s11, s5, 0x40008 ; GFX10-DL-NEXT: s_bfe_i32 s11, s1, 0x40008
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4
; GFX10-DL-NEXT: s_bfe_i32 s0, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s4, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s1, s5, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s5, s0, 0x40014
; GFX10-DL-NEXT: v_mul_i32_i24_e64 v5, s10, s11 ; GFX10-DL-NEXT: v_mul_i32_i24_e64 v5, s10, s11
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX10-DL-NEXT: v_and_b32_e32 v4, s2, v4
; GFX10-DL-NEXT: s_bfe_i32 s10, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_i32 s2, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s11, s5, 0x40014
; GFX10-DL-NEXT: s_bfe_i32 s12, s4, 0x40018
; GFX10-DL-NEXT: s_bfe_i32 s2, s5, 0x40018
; GFX10-DL-NEXT: s_ashr_i32 s4, s4, 28
; GFX10-DL-NEXT: s_ashr_i32 s5, s5, 28
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s6, s7, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s6, s7, v2
; GFX10-DL-NEXT: s_bfe_i32 s6, s1, 0x40014
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s9, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s9, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, v3, v4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, v3, v4, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_i32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_i32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_ashr_i32 s0, s0, 28
; GFX10-DL-NEXT: s_ashr_i32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s10, s11, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s12, s2, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i16 addrspace(1)* nocapture %dst) { i16 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_acc8: ; GFX8-LABEL: idot8_acc8:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_movk_i32 s2, 0xff ; GFX8-NEXT: s_movk_i32 s2, 0xff
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s4, s0, 12 ; GFX8-NEXT: s_bfe_i32 s7, s6, 0x40000
; GFX8-NEXT: s_bfe_i32 s7, s1, 0x40000 ; GFX8-NEXT: s_lshr_b32 s4, s6, 12
; GFX8-NEXT: s_lshr_b32 s5, s1, 12 ; GFX8-NEXT: s_bfe_i32 s9, s6, 0x40004
; GFX8-NEXT: s_bfe_i32 s9, s1, 0x40004 ; GFX8-NEXT: s_bfe_i32 s11, s6, 0x40008
; GFX8-NEXT: s_bfe_i32 s11, s1, 0x40008 ; GFX8-NEXT: s_lshr_b32 s1, s0, 12
; GFX8-NEXT: s_bfe_i32 s6, s0, 0x40000 ; GFX8-NEXT: s_bfe_i32 s5, s0, 0x40000
; GFX8-NEXT: v_mov_b32_e32 v6, s7 ; GFX8-NEXT: v_mov_b32_e32 v6, s7
; GFX8-NEXT: v_lshlrev_b16_e64 v4, 12, s4 ; GFX8-NEXT: v_lshlrev_b16_e64 v4, 12, s1
; GFX8-NEXT: v_lshlrev_b16_e64 v5, 12, s5 ; GFX8-NEXT: v_lshlrev_b16_e64 v5, 12, s4
; GFX8-NEXT: s_bfe_i32 s8, s0, 0x40004 ; GFX8-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX8-NEXT: s_bfe_i32 s10, s0, 0x40008 ; GFX8-NEXT: s_bfe_i32 s10, s0, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_mov_b32_e32 v7, s9 ; GFX8-NEXT: v_mov_b32_e32 v7, s9
; GFX8-NEXT: v_ashrrev_i16_e32 v4, 12, v4 ; GFX8-NEXT: v_ashrrev_i16_e32 v4, 12, v4
; GFX8-NEXT: v_ashrrev_i16_e32 v5, 12, v5 ; GFX8-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX8-NEXT: v_mul_i32_i24_e32 v3, s10, v3 ; GFX8-NEXT: v_mul_i32_i24_e32 v3, s10, v3
; GFX8-NEXT: s_bfe_i32 s13, s1, 0x40010 ; GFX8-NEXT: s_bfe_i32 s13, s6, 0x40010
; GFX8-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX8-NEXT: v_and_b32_e32 v4, s2, v4
; GFX8-NEXT: v_and_b32_e32 v5, s2, v5 ; GFX8-NEXT: v_and_b32_e32 v5, s2, v5
; GFX8-NEXT: s_bfe_i32 s15, s1, 0x40014 ; GFX8-NEXT: s_bfe_i32 s15, s6, 0x40014
; GFX8-NEXT: s_bfe_i32 s12, s0, 0x40010 ; GFX8-NEXT: s_bfe_i32 s12, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v8, s13 ; GFX8-NEXT: v_mov_b32_e32 v8, s13
; GFX8-NEXT: s_bfe_i32 s17, s1, 0x40018 ; GFX8-NEXT: s_bfe_i32 s17, s6, 0x40018
; GFX8-NEXT: s_bfe_i32 s14, s0, 0x40014 ; GFX8-NEXT: s_bfe_i32 s14, s0, 0x40014
; GFX8-NEXT: v_mov_b32_e32 v9, s15 ; GFX8-NEXT: v_mov_b32_e32 v9, s15
; GFX8-NEXT: s_bfe_i32 s16, s0, 0x40018 ; GFX8-NEXT: s_bfe_i32 s16, s0, 0x40018
; GFX8-NEXT: s_ashr_i32 s1, s1, 28 ; GFX8-NEXT: s_ashr_i32 s6, s6, 28
; GFX8-NEXT: v_mov_b32_e32 v10, s17 ; GFX8-NEXT: v_mov_b32_e32 v10, s17
; GFX8-NEXT: s_ashr_i32 s0, s0, 28 ; GFX8-NEXT: s_ashr_i32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_i32_i24 v2, s6, v6, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s5, v6, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s8, v7, v2
; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 ; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX8-NEXT: v_mad_u32_u24 v2, v4, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v4, v5, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s12, v8, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s12, v8, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s14, v9, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s14, v9, v2
; GFX8-NEXT: v_mad_i32_i24 v2, s16, v10, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s16, v10, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s6
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_acc8: ; GFX9-LABEL: idot8_acc8:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_movk_i32 s2, 0xff ; GFX9-NEXT: s_movk_i32 s2, 0xff
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_lshr_b32 s4, s0, 12 ; GFX9-NEXT: s_bfe_i32 s7, s6, 0x40000
; GFX9-NEXT: s_bfe_i32 s7, s1, 0x40000 ; GFX9-NEXT: s_lshr_b32 s4, s6, 12
; GFX9-NEXT: s_lshr_b32 s5, s1, 12 ; GFX9-NEXT: s_bfe_i32 s9, s6, 0x40004
; GFX9-NEXT: s_bfe_i32 s9, s1, 0x40004 ; GFX9-NEXT: s_bfe_i32 s11, s6, 0x40008
; GFX9-NEXT: s_bfe_i32 s11, s1, 0x40008 ; GFX9-NEXT: s_lshr_b32 s1, s0, 12
; GFX9-NEXT: s_bfe_i32 s6, s0, 0x40000 ; GFX9-NEXT: s_bfe_i32 s5, s0, 0x40000
; GFX9-NEXT: v_mov_b32_e32 v6, s7 ; GFX9-NEXT: v_mov_b32_e32 v6, s7
; GFX9-NEXT: v_lshlrev_b16_e64 v4, 12, s4 ; GFX9-NEXT: v_lshlrev_b16_e64 v4, 12, s1
; GFX9-NEXT: v_lshlrev_b16_e64 v5, 12, s5 ; GFX9-NEXT: v_lshlrev_b16_e64 v5, 12, s4
; GFX9-NEXT: s_bfe_i32 s8, s0, 0x40004 ; GFX9-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX9-NEXT: s_bfe_i32 s10, s0, 0x40008 ; GFX9-NEXT: s_bfe_i32 s10, s0, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-NEXT: v_mov_b32_e32 v7, s9
; GFX9-NEXT: v_ashrrev_i16_e32 v4, 12, v4 ; GFX9-NEXT: v_ashrrev_i16_e32 v4, 12, v4
; GFX9-NEXT: v_ashrrev_i16_e32 v5, 12, v5 ; GFX9-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX9-NEXT: v_mul_i32_i24_e32 v3, s10, v3 ; GFX9-NEXT: v_mul_i32_i24_e32 v3, s10, v3
; GFX9-NEXT: s_bfe_i32 s13, s1, 0x40010 ; GFX9-NEXT: s_bfe_i32 s13, s6, 0x40010
; GFX9-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX9-NEXT: v_and_b32_e32 v4, s2, v4
; GFX9-NEXT: v_and_b32_e32 v5, s2, v5 ; GFX9-NEXT: v_and_b32_e32 v5, s2, v5
; GFX9-NEXT: s_bfe_i32 s15, s1, 0x40014 ; GFX9-NEXT: s_bfe_i32 s15, s6, 0x40014
; GFX9-NEXT: s_bfe_i32 s12, s0, 0x40010 ; GFX9-NEXT: s_bfe_i32 s12, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v8, s13 ; GFX9-NEXT: v_mov_b32_e32 v8, s13
; GFX9-NEXT: s_bfe_i32 s17, s1, 0x40018 ; GFX9-NEXT: s_bfe_i32 s17, s6, 0x40018
; GFX9-NEXT: s_bfe_i32 s14, s0, 0x40014 ; GFX9-NEXT: s_bfe_i32 s14, s0, 0x40014
; GFX9-NEXT: v_mov_b32_e32 v9, s15 ; GFX9-NEXT: v_mov_b32_e32 v9, s15
; GFX9-NEXT: s_bfe_i32 s16, s0, 0x40018 ; GFX9-NEXT: s_bfe_i32 s16, s0, 0x40018
; GFX9-NEXT: s_ashr_i32 s1, s1, 28 ; GFX9-NEXT: s_ashr_i32 s6, s6, 28
; GFX9-NEXT: v_mov_b32_e32 v10, s17 ; GFX9-NEXT: v_mov_b32_e32 v10, s17
; GFX9-NEXT: s_ashr_i32 s0, s0, 28 ; GFX9-NEXT: s_ashr_i32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_i32_i24 v2, s6, v6, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s5, v6, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s8, v7, v2
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-NEXT: v_mad_u32_u24 v2, v4, v5, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, v4, v5, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s12, v8, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s12, v8, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s14, v9, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s14, v9, v2
; GFX9-NEXT: v_mad_i32_i24 v2, s16, v10, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s16, v10, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s6
; GFX9-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_acc8: ; GFX9-DL-LABEL: idot8_acc8:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_movk_i32 s2, 0xff ; GFX9-DL-NEXT: s_movk_i32 s2, 0xff
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_lshr_b32 s4, s0, 12 ; GFX9-DL-NEXT: s_bfe_i32 s7, s6, 0x40000
; GFX9-DL-NEXT: s_bfe_i32 s7, s1, 0x40000 ; GFX9-DL-NEXT: s_lshr_b32 s4, s6, 12
; GFX9-DL-NEXT: s_lshr_b32 s5, s1, 12 ; GFX9-DL-NEXT: s_bfe_i32 s9, s6, 0x40004
; GFX9-DL-NEXT: s_bfe_i32 s9, s1, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s11, s6, 0x40008
; GFX9-DL-NEXT: s_bfe_i32 s11, s1, 0x40008 ; GFX9-DL-NEXT: s_lshr_b32 s1, s0, 12
; GFX9-DL-NEXT: s_bfe_i32 s6, s0, 0x40000 ; GFX9-DL-NEXT: s_bfe_i32 s5, s0, 0x40000
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v6, s7
; GFX9-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s4 ; GFX9-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s1
; GFX9-DL-NEXT: v_lshlrev_b16_e64 v5, 12, s5 ; GFX9-DL-NEXT: v_lshlrev_b16_e64 v5, 12, s4
; GFX9-DL-NEXT: s_bfe_i32 s8, s0, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_i32 s10, s0, 0x40008 ; GFX9-DL-NEXT: s_bfe_i32 s10, s0, 0x40008
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s11
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s9
; GFX9-DL-NEXT: v_ashrrev_i16_e32 v4, 12, v4 ; GFX9-DL-NEXT: v_ashrrev_i16_e32 v4, 12, v4
; GFX9-DL-NEXT: v_ashrrev_i16_e32 v5, 12, v5 ; GFX9-DL-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX9-DL-NEXT: v_mul_i32_i24_e32 v3, s10, v3 ; GFX9-DL-NEXT: v_mul_i32_i24_e32 v3, s10, v3
; GFX9-DL-NEXT: s_bfe_i32 s13, s1, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s13, s6, 0x40010
; GFX9-DL-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX9-DL-NEXT: v_and_b32_e32 v4, s2, v4
; GFX9-DL-NEXT: v_and_b32_e32 v5, s2, v5 ; GFX9-DL-NEXT: v_and_b32_e32 v5, s2, v5
; GFX9-DL-NEXT: s_bfe_i32 s15, s1, 0x40014 ; GFX9-DL-NEXT: s_bfe_i32 s15, s6, 0x40014
; GFX9-DL-NEXT: s_bfe_i32 s12, s0, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s12, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s13
; GFX9-DL-NEXT: s_bfe_i32 s17, s1, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s17, s6, 0x40018
; GFX9-DL-NEXT: s_bfe_i32 s14, s0, 0x40014 ; GFX9-DL-NEXT: s_bfe_i32 s14, s0, 0x40014
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s15 ; GFX9-DL-NEXT: v_mov_b32_e32 v9, s15
; GFX9-DL-NEXT: s_bfe_i32 s16, s0, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s16, s0, 0x40018
; GFX9-DL-NEXT: s_ashr_i32 s1, s1, 28 ; GFX9-DL-NEXT: s_ashr_i32 s6, s6, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v10, s17 ; GFX9-DL-NEXT: v_mov_b32_e32 v10, s17
; GFX9-DL-NEXT: s_ashr_i32 s0, s0, 28 ; GFX9-DL-NEXT: s_ashr_i32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v6, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s5, v6, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v7, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v7, v2
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX9-DL-NEXT: v_mad_u32_u24 v2, v4, v5, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, v4, v5, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s12, v8, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s12, v8, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s14, v9, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s14, v9, v2
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s16, v10, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s16, v10, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s6
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_acc8: ; GFX10-DL-LABEL: idot8_acc8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_movk_i32 s2, 0xff ; GFX10-DL-NEXT: s_movk_i32 s2, 0xff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 12 ; GFX10-DL-NEXT: s_lshr_b32 s4, s0, 12
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 12 ; GFX10-DL-NEXT: s_lshr_b32 s5, s1, 12
; GFX10-DL-NEXT: s_bfe_i32 s6, s4, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s6, s0, 0x40000
; GFX10-DL-NEXT: s_bfe_i32 s7, s5, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s7, s1, 0x40000
; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s8, s0, 0x40004
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s0 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s1 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s5
; GFX10-DL-NEXT: s_bfe_i32 s9, s5, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s9, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_i32 s10, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_i32 s10, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_i32 s11, s5, 0x40008 ; GFX10-DL-NEXT: s_bfe_i32 s11, s1, 0x40008
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4
; GFX10-DL-NEXT: s_bfe_i32 s0, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s4, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s1, s5, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s5, s0, 0x40014
; GFX10-DL-NEXT: v_mul_i32_i24_e64 v5, s10, s11 ; GFX10-DL-NEXT: v_mul_i32_i24_e64 v5, s10, s11
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX10-DL-NEXT: v_and_b32_e32 v4, s2, v4
; GFX10-DL-NEXT: s_bfe_i32 s10, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_i32 s2, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s11, s5, 0x40014
; GFX10-DL-NEXT: s_bfe_i32 s12, s4, 0x40018
; GFX10-DL-NEXT: s_bfe_i32 s2, s5, 0x40018
; GFX10-DL-NEXT: s_ashr_i32 s4, s4, 28
; GFX10-DL-NEXT: s_ashr_i32 s5, s5, 28
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s6, s7, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s6, s7, v2
; GFX10-DL-NEXT: s_bfe_i32 s6, s1, 0x40014
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s9, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s9, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_0
; GFX10-DL-NEXT: v_mad_u32_u24 v2, v3, v4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, v3, v4, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_i32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_i32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_ashr_i32 s0, s0, 28
; GFX10-DL-NEXT: s_ashr_i32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s10, s11, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s12, s2, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s5, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i8 addrspace(1)* nocapture %dst) { i8 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s21, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_bfe_i32 s8, s0, 0x40000 ; GFX7-NEXT: s_bfe_i32 s2, s0, 0x40000
; GFX7-NEXT: s_bfe_i32 s9, s1, 0x40000 ; GFX7-NEXT: s_bfe_i32 s8, s1, 0x40000
; GFX7-NEXT: v_mov_b32_e32 v0, s9 ; GFX7-NEXT: v_mov_b32_e32 v0, s8
; GFX7-NEXT: v_mov_b32_e32 v1, s2 ; GFX7-NEXT: v_mov_b32_e32 v1, s21
; GFX7-NEXT: v_mad_i32_i24 v1, s8, v0, v1 ; GFX7-NEXT: v_mad_i32_i24 v1, s2, v0, v1
; GFX7-NEXT: s_bfe_i32 s11, s1, 0x40004 ; GFX7-NEXT: s_bfe_i32 s10, s1, 0x40004
; GFX7-NEXT: s_bfe_i32 s10, s0, 0x40004 ; GFX7-NEXT: s_bfe_i32 s9, s0, 0x40004
; GFX7-NEXT: s_bfe_i32 s13, s1, 0x40008 ; GFX7-NEXT: s_bfe_i32 s12, s1, 0x40008
; GFX7-NEXT: v_mad_i32_i24 v0, s8, v0, v1 ; GFX7-NEXT: v_mad_i32_i24 v0, s2, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s11 ; GFX7-NEXT: v_mov_b32_e32 v2, s10
; GFX7-NEXT: v_mad_i32_i24 v0, s10, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s9, v2, v0
; GFX7-NEXT: s_bfe_i32 s12, s0, 0x40008 ; GFX7-NEXT: s_bfe_i32 s11, s0, 0x40008
; GFX7-NEXT: v_mov_b32_e32 v2, s13 ; GFX7-NEXT: v_mov_b32_e32 v2, s12
; GFX7-NEXT: s_bfe_i32 s15, s1, 0x4000c ; GFX7-NEXT: s_bfe_i32 s14, s1, 0x4000c
; GFX7-NEXT: v_mad_i32_i24 v0, s12, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s11, v2, v0
; GFX7-NEXT: s_bfe_i32 s14, s0, 0x4000c ; GFX7-NEXT: s_bfe_i32 s13, s0, 0x4000c
; GFX7-NEXT: v_mov_b32_e32 v2, s15 ; GFX7-NEXT: v_mov_b32_e32 v2, s14
; GFX7-NEXT: s_bfe_i32 s17, s1, 0x40010 ; GFX7-NEXT: s_bfe_i32 s16, s1, 0x40010
; GFX7-NEXT: v_mad_i32_i24 v0, s14, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s13, v2, v0
; GFX7-NEXT: s_bfe_i32 s16, s0, 0x40010 ; GFX7-NEXT: s_bfe_i32 s15, s0, 0x40010
; GFX7-NEXT: v_mov_b32_e32 v2, s17 ; GFX7-NEXT: v_mov_b32_e32 v2, s16
; GFX7-NEXT: s_bfe_i32 s19, s1, 0x40014 ; GFX7-NEXT: s_bfe_i32 s18, s1, 0x40014
; GFX7-NEXT: s_bfe_i32 s21, s1, 0x40018 ; GFX7-NEXT: s_bfe_i32 s20, s1, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s16, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s15, v2, v0
; GFX7-NEXT: s_bfe_i32 s18, s0, 0x40014 ; GFX7-NEXT: s_bfe_i32 s17, s0, 0x40014
; GFX7-NEXT: v_mov_b32_e32 v2, s19 ; GFX7-NEXT: v_mov_b32_e32 v2, s18
; GFX7-NEXT: s_bfe_i32 s20, s0, 0x40018 ; GFX7-NEXT: s_bfe_i32 s19, s0, 0x40018
; GFX7-NEXT: v_mad_i32_i24 v0, s18, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s17, v2, v0
; GFX7-NEXT: v_mov_b32_e32 v2, s21 ; GFX7-NEXT: v_mov_b32_e32 v2, s20
; GFX7-NEXT: s_ashr_i32 s1, s1, 28 ; GFX7-NEXT: s_ashr_i32 s1, s1, 28
; GFX7-NEXT: v_mad_i32_i24 v0, s20, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s19, v2, v0
; GFX7-NEXT: s_ashr_i32 s0, s0, 28 ; GFX7-NEXT: s_ashr_i32 s0, s0, 28
; GFX7-NEXT: v_mov_b32_e32 v2, s1 ; GFX7-NEXT: v_mov_b32_e32 v2, s1
; GFX7-NEXT: v_mad_i32_i24 v0, s0, v2, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s0, v2, v0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, v0, v1
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_multiuses_mul1: ; GFX8-LABEL: idot8_multiuses_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX8-NEXT: s_bfe_i32 s5, s2, 0x40000
; GFX8-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX8-NEXT: s_bfe_i32 s6, s4, 0x40000
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v1, s5, v0, v1
; GFX8-NEXT: s_bfe_i32 s7, s4, 0x40004 ; GFX8-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX8-NEXT: s_bfe_i32 s6, s2, 0x40004 ; GFX8-NEXT: s_bfe_i32 s7, s2, 0x40004
; GFX8-NEXT: s_bfe_i32 s9, s4, 0x40008 ; GFX8-NEXT: s_bfe_i32 s10, s4, 0x40008
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX8-NEXT: v_mad_i32_i24 v0, s5, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s7 ; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: v_mad_i32_i24 v2, s6, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s7, v2, v0
; GFX8-NEXT: s_bfe_i32 s8, s2, 0x40008 ; GFX8-NEXT: s_bfe_i32 s9, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v4, s9 ; GFX8-NEXT: v_mov_b32_e32 v2, s10
; GFX8-NEXT: s_bfe_i32 s11, s4, 0x4000c ; GFX8-NEXT: s_bfe_i32 s12, s4, 0x4000c
; GFX8-NEXT: v_mad_i32_i24 v2, s8, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s9, v2, v0
; GFX8-NEXT: s_bfe_i32 s10, s2, 0x4000c ; GFX8-NEXT: s_bfe_i32 s11, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v4, s11 ; GFX8-NEXT: v_mov_b32_e32 v2, s12
; GFX8-NEXT: s_bfe_i32 s13, s4, 0x40010 ; GFX8-NEXT: s_bfe_i32 s14, s4, 0x40010
; GFX8-NEXT: v_mad_i32_i24 v2, s10, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s11, v2, v0
; GFX8-NEXT: s_bfe_i32 s12, s2, 0x40010 ; GFX8-NEXT: s_bfe_i32 s13, s2, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v4, s13 ; GFX8-NEXT: v_mov_b32_e32 v2, s14
; GFX8-NEXT: s_bfe_i32 s15, s4, 0x40014 ; GFX8-NEXT: s_bfe_i32 s16, s4, 0x40014
; GFX8-NEXT: s_bfe_i32 s17, s4, 0x40018 ; GFX8-NEXT: s_bfe_i32 s18, s4, 0x40018
; GFX8-NEXT: v_mad_i32_i24 v2, s12, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s13, v2, v0
; GFX8-NEXT: s_bfe_i32 s14, s2, 0x40014 ; GFX8-NEXT: s_bfe_i32 s15, s2, 0x40014
; GFX8-NEXT: v_mov_b32_e32 v4, s15 ; GFX8-NEXT: v_mov_b32_e32 v2, s16
; GFX8-NEXT: s_bfe_i32 s16, s2, 0x40018 ; GFX8-NEXT: s_bfe_i32 s17, s2, 0x40018
; GFX8-NEXT: v_mad_i32_i24 v2, s14, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s15, v2, v0
; GFX8-NEXT: v_mov_b32_e32 v4, s17 ; GFX8-NEXT: v_mov_b32_e32 v2, s18
; GFX8-NEXT: s_ashr_i32 s4, s4, 28 ; GFX8-NEXT: s_ashr_i32 s4, s4, 28
; GFX8-NEXT: v_mad_i32_i24 v2, s16, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s17, v2, v0
; GFX8-NEXT: s_ashr_i32 s2, s2, 28 ; GFX8-NEXT: s_ashr_i32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mad_i32_i24 v2, s2, v4, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s2, v2, v0
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v3 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_multiuses_mul1: ; GFX9-LABEL: idot8_multiuses_mul1:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX9-NEXT: s_bfe_i32 s5, s2, 0x40000
; GFX9-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX9-NEXT: s_bfe_i32 s6, s4, 0x40000
; GFX9-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX9-NEXT: v_mad_i32_i24 v1, s5, v0, v1
; GFX9-NEXT: s_bfe_i32 s7, s4, 0x40004 ; GFX9-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX9-NEXT: s_bfe_i32 s6, s2, 0x40004 ; GFX9-NEXT: s_bfe_i32 s7, s2, 0x40004
; GFX9-NEXT: s_bfe_i32 s9, s4, 0x40008 ; GFX9-NEXT: s_bfe_i32 s10, s4, 0x40008
; GFX9-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-NEXT: v_mad_i32_i24 v0, s5, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s7 ; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: v_mad_i32_i24 v2, s6, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s7, v2, v0
; GFX9-NEXT: s_bfe_i32 s8, s2, 0x40008 ; GFX9-NEXT: s_bfe_i32 s9, s2, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v4, s9 ; GFX9-NEXT: v_mov_b32_e32 v2, s10
; GFX9-NEXT: s_bfe_i32 s11, s4, 0x4000c ; GFX9-NEXT: s_bfe_i32 s12, s4, 0x4000c
; GFX9-NEXT: v_mad_i32_i24 v2, s8, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s9, v2, v0
; GFX9-NEXT: s_bfe_i32 s10, s2, 0x4000c ; GFX9-NEXT: s_bfe_i32 s11, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v4, s11 ; GFX9-NEXT: v_mov_b32_e32 v2, s12
; GFX9-NEXT: s_bfe_i32 s13, s4, 0x40010 ; GFX9-NEXT: s_bfe_i32 s14, s4, 0x40010
; GFX9-NEXT: v_mad_i32_i24 v2, s10, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s11, v2, v0
; GFX9-NEXT: s_bfe_i32 s12, s2, 0x40010 ; GFX9-NEXT: s_bfe_i32 s13, s2, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v4, s13 ; GFX9-NEXT: v_mov_b32_e32 v2, s14
; GFX9-NEXT: s_bfe_i32 s15, s4, 0x40014 ; GFX9-NEXT: s_bfe_i32 s16, s4, 0x40014
; GFX9-NEXT: s_bfe_i32 s17, s4, 0x40018 ; GFX9-NEXT: s_bfe_i32 s18, s4, 0x40018
; GFX9-NEXT: v_mad_i32_i24 v2, s12, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s13, v2, v0
; GFX9-NEXT: s_bfe_i32 s14, s2, 0x40014 ; GFX9-NEXT: s_bfe_i32 s15, s2, 0x40014
; GFX9-NEXT: v_mov_b32_e32 v4, s15 ; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: s_bfe_i32 s16, s2, 0x40018 ; GFX9-NEXT: s_bfe_i32 s17, s2, 0x40018
; GFX9-NEXT: v_mad_i32_i24 v2, s14, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s15, v2, v0
; GFX9-NEXT: v_mov_b32_e32 v4, s17 ; GFX9-NEXT: v_mov_b32_e32 v2, s18
; GFX9-NEXT: s_ashr_i32 s4, s4, 28 ; GFX9-NEXT: s_ashr_i32 s4, s4, 28
; GFX9-NEXT: v_mad_i32_i24 v2, s16, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s17, v2, v0
; GFX9-NEXT: s_ashr_i32 s2, s2, 28 ; GFX9-NEXT: s_ashr_i32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mad_i32_i24 v2, s2, v4, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s2, v2, v0
; GFX9-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-NEXT: v_add_u32_e32 v2, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_multiuses_mul1: ; GFX9-DL-LABEL: idot8_multiuses_mul1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX9-DL-NEXT: s_bfe_i32 s5, s2, 0x40000
; GFX9-DL-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX9-DL-NEXT: s_bfe_i32 s6, s4, 0x40000
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s19
; GFX9-DL-NEXT: v_mad_i32_i24 v3, s0, v2, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v1, s5, v0, v1
; GFX9-DL-NEXT: s_bfe_i32 s7, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX9-DL-NEXT: s_bfe_i32 s6, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_i32 s7, s2, 0x40004
; GFX9-DL-NEXT: s_bfe_i32 s9, s4, 0x40008 ; GFX9-DL-NEXT: s_bfe_i32 s10, s4, 0x40008
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v2, v3 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s5, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s8
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s6, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s7, v2, v0
; GFX9-DL-NEXT: s_bfe_i32 s8, s2, 0x40008 ; GFX9-DL-NEXT: s_bfe_i32 s9, s2, 0x40008
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s10
; GFX9-DL-NEXT: s_bfe_i32 s11, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_i32 s12, s4, 0x4000c
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s9, v2, v0
; GFX9-DL-NEXT: s_bfe_i32 s10, s2, 0x4000c ; GFX9-DL-NEXT: s_bfe_i32 s11, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s11 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s12
; GFX9-DL-NEXT: s_bfe_i32 s13, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s14, s4, 0x40010
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s10, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s11, v2, v0
; GFX9-DL-NEXT: s_bfe_i32 s12, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_i32 s13, s2, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s14
; GFX9-DL-NEXT: s_bfe_i32 s15, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_i32 s16, s4, 0x40014
; GFX9-DL-NEXT: s_bfe_i32 s17, s4, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s18, s4, 0x40018
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s12, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s13, v2, v0
; GFX9-DL-NEXT: s_bfe_i32 s14, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_i32 s15, s2, 0x40014
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s15 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s16
; GFX9-DL-NEXT: s_bfe_i32 s16, s2, 0x40018 ; GFX9-DL-NEXT: s_bfe_i32 s17, s2, 0x40018
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s14, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s15, v2, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s17 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s18
; GFX9-DL-NEXT: s_ashr_i32 s4, s4, 28 ; GFX9-DL-NEXT: s_ashr_i32 s4, s4, 28
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s16, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s17, v2, v0
; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 28 ; GFX9-DL-NEXT: s_ashr_i32 s2, s2, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s2, v4, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s2, v2, v0
; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v1, v0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_multiuses_mul1: ; GFX10-DL-LABEL: idot8_multiuses_mul1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_i32 s0, s2, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s6, s2, 0x40000
; GFX10-DL-NEXT: s_bfe_i32 s1, s4, 0x40000 ; GFX10-DL-NEXT: s_bfe_i32 s7, s4, 0x40000
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_bfe_i32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s5, s2, 0x40004
; GFX10-DL-NEXT: s_bfe_i32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x40004
; GFX10-DL-NEXT: s_bfe_i32 s7, s2, 0x40008 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s6, s7, v0
; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x40008 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s6, s7, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s1, v2 ; GFX10-DL-NEXT: s_bfe_i32 s6, s2, 0x40008
; GFX10-DL-NEXT: s_bfe_i32 s9, s2, 0x4000c ; GFX10-DL-NEXT: s_bfe_i32 s7, s4, 0x40008
; GFX10-DL-NEXT: s_bfe_i32 s10, s4, 0x4000c ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s5, s8, v1
; GFX10-DL-NEXT: s_bfe_i32 s11, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s5, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_i32 s12, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x4000c
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s6, s7, v1
; GFX10-DL-NEXT: s_bfe_i32 s0, s2, 0x40014 ; GFX10-DL-NEXT: s_bfe_i32 s6, s2, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s1, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_i32 s7, s4, 0x40010
; GFX10-DL-NEXT: s_bfe_i32 s13, s2, 0x40018 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s5, s8, v1
; GFX10-DL-NEXT: s_bfe_i32 s14, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_i32 s5, s2, 0x40014
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s5, s6, v3 ; GFX10-DL-NEXT: s_bfe_i32 s8, s4, 0x40014
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s7, s8, v3 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s6, s7, v1
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s9, s10, v3 ; GFX10-DL-NEXT: s_bfe_i32 s6, s2, 0x40018
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s11, s12, v3 ; GFX10-DL-NEXT: s_bfe_i32 s7, s4, 0x40018
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s0, s1, v3 ; GFX10-DL-NEXT: s_ashr_i32 s2, s2, 28
; GFX10-DL-NEXT: s_ashr_i32 s0, s2, 28 ; GFX10-DL-NEXT: s_ashr_i32 s4, s4, 28
; GFX10-DL-NEXT: s_ashr_i32 s1, s4, 28 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s5, s8, v1
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s13, s14, v3 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s6, s7, v1
; GFX10-DL-NEXT: v_mad_i32_i24 v3, s0, s1, v3 ; GFX10-DL-NEXT: v_mad_i32_i24 v1, s2, s4, v1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v0, v1
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s1, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s1, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s9, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s9, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_ashr_i64 s[10:11], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[10:11], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s11, s1, 4 ; GFX7-NEXT: s_lshl_b32 s11, s1, 4
; GFX7-NEXT: s_ashr_i64 s[14:15], s[10:11], 60
; GFX7-NEXT: s_lshl_b32 s11, s1, 12
; GFX7-NEXT: s_ashr_i64 s[16:17], s[10:11], 60 ; GFX7-NEXT: s_ashr_i64 s[16:17], s[10:11], 60
; GFX7-NEXT: s_lshl_b32 s11, s1, 16 ; GFX7-NEXT: s_lshl_b32 s11, s1, 16
; GFX7-NEXT: s_ashr_i64 s[18:19], s[10:11], 60 ; GFX7-NEXT: s_ashr_i64 s[18:19], s[10:11], 60
; GFX7-NEXT: s_lshl_b32 s11, s1, 20 ; GFX7-NEXT: s_lshl_b32 s11, s1, 20
; GFX7-NEXT: s_lshl_b32 s13, s1, 8 ; GFX7-NEXT: s_lshl_b32 s13, s1, 8
; GFX7-NEXT: s_lshl_b32 s15, s1, 12
; GFX7-NEXT: s_ashr_i64 s[20:21], s[10:11], 60 ; GFX7-NEXT: s_ashr_i64 s[20:21], s[10:11], 60
; GFX7-NEXT: s_lshl_b32 s11, s1, 24 ; GFX7-NEXT: s_lshl_b32 s11, s1, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 28 ; GFX7-NEXT: s_lshl_b32 s1, s1, 28
; GFX7-NEXT: s_ashr_i64 s[0:1], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[0:1], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 4 ; GFX7-NEXT: s_lshl_b32 s1, s9, 4
; GFX7-NEXT: s_ashr_i64 s[26:27], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[26:27], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 8 ; GFX7-NEXT: s_lshl_b32 s1, s9, 8
; GFX7-NEXT: s_ashr_i64 s[28:29], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[28:29], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 12 ; GFX7-NEXT: s_lshl_b32 s1, s9, 12
; GFX7-NEXT: s_ashr_i64 s[30:31], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[30:31], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 16 ; GFX7-NEXT: s_lshl_b32 s1, s9, 16
; GFX7-NEXT: s_ashr_i64 s[32:33], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[32:33], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 20 ; GFX7-NEXT: s_lshl_b32 s1, s9, 20
; GFX7-NEXT: s_ashr_i64 s[34:35], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[34:35], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 24 ; GFX7-NEXT: s_lshl_b32 s1, s9, 24
; GFX7-NEXT: s_ashr_i64 s[36:37], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[36:37], s[0:1], 60
; GFX7-NEXT: s_lshl_b32 s1, s9, 28 ; GFX7-NEXT: s_lshl_b32 s1, s9, 28
; GFX7-NEXT: s_ashr_i64 s[24:25], s[8:9], 60 ; GFX7-NEXT: s_ashr_i64 s[24:25], s[8:9], 60
; GFX7-NEXT: s_ashr_i64 s[8:9], s[0:1], 60 ; GFX7-NEXT: s_ashr_i64 s[8:9], s[0:1], 60
; GFX7-NEXT: s_load_dword s1, s[4:5], 0x0
; GFX7-NEXT: v_mov_b32_e32 v0, s8 ; GFX7-NEXT: v_mov_b32_e32 v0, s8
; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: v_mad_i32_i24 v0, s0, v0, v1
; GFX7-NEXT: s_ashr_i64 s[22:23], s[10:11], 60 ; GFX7-NEXT: s_ashr_i64 s[22:23], s[10:11], 60
; GFX7-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX7-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mad_i32_i24 v0, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s36 ; GFX7-NEXT: v_mov_b32_e32 v1, s36
; GFX7-NEXT: v_mad_i32_i24 v0, s22, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s22, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s34 ; GFX7-NEXT: v_mov_b32_e32 v1, s34
; GFX7-NEXT: v_mad_i32_i24 v0, s20, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s20, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s32 ; GFX7-NEXT: v_mov_b32_e32 v1, s32
; GFX7-NEXT: v_mad_i32_i24 v0, s18, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s18, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s30 ; GFX7-NEXT: v_mov_b32_e32 v1, s30
; GFX7-NEXT: v_mad_i32_i24 v0, s16, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s14, v1, v0
; GFX7-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX7-NEXT: v_mov_b32_e32 v1, s28 ; GFX7-NEXT: v_mov_b32_e32 v1, s28
; GFX7-NEXT: v_mad_i32_i24 v0, s12, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s12, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s26 ; GFX7-NEXT: v_mov_b32_e32 v1, s26
; GFX7-NEXT: v_mad_i32_i24 v0, s14, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s16, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s24 ; GFX7-NEXT: v_mov_b32_e32 v1, s24
; GFX7-NEXT: v_mad_i32_i24 v0, s10, v1, v0 ; GFX7-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_acc32_vecMul: ; GFX8-LABEL: idot8_acc32_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s5, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s5, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s7, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s7, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_ashr_i64 s[0:1], s[4:5], 60 ; GFX8-NEXT: s_ashr_i64 s[8:9], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s5, 4 ; GFX8-NEXT: s_lshl_b32 s9, s5, 4
; GFX8-NEXT: s_ashr_i64 s[12:13], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[16:17], s[8:9], 60
; GFX8-NEXT: s_lshl_b32 s1, s5, 16 ; GFX8-NEXT: s_lshl_b32 s9, s5, 20
; GFX8-NEXT: s_ashr_i64 s[14:15], s[0:1], 60 ; GFX8-NEXT: s_lshl_b32 s11, s5, 8
; GFX8-NEXT: s_lshl_b32 s1, s5, 20 ; GFX8-NEXT: s_lshl_b32 s13, s5, 12
; GFX8-NEXT: s_ashr_i64 s[16:17], s[0:1], 60 ; GFX8-NEXT: s_lshl_b32 s15, s5, 16
; GFX8-NEXT: s_lshl_b32 s1, s5, 24 ; GFX8-NEXT: s_ashr_i64 s[18:19], s[8:9], 60
; GFX8-NEXT: s_ashr_i64 s[18:19], s[0:1], 60 ; GFX8-NEXT: s_lshl_b32 s9, s5, 24
; GFX8-NEXT: s_lshl_b32 s1, s5, 28 ; GFX8-NEXT: s_lshl_b32 s5, s5, 28
; GFX8-NEXT: s_lshl_b32 s9, s5, 8 ; GFX8-NEXT: s_ashr_i64 s[4:5], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s11, s5, 12 ; GFX8-NEXT: s_lshl_b32 s5, s7, 4
; GFX8-NEXT: s_ashr_i64 s[4:5], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[24:25], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 4 ; GFX8-NEXT: s_lshl_b32 s5, s7, 8
; GFX8-NEXT: s_ashr_i64 s[22:23], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[26:27], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 8 ; GFX8-NEXT: s_lshl_b32 s5, s7, 12
; GFX8-NEXT: s_ashr_i64 s[24:25], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[28:29], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 12 ; GFX8-NEXT: s_lshl_b32 s5, s7, 16
; GFX8-NEXT: s_ashr_i64 s[26:27], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[30:31], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 16 ; GFX8-NEXT: s_lshl_b32 s5, s7, 20
; GFX8-NEXT: s_ashr_i64 s[28:29], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[32:33], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 20 ; GFX8-NEXT: s_lshl_b32 s5, s7, 24
; GFX8-NEXT: s_ashr_i64 s[30:31], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[34:35], s[4:5], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 24 ; GFX8-NEXT: s_lshl_b32 s5, s7, 28
; GFX8-NEXT: s_ashr_i64 s[32:33], s[0:1], 60 ; GFX8-NEXT: s_ashr_i64 s[22:23], s[6:7], 60
; GFX8-NEXT: s_lshl_b32 s1, s7, 28 ; GFX8-NEXT: s_ashr_i64 s[6:7], s[4:5], 60
; GFX8-NEXT: s_ashr_i64 s[20:21], s[6:7], 60 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: s_ashr_i64 s[6:7], s[0:1], 60 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mov_b32_e32 v2, s6 ; GFX8-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: s_ashr_i64 s[20:21], s[8:9], 60
; GFX8-NEXT: v_mad_i32_i24 v2, s4, v2, v3 ; GFX8-NEXT: v_mov_b32_e32 v1, s34
; GFX8-NEXT: v_mov_b32_e32 v3, s32 ; GFX8-NEXT: v_mad_i32_i24 v0, s20, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s18, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v1, s32
; GFX8-NEXT: v_mov_b32_e32 v3, s30 ; GFX8-NEXT: v_mad_i32_i24 v0, s18, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s16, v3, v2 ; GFX8-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX8-NEXT: v_mov_b32_e32 v3, s28 ; GFX8-NEXT: v_mov_b32_e32 v1, s30
; GFX8-NEXT: v_mad_i32_i24 v2, s14, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s14, v1, v0
; GFX8-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX8-NEXT: v_mov_b32_e32 v1, s28
; GFX8-NEXT: v_mad_i32_i24 v0, s12, v1, v0
; GFX8-NEXT: s_ashr_i64 s[10:11], s[10:11], 60 ; GFX8-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX8-NEXT: v_mov_b32_e32 v3, s26 ; GFX8-NEXT: v_mov_b32_e32 v1, s26
; GFX8-NEXT: v_mad_i32_i24 v2, s10, v3, v2 ; GFX8-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX8-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX8-NEXT: v_mov_b32_e32 v1, s24
; GFX8-NEXT: v_mov_b32_e32 v3, s24 ; GFX8-NEXT: v_mad_i32_i24 v0, s16, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s8, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v1, s22
; GFX8-NEXT: v_mov_b32_e32 v3, s22 ; GFX8-NEXT: v_mad_i32_i24 v2, s8, v1, v0
; GFX8-NEXT: v_mad_i32_i24 v2, s12, v3, v2 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v3, s20 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_acc32_vecMul: ; GFX9-LABEL: idot8_acc32_vecMul:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s5, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s5, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s7, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s7, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_ashr_i64 s[0:1], s[4:5], 60 ; GFX9-NEXT: s_ashr_i64 s[8:9], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s5, 4 ; GFX9-NEXT: s_lshl_b32 s9, s5, 4
; GFX9-NEXT: s_ashr_i64 s[12:13], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[16:17], s[8:9], 60
; GFX9-NEXT: s_lshl_b32 s1, s5, 16 ; GFX9-NEXT: s_lshl_b32 s9, s5, 20
; GFX9-NEXT: s_ashr_i64 s[14:15], s[0:1], 60 ; GFX9-NEXT: s_lshl_b32 s11, s5, 8
; GFX9-NEXT: s_lshl_b32 s1, s5, 20 ; GFX9-NEXT: s_lshl_b32 s13, s5, 12
; GFX9-NEXT: s_ashr_i64 s[16:17], s[0:1], 60 ; GFX9-NEXT: s_lshl_b32 s15, s5, 16
; GFX9-NEXT: s_lshl_b32 s1, s5, 24 ; GFX9-NEXT: s_ashr_i64 s[18:19], s[8:9], 60
; GFX9-NEXT: s_ashr_i64 s[18:19], s[0:1], 60 ; GFX9-NEXT: s_lshl_b32 s9, s5, 24
; GFX9-NEXT: s_lshl_b32 s1, s5, 28 ; GFX9-NEXT: s_lshl_b32 s5, s5, 28
; GFX9-NEXT: s_lshl_b32 s9, s5, 8 ; GFX9-NEXT: s_ashr_i64 s[4:5], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s11, s5, 12 ; GFX9-NEXT: s_lshl_b32 s5, s7, 4
; GFX9-NEXT: s_ashr_i64 s[4:5], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[24:25], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 4 ; GFX9-NEXT: s_lshl_b32 s5, s7, 8
; GFX9-NEXT: s_ashr_i64 s[22:23], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[26:27], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 8 ; GFX9-NEXT: s_lshl_b32 s5, s7, 12
; GFX9-NEXT: s_ashr_i64 s[24:25], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[28:29], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 12 ; GFX9-NEXT: s_lshl_b32 s5, s7, 16
; GFX9-NEXT: s_ashr_i64 s[26:27], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[30:31], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 16 ; GFX9-NEXT: s_lshl_b32 s5, s7, 20
; GFX9-NEXT: s_ashr_i64 s[28:29], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[32:33], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 20 ; GFX9-NEXT: s_lshl_b32 s5, s7, 24
; GFX9-NEXT: s_ashr_i64 s[30:31], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[34:35], s[4:5], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 24 ; GFX9-NEXT: s_lshl_b32 s5, s7, 28
; GFX9-NEXT: s_ashr_i64 s[32:33], s[0:1], 60 ; GFX9-NEXT: s_ashr_i64 s[22:23], s[6:7], 60
; GFX9-NEXT: s_lshl_b32 s1, s7, 28 ; GFX9-NEXT: s_ashr_i64 s[6:7], s[4:5], 60
; GFX9-NEXT: s_ashr_i64 s[20:21], s[6:7], 60 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: s_ashr_i64 s[6:7], s[0:1], 60 ; GFX9-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NEXT: v_mov_b32_e32 v2, s6 ; GFX9-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NEXT: s_ashr_i64 s[20:21], s[8:9], 60
; GFX9-NEXT: v_mad_i32_i24 v2, s4, v2, v3 ; GFX9-NEXT: v_mov_b32_e32 v1, s34
; GFX9-NEXT: v_mov_b32_e32 v3, s32 ; GFX9-NEXT: v_mad_i32_i24 v0, s20, v1, v0
; GFX9-NEXT: v_mad_i32_i24 v2, s18, v3, v2 ; GFX9-NEXT: v_mov_b32_e32 v1, s32
; GFX9-NEXT: v_mov_b32_e32 v3, s30 ; GFX9-NEXT: v_mad_i32_i24 v0, s18, v1, v0
; GFX9-NEXT: v_mad_i32_i24 v2, s16, v3, v2 ; GFX9-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX9-NEXT: v_mov_b32_e32 v3, s28 ; GFX9-NEXT: v_mov_b32_e32 v1, s30
; GFX9-NEXT: v_mad_i32_i24 v2, s14, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s14, v1, v0
; GFX9-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX9-NEXT: v_mov_b32_e32 v1, s28
; GFX9-NEXT: v_mad_i32_i24 v0, s12, v1, v0
; GFX9-NEXT: s_ashr_i64 s[10:11], s[10:11], 60 ; GFX9-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX9-NEXT: v_mov_b32_e32 v3, s26 ; GFX9-NEXT: v_mov_b32_e32 v1, s26
; GFX9-NEXT: v_mad_i32_i24 v2, s10, v3, v2 ; GFX9-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX9-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX9-NEXT: v_mov_b32_e32 v1, s24
; GFX9-NEXT: v_mov_b32_e32 v3, s24 ; GFX9-NEXT: v_mad_i32_i24 v0, s16, v1, v0
; GFX9-NEXT: v_mad_i32_i24 v2, s8, v3, v2 ; GFX9-NEXT: v_mov_b32_e32 v1, s22
; GFX9-NEXT: v_mov_b32_e32 v3, s22 ; GFX9-NEXT: v_mad_i32_i24 v2, s8, v1, v0
; GFX9-NEXT: v_mad_i32_i24 v2, s12, v3, v2 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v3, s20 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_acc32_vecMul: ; GFX9-DL-LABEL: idot8_acc32_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s5, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s5, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s7, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s7, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_ashr_i64 s[0:1], s[4:5], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[8:9], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s5, 4 ; GFX9-DL-NEXT: s_lshl_b32 s9, s5, 4
; GFX9-DL-NEXT: s_ashr_i64 s[12:13], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[16:17], s[8:9], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s5, 16 ; GFX9-DL-NEXT: s_lshl_b32 s9, s5, 20
; GFX9-DL-NEXT: s_ashr_i64 s[14:15], s[0:1], 60 ; GFX9-DL-NEXT: s_lshl_b32 s11, s5, 8
; GFX9-DL-NEXT: s_lshl_b32 s1, s5, 20 ; GFX9-DL-NEXT: s_lshl_b32 s13, s5, 12
; GFX9-DL-NEXT: s_ashr_i64 s[16:17], s[0:1], 60 ; GFX9-DL-NEXT: s_lshl_b32 s15, s5, 16
; GFX9-DL-NEXT: s_lshl_b32 s1, s5, 24 ; GFX9-DL-NEXT: s_ashr_i64 s[18:19], s[8:9], 60
; GFX9-DL-NEXT: s_ashr_i64 s[18:19], s[0:1], 60 ; GFX9-DL-NEXT: s_lshl_b32 s9, s5, 24
; GFX9-DL-NEXT: s_lshl_b32 s1, s5, 28 ; GFX9-DL-NEXT: s_lshl_b32 s5, s5, 28
; GFX9-DL-NEXT: s_lshl_b32 s9, s5, 8 ; GFX9-DL-NEXT: s_ashr_i64 s[4:5], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s11, s5, 12 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 4
; GFX9-DL-NEXT: s_ashr_i64 s[4:5], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[24:25], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 4 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 8
; GFX9-DL-NEXT: s_ashr_i64 s[22:23], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[26:27], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 8 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 12
; GFX9-DL-NEXT: s_ashr_i64 s[24:25], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[28:29], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 12 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 16
; GFX9-DL-NEXT: s_ashr_i64 s[26:27], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[30:31], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 16 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 20
; GFX9-DL-NEXT: s_ashr_i64 s[28:29], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[32:33], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 20 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 24
; GFX9-DL-NEXT: s_ashr_i64 s[30:31], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[34:35], s[4:5], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 24 ; GFX9-DL-NEXT: s_lshl_b32 s5, s7, 28
; GFX9-DL-NEXT: s_ashr_i64 s[32:33], s[0:1], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[22:23], s[6:7], 60
; GFX9-DL-NEXT: s_lshl_b32 s1, s7, 28 ; GFX9-DL-NEXT: s_ashr_i64 s[6:7], s[4:5], 60
; GFX9-DL-NEXT: s_ashr_i64 s[20:21], s[6:7], 60 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX9-DL-NEXT: s_ashr_i64 s[6:7], s[0:1], 60 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s6 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-DL-NEXT: s_ashr_i64 s[20:21], s[8:9], 60
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s4, v2, v3 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s34
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s32 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s20, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s18, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s32
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s30 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s18, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s16, v3, v2 ; GFX9-DL-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s28 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s30
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s14, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s14, v1, v0
; GFX9-DL-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s28
; GFX9-DL-NEXT: v_mad_i32_i24 v0, s12, v1, v0
; GFX9-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60 ; GFX9-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s26 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s26
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s10, v3, v2 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s10, v1, v0
; GFX9-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s24
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s24 ; GFX9-DL-NEXT: v_mad_i32_i24 v0, s16, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s22
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s22 ; GFX9-DL-NEXT: v_mad_i32_i24 v2, s8, v1, v0
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s12, v3, v2 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s20 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: v_mad_i32_i24 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_acc32_vecMul: ; GFX10-DL-LABEL: idot8_acc32_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s5, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s7, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s7, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshl_b32 s1, s5, 28 ; GFX10-DL-NEXT: s_lshl_b32 s9, s5, 28
; GFX10-DL-NEXT: s_lshl_b32 s9, s7, 28 ; GFX10-DL-NEXT: s_lshl_b32 s11, s7, 28
; GFX10-DL-NEXT: s_lshl_b32 s11, s5, 24 ; GFX10-DL-NEXT: s_lshl_b32 s13, s5, 24
; GFX10-DL-NEXT: s_lshl_b32 s13, s7, 24 ; GFX10-DL-NEXT: s_lshl_b32 s15, s7, 24
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s2 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: s_ashr_i64 s[0:1], s[0:1], 60
; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60
; GFX10-DL-NEXT: s_lshl_b32 s1, s5, 20
; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX10-DL-NEXT: s_lshl_b32 s9, s7, 20
; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[12:13], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s8, v2 ; GFX10-DL-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX10-DL-NEXT: s_ashr_i64 s[0:1], s[0:1], 60 ; GFX10-DL-NEXT: s_lshl_b32 s9, s5, 20
; GFX10-DL-NEXT: s_lshl_b32 s11, s5, 16 ; GFX10-DL-NEXT: s_lshl_b32 s11, s7, 20
; GFX10-DL-NEXT: v_mad_i32_i24 v0, s8, s10, v0
; GFX10-DL-NEXT: s_lshl_b32 s13, s5, 16
; GFX10-DL-NEXT: s_lshl_b32 s15, s7, 16
; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60
; GFX10-DL-NEXT: s_lshl_b32 s1, s7, 16
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s10, s12, v2
; GFX10-DL-NEXT: s_lshl_b32 s9, s5, 12
; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v0, s12, s14, v0
; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX10-DL-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX10-DL-NEXT: s_lshl_b32 s9, s5, 12
; GFX10-DL-NEXT: s_lshl_b32 s11, s7, 12 ; GFX10-DL-NEXT: s_lshl_b32 s11, s7, 12
; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[0:1], 60 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s8, s10, v0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s8, v2 ; GFX10-DL-NEXT: s_lshl_b32 s13, s5, 8
; GFX10-DL-NEXT: s_lshl_b32 s1, s5, 8 ; GFX10-DL-NEXT: s_lshl_b32 s15, s7, 8
; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60
; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v0, s12, s14, v0
; GFX10-DL-NEXT: s_lshl_b32 s9, s5, 4
; GFX10-DL-NEXT: s_lshl_b32 s11, s7, 4
; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[12:13], 60
; GFX10-DL-NEXT: s_ashr_i64 s[14:15], s[14:15], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v0, s8, s10, v0
; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[8:9], 60
; GFX10-DL-NEXT: s_ashr_i64 s[14:15], s[10:11], 60 ; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[10:11], 60
; GFX10-DL-NEXT: s_lshl_b32 s9, s7, 8 ; GFX10-DL-NEXT: s_ashr_i64 s[4:5], s[4:5], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s10, s12, v2 ; GFX10-DL-NEXT: s_ashr_i64 s[6:7], s[6:7], 60
; GFX10-DL-NEXT: s_ashr_i64 s[0:1], s[0:1], 60 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s12, s14, v0
; GFX10-DL-NEXT: s_lshl_b32 s11, s5, 4 ; GFX10-DL-NEXT: v_mad_i32_i24 v0, s8, s10, v0
; GFX10-DL-NEXT: s_lshl_b32 s1, s7, 4 ; GFX10-DL-NEXT: v_mad_i32_i24 v2, s4, s6, v0
; GFX10-DL-NEXT: s_ashr_i64 s[12:13], s[8:9], 60 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s14, v2 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_ashr_i64 s[8:9], s[10:11], 60
; GFX10-DL-NEXT: s_ashr_i64 s[10:11], s[0:1], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s12, v2
; GFX10-DL-NEXT: s_ashr_i64 s[0:1], s[4:5], 60
; GFX10-DL-NEXT: s_ashr_i64 s[4:5], s[6:7], 60
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s8, s10, v2
; GFX10-DL-NEXT: v_mad_i32_i24 v2, s0, s4, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
Show All 29 Lines
; GFX7-LABEL: idot8_acc16_vecMul: ; GFX7-LABEL: idot8_acc16_vecMul:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_mov_b32 s2, 0xffff ; GFX7-NEXT: s_mov_b32 s2, 0xffff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[10:11], 0x0
; GFX7-NEXT: buffer_load_ushort v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_load_ushort v0, off, s[4:7], 0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s1, s[8:9], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_ashr_i32 s8, s0, 28 ; GFX7-NEXT: s_bfe_i32 s16, s0, 0x40018
; GFX7-NEXT: s_bfe_i32 s9, s0, 0x40018 ; GFX7-NEXT: s_bfe_i32 s17, s0, 0x40014
; GFX7-NEXT: s_bfe_i32 s16, s1, 0x40018 ; GFX7-NEXT: s_bfe_i32 s18, s0, 0x40010
; GFX7-NEXT: s_bfe_i32 s17, s1, 0x40014 ; GFX7-NEXT: s_bfe_i32 s19, s0, 0x40000
; GFX7-NEXT: s_bfe_i32 s18, s1, 0x40010 ; GFX7-NEXT: s_bfe_i32 s20, s0, 0x40004
; GFX7-NEXT: s_bfe_i32 s19, s1, 0x40000 ; GFX7-NEXT: s_bfe_i32 s21, s0, 0x40008
; GFX7-NEXT: s_bfe_i32 s20, s1, 0x40004 ; GFX7-NEXT: s_ashr_i32 s15, s0, 28
; GFX7-NEXT: s_bfe_i32 s21, s1, 0x40008 ; GFX7-NEXT: s_bfe_i32 s0, s0, 0x4000c
; GFX7-NEXT: s_ashr_i32 s15, s1, 28 ; GFX7-NEXT: s_ashr_i32 s8, s1, 28
; GFX7-NEXT: s_bfe_i32 s1, s1, 0x4000c ; GFX7-NEXT: s_bfe_i32 s9, s1, 0x40018
; GFX7-NEXT: s_bfe_i32 s10, s0, 0x40014 ; GFX7-NEXT: s_bfe_i32 s10, s1, 0x40014
; GFX7-NEXT: s_bfe_i32 s11, s0, 0x40010 ; GFX7-NEXT: s_bfe_i32 s11, s1, 0x40010
; GFX7-NEXT: s_bfe_i32 s12, s0, 0x40000 ; GFX7-NEXT: s_bfe_i32 s12, s1, 0x40000
; GFX7-NEXT: v_mov_b32_e32 v4, s19 ; GFX7-NEXT: v_mov_b32_e32 v4, s19
; GFX7-NEXT: s_bfe_i32 s13, s0, 0x40004 ; GFX7-NEXT: s_bfe_i32 s13, s1, 0x40004
; GFX7-NEXT: v_mov_b32_e32 v3, s20 ; GFX7-NEXT: v_mov_b32_e32 v3, s20
; GFX7-NEXT: s_bfe_i32 s14, s0, 0x40008 ; GFX7-NEXT: s_bfe_i32 s14, s1, 0x40008
; GFX7-NEXT: v_mov_b32_e32 v2, s21 ; GFX7-NEXT: v_mov_b32_e32 v2, s21
; GFX7-NEXT: s_bfe_i32 s0, s0, 0x4000c ; GFX7-NEXT: s_bfe_i32 s1, s1, 0x4000c
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
; GFX7-NEXT: v_mul_i32_i24_e32 v1, s0, v1 ; GFX7-NEXT: v_mul_i32_i24_e32 v1, s1, v1
; GFX7-NEXT: v_mul_i32_i24_e32 v2, s14, v2 ; GFX7-NEXT: v_mul_i32_i24_e32 v2, s14, v2
; GFX7-NEXT: v_mul_i32_i24_e32 v3, s13, v3 ; GFX7-NEXT: v_mul_i32_i24_e32 v3, s13, v3
; GFX7-NEXT: v_mul_i32_i24_e32 v4, s12, v4 ; GFX7-NEXT: v_mul_i32_i24_e32 v4, s12, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_and_b32_e32 v2, s2, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s2, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s2, v4
; GFX7-NEXT: v_or_b32_e32 v1, v2, v1 ; GFX7-NEXT: v_or_b32_e32 v1, v2, v1
Show All 16 Lines
; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: idot8_acc16_vecMul: ; GFX8-LABEL: idot8_acc16_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_lshlrev_b16_e64 v3, 12, s2 ; GFX8-NEXT: v_lshlrev_b16_e64 v4, 12, s2
; GFX8-NEXT: v_lshlrev_b16_e64 v4, 12, s4 ; GFX8-NEXT: s_lshr_b32 s15, s2, 4
; GFX8-NEXT: s_lshr_b32 s0, s2, 4 ; GFX8-NEXT: s_lshr_b32 s16, s2, 8
; GFX8-NEXT: s_lshr_b32 s1, s2, 8 ; GFX8-NEXT: v_lshlrev_b16_e64 v12, 12, s16
; GFX8-NEXT: s_lshr_b32 s5, s4, 4 ; GFX8-NEXT: v_lshlrev_b16_e64 v3, 12, s0
; GFX8-NEXT: s_lshr_b32 s6, s4, 8 ; GFX8-NEXT: s_lshr_b32 s8, s0, 4
; GFX8-NEXT: v_lshlrev_b16_e64 v5, 12, s1 ; GFX8-NEXT: s_lshr_b32 s9, s0, 8
; GFX8-NEXT: v_lshlrev_b16_e64 v6, 12, s0 ; GFX8-NEXT: v_lshlrev_b16_e64 v5, 12, s9
; GFX8-NEXT: v_lshlrev_b16_e64 v7, 12, s6 ; GFX8-NEXT: v_lshlrev_b16_e64 v6, 12, s8
; GFX8-NEXT: v_lshlrev_b16_e64 v8, 12, s5 ; GFX8-NEXT: v_lshlrev_b16_e64 v13, 12, s15
; GFX8-NEXT: v_ashrrev_i16_e32 v3, 12, v3 ; GFX8-NEXT: v_ashrrev_i16_e32 v3, 12, v3
; GFX8-NEXT: v_ashrrev_i16_e32 v4, 12, v4 ; GFX8-NEXT: v_ashrrev_i16_e32 v4, 12, v4
; GFX8-NEXT: s_lshr_b32 s0, s2, 12 ; GFX8-NEXT: s_lshr_b32 s7, s0, 12
; GFX8-NEXT: s_lshr_b32 s1, s4, 12 ; GFX8-NEXT: s_lshr_b32 s14, s2, 12
; GFX8-NEXT: v_ashrrev_i16_e32 v6, 12, v6 ; GFX8-NEXT: v_ashrrev_i16_e32 v6, 12, v6
; GFX8-NEXT: v_ashrrev_i16_e32 v5, 12, v5 ; GFX8-NEXT: v_ashrrev_i16_e32 v5, 12, v5
; GFX8-NEXT: v_ashrrev_i16_e32 v7, 12, v7
; GFX8-NEXT: v_ashrrev_i16_e32 v8, 12, v8
; GFX8-NEXT: v_lshlrev_b16_e64 v9, 12, s0
; GFX8-NEXT: v_lshlrev_b16_e64 v10, 12, s1
; GFX8-NEXT: s_lshr_b32 s5, s2, 16
; GFX8-NEXT: s_lshr_b32 s6, s4, 16
; GFX8-NEXT: v_mul_u32_u24_e32 v5, v5, v7
; GFX8-NEXT: v_lshlrev_b16_e64 v11, 12, s5
; GFX8-NEXT: v_lshlrev_b16_e64 v12, 12, s6
; GFX8-NEXT: s_lshr_b32 s0, s2, 20
; GFX8-NEXT: s_lshr_b32 s1, s4, 20
; GFX8-NEXT: v_ashrrev_i16_e32 v9, 12, v9
; GFX8-NEXT: v_ashrrev_i16_e32 v10, 12, v10
; GFX8-NEXT: v_lshlrev_b16_e64 v13, 12, s0
; GFX8-NEXT: v_lshlrev_b16_e64 v14, 12, s1
; GFX8-NEXT: s_lshr_b32 s5, s2, 24
; GFX8-NEXT: s_lshr_b32 s6, s4, 24
; GFX8-NEXT: v_ashrrev_i16_e32 v11, 12, v11
; GFX8-NEXT: v_ashrrev_i16_e32 v12, 12, v12 ; GFX8-NEXT: v_ashrrev_i16_e32 v12, 12, v12
; GFX8-NEXT: v_lshlrev_b16_e64 v15, 12, s5
; GFX8-NEXT: v_lshlrev_b16_e64 v17, 12, s6
; GFX8-NEXT: s_lshr_b32 s0, s2, 28
; GFX8-NEXT: s_lshr_b32 s1, s4, 28
; GFX8-NEXT: v_ashrrev_i16_e32 v13, 12, v13 ; GFX8-NEXT: v_ashrrev_i16_e32 v13, 12, v13
; GFX8-NEXT: v_lshlrev_b16_e64 v7, 12, s7
; GFX8-NEXT: v_lshlrev_b16_e64 v14, 12, s14
; GFX8-NEXT: s_lshr_b32 s6, s0, 16
; GFX8-NEXT: s_lshr_b32 s13, s2, 16
; GFX8-NEXT: v_mul_u32_u24_e32 v5, v5, v12
; GFX8-NEXT: v_lshlrev_b16_e64 v8, 12, s6
; GFX8-NEXT: v_lshlrev_b16_e64 v15, 12, s13
; GFX8-NEXT: s_lshr_b32 s5, s0, 20
; GFX8-NEXT: s_lshr_b32 s12, s2, 20
; GFX8-NEXT: v_ashrrev_i16_e32 v7, 12, v7
; GFX8-NEXT: v_ashrrev_i16_e32 v14, 12, v14 ; GFX8-NEXT: v_ashrrev_i16_e32 v14, 12, v14
; GFX8-NEXT: v_lshlrev_b16_e64 v16, 12, s0 ; GFX8-NEXT: v_lshlrev_b16_e64 v9, 12, s5
; GFX8-NEXT: v_lshlrev_b16_e64 v18, 12, s1 ; GFX8-NEXT: v_lshlrev_b16_e64 v16, 12, s12
; GFX8-NEXT: s_lshr_b32 s4, s0, 24
; GFX8-NEXT: s_lshr_b32 s11, s2, 24
; GFX8-NEXT: v_ashrrev_i16_e32 v8, 12, v8
; GFX8-NEXT: v_ashrrev_i16_e32 v15, 12, v15 ; GFX8-NEXT: v_ashrrev_i16_e32 v15, 12, v15
; GFX8-NEXT: v_ashrrev_i16_e32 v17, 12, v17 ; GFX8-NEXT: v_lshlrev_b16_e64 v10, 12, s4
; GFX8-NEXT: v_lshlrev_b16_e64 v17, 12, s11
; GFX8-NEXT: s_lshr_b32 s1, s0, 28
; GFX8-NEXT: s_lshr_b32 s10, s2, 28
; GFX8-NEXT: v_ashrrev_i16_e32 v9, 12, v9
; GFX8-NEXT: v_ashrrev_i16_e32 v16, 12, v16 ; GFX8-NEXT: v_ashrrev_i16_e32 v16, 12, v16
; GFX8-NEXT: v_lshlrev_b16_e64 v11, 12, s1
; GFX8-NEXT: v_lshlrev_b16_e64 v18, 12, s10
; GFX8-NEXT: v_ashrrev_i16_e32 v10, 12, v10
; GFX8-NEXT: v_ashrrev_i16_e32 v17, 12, v17
; GFX8-NEXT: v_ashrrev_i16_e32 v11, 12, v11
; GFX8-NEXT: v_ashrrev_i16_e32 v18, 12, v18 ; GFX8-NEXT: v_ashrrev_i16_e32 v18, 12, v18
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, v3, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v3, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v6, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v6, v13, v2
; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX8-NEXT: v_add_u32_sdwa v2, vcc, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX8-NEXT: v_mad_u32_u24 v2, v9, v10, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v7, v14, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v11, v12, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v8, v15, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v13, v14, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v9, v16, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v15, v17, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v10, v17, v2
; GFX8-NEXT: v_mad_u32_u24 v2, v16, v18, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, v11, v18, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: idot8_acc16_vecMul: ; GFX9-LABEL: idot8_acc16_vecMul:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s4, s2, 15
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40004
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-NEXT: s_lshr_b32 s12, s2, 28
; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40014
; GFX9-NEXT: s_pack_ll_b32_b16 s2, s10, s2
; GFX9-NEXT: v_pk_lshlrev_b16 v2, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s2, s11, s12
; GFX9-NEXT: s_bfe_u32 s7, s6, 0x40018
; GFX9-NEXT: s_lshr_b32 s13, s6, 28
; GFX9-NEXT: s_bfe_u32 s14, s6, 0x40010
; GFX9-NEXT: s_bfe_u32 s15, s6, 0x40014
; GFX9-NEXT: s_bfe_u32 s16, s6, 0x40008
; GFX9-NEXT: s_bfe_u32 s17, s6, 0x4000c
; GFX9-NEXT: s_and_b32 s18, s6, 15
; GFX9-NEXT: s_bfe_u32 s6, s6, 0x40004
; GFX9-NEXT: v_pk_lshlrev_b16 v3, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT: s_pack_ll_b32_b16 s2, s18, s6
; GFX9-NEXT: v_pk_lshlrev_b16 v0, 12, s4 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v4, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s4, s8, s9
; GFX9-NEXT: s_pack_ll_b32_b16 s2, s16, s17
; GFX9-NEXT: v_pk_lshlrev_b16 v5, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v1, 12, s4 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s2, s14, s15
; GFX9-NEXT: v_pk_ashrrev_i16 v0, 12, v0 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v1, 12, v1 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v5, 12, v5 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v6, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_mul_lo_u16 v5, v1, v5
; GFX9-NEXT: v_pk_mul_lo_u16 v4, v0, v4
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_pk_ashrrev_i16 v2, 12, v2 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v6, 12, v6 op_sel_hi:[0,1]
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NEXT: v_pk_mul_lo_u16 v2, v2, v6
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: global_load_ushort v6, v[0:1], off
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_pack_ll_b32_b16 s2, s7, s13
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: v_pk_lshlrev_b16 v7, 12, s2 op_sel_hi:[0,1]
; GFX9-NEXT: s_and_b32 s5, s4, 15
; GFX9-NEXT: s_bfe_u32 s6, s4, 0x40004
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX9-NEXT: s_pack_ll_b32_b16 s1, s5, s6
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x4000c
; GFX9-NEXT: v_pk_lshlrev_b16 v3, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s5, s6
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40014
; GFX9-NEXT: v_pk_lshlrev_b16 v4, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: s_bfe_u32 s13, s2, 0x40018
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s9, s10
; GFX9-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-NEXT: v_pk_lshlrev_b16 v5, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v7, 12, s1 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s13, s2
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s4, 0x4000c
; GFX9-NEXT: v_pk_lshlrev_b16 v6, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s7, s8
; GFX9-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1] ; GFX9-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v7, 12, v7 op_sel_hi:[0,1] ; GFX9-NEXT: v_pk_ashrrev_i16 v7, 12, v7 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v8, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_mul_lo_u16 v3, v3, v7 ; GFX9-NEXT: v_pk_mul_lo_u16 v3, v3, v7
; GFX9-NEXT: s_bfe_u32 s11, s4, 0x40010
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40014
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s11, s12
; GFX9-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v8, 12, v8 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v9, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: s_bfe_u32 s14, s4, 0x40018
; GFX9-NEXT: s_lshr_b32 s4, s4, 28
; GFX9-NEXT: v_pk_mul_lo_u16 v4, v4, v8
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s14, s4
; GFX9-NEXT: v_pk_ashrrev_i16 v5, 12, v5 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v9, 12, v9 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_lshlrev_b16 v10, 12, s0 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_mul_lo_u16 v5, v5, v9
; GFX9-NEXT: v_pk_ashrrev_i16 v6, 12, v6 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_ashrrev_i16 v10, 12, v10 op_sel_hi:[0,1]
; GFX9-NEXT: v_pk_mul_lo_u16 v6, v6, v10
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-NEXT: v_add_u32_e32 v6, v4, v6
; GFX9-NEXT: v_add_u32_sdwa v4, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-NEXT: v_add_u32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v4, v4, v2
; GFX9-NEXT: v_add_u32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v3
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v6
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: idot8_acc16_vecMul: ; GFX9-DL-LABEL: idot8_acc16_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s4, s2, 15
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s12, s2, 28
; GFX9-DL-NEXT: s_bfe_u32 s2, s2, 0x40014
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s10, s2
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v2, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s11, s12
; GFX9-DL-NEXT: s_bfe_u32 s7, s6, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s13, s6, 28
; GFX9-DL-NEXT: s_bfe_u32 s14, s6, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s15, s6, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s16, s6, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s17, s6, 0x4000c
; GFX9-DL-NEXT: s_and_b32 s18, s6, 15
; GFX9-DL-NEXT: s_bfe_u32 s6, s6, 0x40004
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v3, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s4, s4, s5
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s18, s6
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v0, 12, s4 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v4, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s4, s8, s9
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s16, s17
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v5, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v1, 12, s4 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s14, s15
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v0, 12, v0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v1, 12, v1 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v5 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v5, v1, v5
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, v0, v4
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v2, 12, v2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v6, 12, v6 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v2, v2, v6
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: global_load_ushort v6, v[0:1], off
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s7, s13
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s2 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_and_b32 s5, s4, 15
; GFX9-DL-NEXT: s_bfe_u32 s6, s4, 0x40004
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s5, s6
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x4000c
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v3, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s5, s6
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40014
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v4, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_bfe_u32 s13, s2, 0x40018
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s9, s10
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v5, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s1 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s13, s2
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x4000c
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s7, s8
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1] ; GFX9-DL-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v7, 12, v7 op_sel_hi:[0,1] ; GFX9-DL-NEXT: v_pk_ashrrev_i16 v7, 12, v7 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v8, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v7 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v7
; GFX9-DL-NEXT: s_bfe_u32 s11, s4, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s12, s4, 0x40014
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s11, s12
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v8, 12, v8 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v9, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: s_bfe_u32 s14, s4, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v8
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s14, s4
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v5 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v9, 12, v9 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_lshlrev_b16 v10, 12, s0 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v5, v5, v9
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v6, 12, v6 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_ashrrev_i16 v10, 12, v10 op_sel_hi:[0,1]
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v6, v6, v10
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v6, v4, v6
; GFX9-DL-NEXT: v_add_u32_sdwa v4, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-DL-NEXT: v_add_u32_sdwa v4, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v4, v4, v2
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v3
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v6
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: idot8_acc16_vecMul: ; GFX10-DL-LABEL: idot8_acc16_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s5, s0, 15
; GFX10-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s0, 0x40004
; GFX10-DL-NEXT: s_and_b32 s5, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s7, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s8, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX10-DL-NEXT: s_lshr_b32 s4, s0, 28
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40008
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s6 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s6
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s7, s7, s8 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s7, s7, s8
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v3, 12, s0 op_sel_hi:[0,1] ; GFX10-DL-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v4, 12, s5 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v3, 12, s5 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s6 ; GFX10-DL-NEXT: s_bfe_u32 s0, s0, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014 ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v4, 12, s7 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s8, s1, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x4000c
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_ashrrev_i16 v3, 12, v3 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40010 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s6, s0
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v4 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40010
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s1 op_sel_hi:[0,1] ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s8, s5
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v5, 12, s7 op_sel_hi:[0,1] ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40018
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s5 ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v5, 12, s0 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s0, s1, 0x40014
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v4
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s6, s8 ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s5 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40018 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s9, s10
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v5 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v5 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s6, s0
; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v6 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v6 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40018 ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s5 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s0 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s1 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s5, s2
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v6 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s6, s4
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v6, 12, v7 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s0 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s0 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v8, 12, s1 op_sel_hi:[0,1] ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s2, s4
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v5, v5, v6 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v6, 12, v7 op_sel_hi:[0,1] ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s7, s1
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v7, 12, v8 op_sel_hi:[0,1] ; GFX10-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v7 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v7, v6, v7 ; GFX10-DL-NEXT: v_pk_lshlrev_b16 v7, 12, s1 op_sel_hi:[0,1]
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v3, 12, v6 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_pk_lshlrev_b16 v6, 12, s0 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, v3, v5
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v5, 12, v7 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_pk_ashrrev_i16 v4, 12, v6 op_sel_hi:[0,1]
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, v4, v5
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v4
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v5
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v7
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i16 addrspace(1)* nocapture %dst) { i16 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 373 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: idot8_acc8_vecMul: ; GFX10-DL-LABEL: idot8_acc8_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 4 ; GFX10-DL-NEXT: s_lshr_b32 s8, s0, 4
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 4 ; GFX10-DL-NEXT: s_lshr_b32 s15, s1, 4
; GFX10-DL-NEXT: s_lshr_b32 s6, s4, 12 ; GFX10-DL-NEXT: s_lshr_b32 s9, s0, 12
; GFX10-DL-NEXT: s_lshr_b32 s7, s5, 12 ; GFX10-DL-NEXT: s_lshr_b32 s16, s1, 12
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 12, s4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s0 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 12, s0
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v7, 12, s8
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v12, 12, s15
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s1 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 12, s1
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 12, s6 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v14, 12, s16
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v7, 12, s7 ; GFX10-DL-NEXT: s_lshr_b32 s10, s0, 8
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v8, 12, s5 ; GFX10-DL-NEXT: s_lshr_b32 s17, s1, 8
; GFX10-DL-NEXT: s_lshr_b32 s8, s4, 8 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 12, s9
; GFX10-DL-NEXT: s_lshr_b32 s0, s5, 8 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v7, 12, v7
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v12, 12, v12
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 12, s10
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v3, 12, v3
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v4
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v5, 12, v5 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v13, 12, s17
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v9, 12, s8 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v7, v7, v12
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v10, 12, s0 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v19, 12, v6
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v7, 12, v7 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v14, 12, v14
; GFX10-DL-NEXT: s_lshr_b32 s4, s0, 20
; GFX10-DL-NEXT: s_lshr_b32 s5, s0, 16
; GFX10-DL-NEXT: s_lshr_b32 s6, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s7, s0, 24
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, v3, v4 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, v3, v4
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v6, 12, v6 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, v19, v14
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v8, 12, v8 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 8, v7
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v4, 12, v9 ; GFX10-DL-NEXT: s_lshr_b32 s11, s1, 20
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, v5, v7 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v12, 12, v13
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 20 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v5, 12, v5
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v9, 12, v10 ; GFX10-DL-NEXT: s_lshr_b32 s12, s1, 16
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 20 ; GFX10-DL-NEXT: v_or_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, v6, v8 ; GFX10-DL-NEXT: s_lshr_b32 s13, s1, 28
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v3 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v8, 12, s7
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v7, 12, s0
; GFX10-DL-NEXT: s_lshr_b32 s8, s5, 16
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v8, 12, s1
; GFX10-DL-NEXT: s_lshr_b32 s9, s5, 28
; GFX10-DL-NEXT: v_or_b32_sdwa v3, v6, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: s_lshr_b32 s7, s4, 28
; GFX10-DL-NEXT: s_lshr_b32 s6, s4, 16
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, v4, v9
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 8, v5
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v10, 12, s9
; GFX10-DL-NEXT: s_lshr_b32 s0, s4, 24
; GFX10-DL-NEXT: s_lshr_b32 s1, s5, 24
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 12, s7
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v9, 12, s6 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v9, 12, s6
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v10, 12, s5
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v11, 12, s4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v13, 12, s11
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, v5, v12
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v4, 8, v4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v7, 12, s12
; GFX10-DL-NEXT: s_lshr_b32 s14, s1, 24
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v6, 12, v8
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v8, 12, v9
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v9, 12, v10
; GFX10-DL-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_or_b32_sdwa v4, v4, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v16, 12, s13
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v5, 12, v11
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v10, 12, v13
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v15, 12, s14
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v7, 12, v7 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v7, 12, v7
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v8, 12, v8 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v11, 12, v16
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v13, 12, s8
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v11, 12, s0
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v12, 12, s1
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v15, 12, v9
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v19, 12, v6
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v9, 12, v13
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v10, 12, v10
; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4 ; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v7, v7, v8 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, v5, v10
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v11, 12, v11 ; GFX10-DL-NEXT: v_ashrrev_i16_e64 v12, 12, v15
; GFX10-DL-NEXT: v_ashrrev_i16_e64 v12, 12, v12 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v10, v9, v7
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, v19, v10 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v8, v8, v11
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, v15, v9 ; GFX10-DL-NEXT: v_lshrrev_b32_e32 v9, 8, v4
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v8, 8, v4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 8, v6
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v7 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v5
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v7, v11, v12 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, v6, v12
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v8 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 8, v8
; GFX10-DL-NEXT: v_or_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v9
; GFX10-DL-NEXT: v_or_b32_sdwa v5, v7, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-DL-NEXT: v_or_b32_sdwa v3, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_2 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_2
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v5 ; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v5
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v3, 8, v4 ; GFX10-DL-NEXT: v_lshrrev_b32_e32 v3, 8, v4
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
Show All 35 Lines

llvm/test/CodeGen/AMDGPU/idot8u.ll

Show All 9 Lines
; GFX7-LABEL: udot8_acc32: ; GFX7-LABEL: udot8_acc32:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s10, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s21, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s8, s0, 28 ; GFX7-NEXT: s_lshr_b32 s1, s0, 28
; GFX7-NEXT: s_lshr_b32 s15, s1, 28 ; GFX7-NEXT: s_lshr_b32 s11, s10, 28
; GFX7-NEXT: s_bfe_u32 s16, s1, 0x40018 ; GFX7-NEXT: s_bfe_u32 s15, s10, 0x40018
; GFX7-NEXT: s_bfe_u32 s17, s1, 0x40014 ; GFX7-NEXT: s_bfe_u32 s16, s10, 0x40014
; GFX7-NEXT: s_bfe_u32 s18, s1, 0x40010 ; GFX7-NEXT: s_bfe_u32 s17, s10, 0x40010
; GFX7-NEXT: s_bfe_u32 s19, s1, 0x4000c ; GFX7-NEXT: s_bfe_u32 s18, s10, 0x4000c
; GFX7-NEXT: s_bfe_u32 s20, s1, 0x40008 ; GFX7-NEXT: s_bfe_u32 s19, s10, 0x40008
; GFX7-NEXT: s_bfe_u32 s21, s1, 0x40004 ; GFX7-NEXT: s_bfe_u32 s20, s10, 0x40004
; GFX7-NEXT: s_and_b32 s1, s1, 15 ; GFX7-NEXT: s_and_b32 s10, s10, 15
; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40018 ; GFX7-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX7-NEXT: s_bfe_u32 s10, s0, 0x40014 ; GFX7-NEXT: s_bfe_u32 s8, s0, 0x40014
; GFX7-NEXT: s_bfe_u32 s11, s0, 0x40010 ; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c ; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c
; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008 ; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008
; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004 ; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004
; GFX7-NEXT: s_and_b32 s0, s0, 15 ; GFX7-NEXT: s_and_b32 s0, s0, 15
; GFX7-NEXT: v_mov_b32_e32 v0, s1 ; GFX7-NEXT: v_mov_b32_e32 v0, s10
; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s21 ; GFX7-NEXT: v_mov_b32_e32 v1, s21
; GFX7-NEXT: v_mad_u32_u24 v0, s14, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s20 ; GFX7-NEXT: v_mov_b32_e32 v1, s20
; GFX7-NEXT: v_mad_u32_u24 v0, s13, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s14, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s19 ; GFX7-NEXT: v_mov_b32_e32 v1, s19
; GFX7-NEXT: v_mad_u32_u24 v0, s12, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s13, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s18 ; GFX7-NEXT: v_mov_b32_e32 v1, s18
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s17 ; GFX7-NEXT: v_mov_b32_e32 v1, s17
; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s15 ; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s15
; GFX7-NEXT: v_mad_u32_u24 v0, s2, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: v_mad_u32_u24 v0, s1, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc32: ; GFX8-LABEL: udot8_acc32:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s0, s2, 28 ; GFX8-NEXT: s_lshr_b32 s4, s2, 28
; GFX8-NEXT: s_lshr_b32 s11, s4, 28 ; GFX8-NEXT: s_lshr_b32 s7, s6, 28
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX8-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX8-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX8-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX8-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX8-NEXT: s_and_b32 s4, s4, 15 ; GFX8-NEXT: s_and_b32 s6, s6, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX8-NEXT: s_and_b32 s2, s2, 15 ; GFX8-NEXT: s_and_b32 s2, s2, 15
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v3, s17 ; GFX8-NEXT: v_mov_b32_e32 v1, s18
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s16 ; GFX8-NEXT: v_mov_b32_e32 v1, s17
; GFX8-NEXT: v_mad_u32_u24 v2, s9, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s16
; GFX8-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s14 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v1, s14
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s12 ; GFX8-NEXT: v_mov_b32_e32 v1, s13
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc32: ; GFX9-LABEL: udot8_acc32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_lshr_b32 s0, s2, 28 ; GFX9-NEXT: s_lshr_b32 s4, s2, 28
; GFX9-NEXT: s_lshr_b32 s11, s4, 28 ; GFX9-NEXT: s_lshr_b32 s7, s6, 28
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX9-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX9-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX9-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX9-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX9-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX9-NEXT: s_and_b32 s4, s4, 15 ; GFX9-NEXT: s_and_b32 s6, s6, 15
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX9-NEXT: s_and_b32 s2, s2, 15 ; GFX9-NEXT: s_and_b32 s2, s2, 15
; GFX9-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX9-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s17 ; GFX9-NEXT: v_mov_b32_e32 v1, s18
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: v_mov_b32_e32 v1, s17
; GFX9-NEXT: v_mad_u32_u24 v2, s9, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s16
; GFX9-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: v_mov_b32_e32 v1, s15
; GFX9-NEXT: v_mad_u32_u24 v2, s7, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v1, s14
; GFX9-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s12 ; GFX9-NEXT: v_mov_b32_e32 v1, s13
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc32: ; GFX9-DL-LABEL: udot8_acc32:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s6
; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s4, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc32: ; GFX10-DL-LABEL: udot8_acc32:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s4, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s2, s4, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_short v0, off, s[8:11], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc16: ; GFX8-LABEL: udot8_acc16:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX8-NEXT: s_lshr_b32 s14, s4, 28
; GFX8-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s4 ; GFX8-NEXT: v_mov_b32_e32 v5, s4
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v6, s7
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s8 ; GFX8-NEXT: v_mov_b32_e32 v7, s8
; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s10 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s9
; GFX8-NEXT: v_mov_b32_e32 v9, s12 ; GFX8-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v9, s11
; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s14 ; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc16: ; GFX9-LABEL: udot8_acc16:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: s_and_b32 s1, s0, 15
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX9-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX9-NEXT: s_lshr_b32 s14, s4, 28
; GFX9-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v6, s4 ; GFX9-NEXT: v_mov_b32_e32 v5, s4
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v6, s7
; GFX9-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v7, s8 ; GFX9-NEXT: v_mov_b32_e32 v7, s8
; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX9-NEXT: v_mov_b32_e32 v8, s9
; GFX9-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v9, s11
; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc16: ; GFX9-DL-LABEL: udot8_acc16:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: s_and_b32 s1, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s14, s4, 28
; GFX9-DL-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s4
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s7
; GFX9-DL-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s8 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s8
; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s9
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-DL-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s11
; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc16: ; GFX10-DL-LABEL: udot8_acc16:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s11, s2, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s12, s4, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s13, s2, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s14, s4, 0x40014
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40008
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x4000c
; GFX10-DL-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s8, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s9, s10, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s11, s12, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s13, s14, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40010
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40014
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i16 addrspace(1)* nocapture %dst) { i16 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc8: ; GFX8-LABEL: udot8_acc8:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX8-NEXT: s_lshr_b32 s14, s4, 28
; GFX8-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s4 ; GFX8-NEXT: v_mov_b32_e32 v5, s4
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v6, s7
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s8 ; GFX8-NEXT: v_mov_b32_e32 v7, s8
; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s10 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s9
; GFX8-NEXT: v_mov_b32_e32 v9, s12 ; GFX8-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v9, s11
; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_and_b32_e32 v2, 0xff, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s14 ; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc8: ; GFX9-LABEL: udot8_acc8:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: s_and_b32 s1, s0, 15
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX9-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX9-NEXT: s_lshr_b32 s14, s4, 28
; GFX9-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v6, s4 ; GFX9-NEXT: v_mov_b32_e32 v5, s4
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v6, s7
; GFX9-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v7, s8 ; GFX9-NEXT: v_mov_b32_e32 v7, s8
; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX9-NEXT: v_mov_b32_e32 v8, s9
; GFX9-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v9, s11
; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NEXT: v_and_b32_e32 v2, 0xff, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc8: ; GFX9-DL-LABEL: udot8_acc8:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: s_and_b32 s1, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s14, s4, 28
; GFX9-DL-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s5
; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s4
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s7
; GFX9-DL-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s8 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s8
; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s10 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s9
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s12 ; GFX9-DL-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s11
; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 0xff, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc8: ; GFX10-DL-LABEL: udot8_acc8:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s11, s2, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s12, s4, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s13, s2, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s14, s4, 0x40014
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40008
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x4000c
; GFX10-DL-NEXT: v_and_b32_e32 v2, 0xff, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 0xff, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s8, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s9, s10, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s11, s12, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s13, s14, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40010
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40014
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i8 addrspace(1)* nocapture %dst) { i8 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc4: ; GFX8-LABEL: udot8_acc4:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: v_mov_b32_e32 v5, s7
; GFX8-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s6 ; GFX8-NEXT: v_mov_b32_e32 v6, s6
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX8-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX8-NEXT: v_and_b32_e32 v5, 15, v5
; GFX8-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s9 ; GFX8-NEXT: v_mov_b32_e32 v7, s6
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX8-NEXT: s_lshr_b32 s11, s2, 28
; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s11 ; GFX8-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s8
; GFX8-NEXT: s_lshr_b32 s4, s4, 28 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v9, s13 ; GFX8-NEXT: v_mov_b32_e32 v9, s2
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v5, v2 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v5, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc4: ; GFX9-LABEL: udot8_acc4:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-NEXT: s_and_b32 s1, s0, 15
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-NEXT: v_mov_b32_e32 v5, s7
; GFX9-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-NEXT: v_mov_b32_e32 v6, s6
; GFX9-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-NEXT: v_mov_b32_e32 v7, s6
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-NEXT: v_mov_b32_e32 v8, s8
; GFX9-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-NEXT: v_mov_b32_e32 v9, s2
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc4: ; GFX9-DL-LABEL: udot8_acc4:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-DL-NEXT: s_and_b32 s1, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7
; GFX9-DL-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6
; GFX9-DL-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-DL-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s6
; GFX9-DL-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-DL-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-DL-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-DL-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s8
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v9, s2
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s11
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc4: ; GFX10-DL-LABEL: udot8_acc4:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s9, s4, 0x40008
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s8, s0 ; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s7, v2
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s4, s5
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s9, v2 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i4 addrspace(1)* nocapture %dst) { i4 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_CommutationInsideMAD: ; GFX8-LABEL: udot8_CommutationInsideMAD:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: v_mov_b32_e32 v5, s7
; GFX8-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s6 ; GFX8-NEXT: v_mov_b32_e32 v6, s6
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX8-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX8-NEXT: v_and_b32_e32 v5, 15, v5
; GFX8-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s9 ; GFX8-NEXT: v_mov_b32_e32 v7, s6
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX8-NEXT: s_lshr_b32 s11, s2, 28
; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s11 ; GFX8-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s8
; GFX8-NEXT: s_lshr_b32 s4, s4, 28 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v9, s13 ; GFX8-NEXT: v_mov_b32_e32 v9, s2
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v5 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v5
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_CommutationInsideMAD: ; GFX9-LABEL: udot8_CommutationInsideMAD:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-NEXT: s_and_b32 s1, s0, 15
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-NEXT: v_mov_b32_e32 v5, s7
; GFX9-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-NEXT: v_mov_b32_e32 v6, s6
; GFX9-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-NEXT: v_mov_b32_e32 v7, s6
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-NEXT: v_mov_b32_e32 v8, s8
; GFX9-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-NEXT: v_mov_b32_e32 v9, s2
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: v_add_u32_e32 v2, v5, v2 ; GFX9-NEXT: v_add_u32_e32 v2, v5, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_CommutationInsideMAD: ; GFX9-DL-LABEL: udot8_CommutationInsideMAD:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-DL-NEXT: s_and_b32 s1, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7
; GFX9-DL-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6
; GFX9-DL-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-DL-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s6
; GFX9-DL-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-DL-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-DL-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-DL-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s8
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v9, s2
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: v_add_u32_e32 v2, v5, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v5, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s11
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_CommutationInsideMAD: ; GFX10-DL-LABEL: udot8_CommutationInsideMAD:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s8, s1, 0x4000c
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40008
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s8, s1 ; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s4, s8
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40014
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s0, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s7, v2
; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i4 addrspace(1)* nocapture %dst) { i4 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX7-LABEL: udot8_multiuses_mul1: ; GFX7-LABEL: udot8_multiuses_mul1:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s10, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s21, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s8, s0, 28 ; GFX7-NEXT: s_lshr_b32 s1, s0, 28
; GFX7-NEXT: s_bfe_u32 s21, s1, 0x40004 ; GFX7-NEXT: s_bfe_u32 s20, s10, 0x40004
; GFX7-NEXT: s_lshr_b32 s15, s1, 28 ; GFX7-NEXT: s_lshr_b32 s11, s10, 28
; GFX7-NEXT: s_bfe_u32 s16, s1, 0x40018 ; GFX7-NEXT: s_bfe_u32 s15, s10, 0x40018
; GFX7-NEXT: s_bfe_u32 s17, s1, 0x40014 ; GFX7-NEXT: s_bfe_u32 s16, s10, 0x40014
; GFX7-NEXT: s_bfe_u32 s18, s1, 0x40010 ; GFX7-NEXT: s_bfe_u32 s17, s10, 0x40010
; GFX7-NEXT: s_bfe_u32 s19, s1, 0x4000c ; GFX7-NEXT: s_bfe_u32 s18, s10, 0x4000c
; GFX7-NEXT: s_bfe_u32 s20, s1, 0x40008 ; GFX7-NEXT: s_bfe_u32 s19, s10, 0x40008
; GFX7-NEXT: s_and_b32 s1, s1, 15 ; GFX7-NEXT: s_and_b32 s10, s10, 15
; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40018 ; GFX7-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX7-NEXT: s_bfe_u32 s10, s0, 0x40014 ; GFX7-NEXT: s_bfe_u32 s8, s0, 0x40014
; GFX7-NEXT: s_bfe_u32 s11, s0, 0x40010 ; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c ; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c
; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008 ; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008
; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004 ; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004
; GFX7-NEXT: s_and_b32 s0, s0, 15 ; GFX7-NEXT: s_and_b32 s0, s0, 15
; GFX7-NEXT: v_mov_b32_e32 v0, s1 ; GFX7-NEXT: v_mov_b32_e32 v0, s10
; GFX7-NEXT: v_mov_b32_e32 v1, s2 ; GFX7-NEXT: v_mov_b32_e32 v1, s21
; GFX7-NEXT: v_mad_u32_u24 v1, s0, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s21 ; GFX7-NEXT: v_mov_b32_e32 v2, s20
; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1
; GFX7-NEXT: v_mad_u32_u24 v1, s14, v2, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s14, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s20
; GFX7-NEXT: v_mad_u32_u24 v1, s13, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s19 ; GFX7-NEXT: v_mov_b32_e32 v2, s19
; GFX7-NEXT: v_mad_u32_u24 v1, s12, v2, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s13, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s18 ; GFX7-NEXT: v_mov_b32_e32 v2, s18
; GFX7-NEXT: v_mad_u32_u24 v1, s11, v2, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s12, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s17 ; GFX7-NEXT: v_mov_b32_e32 v2, s17
; GFX7-NEXT: v_mad_u32_u24 v1, s10, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s16
; GFX7-NEXT: v_mad_u32_u24 v1, s9, v2, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s15 ; GFX7-NEXT: v_mov_b32_e32 v2, s16
; GFX7-NEXT: v_mad_u32_u24 v1, s8, v2, v1 ; GFX7-NEXT: v_mad_u32_u24 v1, s8, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s15
; GFX7-NEXT: v_mad_u32_u24 v1, s2, v2, v1
; GFX7-NEXT: v_mov_b32_e32 v2, s11
; GFX7-NEXT: v_mad_u32_u24 v1, s1, v2, v1
; GFX7-NEXT: v_add_i32_e32 v0, vcc, v1, v0 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_multiuses_mul1: ; GFX8-LABEL: udot8_multiuses_mul1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s0, s2, 28 ; GFX8-NEXT: s_lshr_b32 s4, s2, 28
; GFX8-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX8-NEXT: s_lshr_b32 s11, s4, 28 ; GFX8-NEXT: s_lshr_b32 s7, s6, 28
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX8-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX8-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX8-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX8-NEXT: s_and_b32 s4, s4, 15 ; GFX8-NEXT: s_and_b32 s6, s6, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX8-NEXT: s_and_b32 s2, s2, 15 ; GFX8-NEXT: s_and_b32 s2, s2, 15
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: v_mad_u32_u24 v3, s2, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s17 ; GFX8-NEXT: v_mov_b32_e32 v2, s18
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX8-NEXT: v_mad_u32_u24 v3, s10, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s12, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s16 ; GFX8-NEXT: v_mov_b32_e32 v2, s17
; GFX8-NEXT: v_mad_u32_u24 v3, s9, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s11, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s15 ; GFX8-NEXT: v_mov_b32_e32 v2, s16
; GFX8-NEXT: v_mad_u32_u24 v3, s8, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s10, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s14 ; GFX8-NEXT: v_mov_b32_e32 v2, s15
; GFX8-NEXT: v_mad_u32_u24 v3, s7, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s13 ; GFX8-NEXT: v_mov_b32_e32 v2, s14
; GFX8-NEXT: v_mad_u32_u24 v3, s6, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s8, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s12 ; GFX8-NEXT: v_mov_b32_e32 v2, s13
; GFX8-NEXT: v_mad_u32_u24 v3, s1, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s5, v2, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s11 ; GFX8-NEXT: v_mov_b32_e32 v2, s7
; GFX8-NEXT: v_mad_u32_u24 v3, s0, v4, v3 ; GFX8-NEXT: v_mad_u32_u24 v1, s4, v2, v1
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v3, v2 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_multiuses_mul1: ; GFX9-LABEL: udot8_multiuses_mul1:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_lshr_b32 s0, s2, 28 ; GFX9-NEXT: s_lshr_b32 s4, s2, 28
; GFX9-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX9-NEXT: s_lshr_b32 s11, s4, 28 ; GFX9-NEXT: s_lshr_b32 s7, s6, 28
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX9-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX9-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX9-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX9-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX9-NEXT: s_and_b32 s4, s4, 15 ; GFX9-NEXT: s_and_b32 s6, s6, 15
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX9-NEXT: s_and_b32 s2, s2, 15 ; GFX9-NEXT: s_and_b32 s2, s2, 15
; GFX9-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: v_mad_u32_u24 v3, s2, v2, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s2, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s17 ; GFX9-NEXT: v_mov_b32_e32 v2, s18
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX9-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX9-NEXT: v_mad_u32_u24 v3, s10, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s12, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s16 ; GFX9-NEXT: v_mov_b32_e32 v2, s17
; GFX9-NEXT: v_mad_u32_u24 v3, s9, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s11, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s15 ; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_mad_u32_u24 v3, s8, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s10, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s14 ; GFX9-NEXT: v_mov_b32_e32 v2, s15
; GFX9-NEXT: v_mad_u32_u24 v3, s7, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s13 ; GFX9-NEXT: v_mov_b32_e32 v2, s14
; GFX9-NEXT: v_mad_u32_u24 v3, s6, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s8, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s12 ; GFX9-NEXT: v_mov_b32_e32 v2, s13
; GFX9-NEXT: v_mad_u32_u24 v3, s1, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s5, v2, v1
; GFX9-NEXT: v_mov_b32_e32 v4, s11 ; GFX9-NEXT: v_mov_b32_e32 v2, s7
; GFX9-NEXT: v_mad_u32_u24 v3, s0, v4, v3 ; GFX9-NEXT: v_mad_u32_u24 v1, s4, v2, v1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v3 ; GFX9-NEXT: v_add_u32_e32 v2, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_multiuses_mul1: ; GFX9-DL-LABEL: udot8_multiuses_mul1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_lshr_b32 s0, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s4, s2, 28
; GFX9-DL-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX9-DL-NEXT: s_lshr_b32 s11, s4, 28 ; GFX9-DL-NEXT: s_lshr_b32 s7, s6, 28
; GFX9-DL-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX9-DL-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX9-DL-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX9-DL-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX9-DL-NEXT: s_and_b32 s4, s4, 15 ; GFX9-DL-NEXT: s_and_b32 s6, s6, 15
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX9-DL-NEXT: s_and_b32 s2, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s2, s2, 15
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s6
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s19
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s2, v2, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s2, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s17 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s18
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s10, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s12, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s16 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s17
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s9, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s11, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s15 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s16
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s8, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s10, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s14 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s15
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s7, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s9, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s14
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s6, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s8, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s12 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s13
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s1, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s5, v2, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s11 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s7
; GFX9-DL-NEXT: v_mad_u32_u24 v3, s0, v4, v3 ; GFX9-DL-NEXT: v_mad_u32_u24 v1, s4, v2, v1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v3 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_multiuses_mul1: ; GFX10-DL-LABEL: udot8_multiuses_mul1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s6, s2, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s7, s4, 15
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s5
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x40008
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s7, v0
; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x4000c ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s5, s8, v0
; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s11, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s12, s4, 0x40010 ; GFX10-DL-NEXT: v_mad_u32_u24 v0, s6, s7, v0
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s9, s10, v1
; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x40010
; GFX10-DL-NEXT: v_mad_u32_u24 v1, s5, s8, v1
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s8, s4, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s9, s10, v1
; GFX10-DL-NEXT: s_bfe_u32 s14, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s9, s2, 0x40018
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s7, s8, v3 ; GFX10-DL-NEXT: s_bfe_u32 s10, s4, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s5, s8, v1
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s9, s10, v3 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s9, s10, v1
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s11, s12, v3 ; GFX10-DL-NEXT: v_mad_u32_u24 v1, s2, s4, v1
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s5, s6, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v0, v1
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s13, s14, v3 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mad_u32_u24 v3, s2, s4, v3 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; GFX7-LABEL: udot8_acc32_vecMul: ; GFX7-LABEL: udot8_acc32_vecMul:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0 ; GFX7-NEXT: s_load_dword s0, s[8:9], 0x0
; GFX7-NEXT: s_load_dword s1, s[10:11], 0x0 ; GFX7-NEXT: s_load_dword s10, s[10:11], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s21, s[4:5], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s8, s0, 28 ; GFX7-NEXT: s_lshr_b32 s1, s0, 28
; GFX7-NEXT: s_lshr_b32 s15, s1, 28 ; GFX7-NEXT: s_lshr_b32 s11, s10, 28
; GFX7-NEXT: s_bfe_u32 s16, s1, 0x40018 ; GFX7-NEXT: s_bfe_u32 s15, s10, 0x40018
; GFX7-NEXT: s_bfe_u32 s17, s1, 0x40014 ; GFX7-NEXT: s_bfe_u32 s16, s10, 0x40014
; GFX7-NEXT: s_bfe_u32 s18, s1, 0x40010 ; GFX7-NEXT: s_bfe_u32 s17, s10, 0x40010
; GFX7-NEXT: s_bfe_u32 s19, s1, 0x4000c ; GFX7-NEXT: s_bfe_u32 s18, s10, 0x4000c
; GFX7-NEXT: s_bfe_u32 s20, s1, 0x40008 ; GFX7-NEXT: s_bfe_u32 s19, s10, 0x40008
; GFX7-NEXT: s_bfe_u32 s21, s1, 0x40004 ; GFX7-NEXT: s_bfe_u32 s20, s10, 0x40004
; GFX7-NEXT: s_and_b32 s1, s1, 15 ; GFX7-NEXT: s_and_b32 s10, s10, 15
; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40018 ; GFX7-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX7-NEXT: s_bfe_u32 s10, s0, 0x40014 ; GFX7-NEXT: s_bfe_u32 s8, s0, 0x40014
; GFX7-NEXT: s_bfe_u32 s11, s0, 0x40010 ; GFX7-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c ; GFX7-NEXT: s_bfe_u32 s12, s0, 0x4000c
; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008 ; GFX7-NEXT: s_bfe_u32 s13, s0, 0x40008
; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004 ; GFX7-NEXT: s_bfe_u32 s14, s0, 0x40004
; GFX7-NEXT: s_and_b32 s0, s0, 15 ; GFX7-NEXT: s_and_b32 s0, s0, 15
; GFX7-NEXT: v_mov_b32_e32 v0, s1 ; GFX7-NEXT: v_mov_b32_e32 v0, s10
; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s21 ; GFX7-NEXT: v_mov_b32_e32 v1, s21
; GFX7-NEXT: v_mad_u32_u24 v0, s14, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s0, v0, v1
; GFX7-NEXT: v_mov_b32_e32 v1, s20 ; GFX7-NEXT: v_mov_b32_e32 v1, s20
; GFX7-NEXT: v_mad_u32_u24 v0, s13, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s14, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s19 ; GFX7-NEXT: v_mov_b32_e32 v1, s19
; GFX7-NEXT: v_mad_u32_u24 v0, s12, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s13, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s18 ; GFX7-NEXT: v_mov_b32_e32 v1, s18
; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s17 ; GFX7-NEXT: v_mov_b32_e32 v1, s17
; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s15 ; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s15
; GFX7-NEXT: v_mad_u32_u24 v0, s2, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s11
; GFX7-NEXT: v_mad_u32_u24 v0, s1, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc32_vecMul: ; GFX8-LABEL: udot8_acc32_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s0, s2, 28 ; GFX8-NEXT: s_lshr_b32 s4, s2, 28
; GFX8-NEXT: s_lshr_b32 s11, s4, 28 ; GFX8-NEXT: s_lshr_b32 s7, s6, 28
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX8-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX8-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX8-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX8-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX8-NEXT: s_and_b32 s4, s4, 15 ; GFX8-NEXT: s_and_b32 s6, s6, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX8-NEXT: s_and_b32 s2, s2, 15 ; GFX8-NEXT: s_and_b32 s2, s2, 15
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v3, s17 ; GFX8-NEXT: v_mov_b32_e32 v1, s18
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s16 ; GFX8-NEXT: v_mov_b32_e32 v1, s17
; GFX8-NEXT: v_mad_u32_u24 v2, s9, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s16
; GFX8-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s14 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v1, s14
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s12 ; GFX8-NEXT: v_mov_b32_e32 v1, s13
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc32_vecMul: ; GFX9-LABEL: udot8_acc32_vecMul:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s19, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_lshr_b32 s0, s2, 28 ; GFX9-NEXT: s_lshr_b32 s4, s2, 28
; GFX9-NEXT: s_lshr_b32 s11, s4, 28 ; GFX9-NEXT: s_lshr_b32 s7, s6, 28
; GFX9-NEXT: s_bfe_u32 s12, s4, 0x40018 ; GFX9-NEXT: s_bfe_u32 s13, s6, 0x40018
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s14, s6, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s15, s6, 0x40010
; GFX9-NEXT: s_bfe_u32 s15, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s16, s6, 0x4000c
; GFX9-NEXT: s_bfe_u32 s16, s4, 0x40008 ; GFX9-NEXT: s_bfe_u32 s17, s6, 0x40008
; GFX9-NEXT: s_bfe_u32 s17, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s18, s6, 0x40004
; GFX9-NEXT: s_and_b32 s4, s4, 15 ; GFX9-NEXT: s_and_b32 s6, s6, 15
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40018 ; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40018
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x40008 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40004
; GFX9-NEXT: s_and_b32 s2, s2, 15 ; GFX9-NEXT: s_and_b32 s2, s2, 15
; GFX9-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v2, v3 ; GFX9-NEXT: v_mad_u32_u24 v0, s2, v0, v1
; GFX9-NEXT: v_mov_b32_e32 v3, s17 ; GFX9-NEXT: v_mov_b32_e32 v1, s18
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s12, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: v_mov_b32_e32 v1, s17
; GFX9-NEXT: v_mad_u32_u24 v2, s9, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s16
; GFX9-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s10, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s14 ; GFX9-NEXT: v_mov_b32_e32 v1, s15
; GFX9-NEXT: v_mad_u32_u24 v2, s7, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v1, s14
; GFX9-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s8, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s12 ; GFX9-NEXT: v_mov_b32_e32 v1, s13
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc32_vecMul: ; GFX9-DL-LABEL: udot8_acc32_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s6, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s6
; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s2, v2, v3 ; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s4, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc32_vecMul: ; GFX10-DL-LABEL: udot8_acc32_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s4, s5, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s5
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s2, s4, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i32 addrspace(1)* nocapture %dst) { i32 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_short v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc16_vecMul: ; GFX8-LABEL: udot8_acc16_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ushort v2, v[0:1] ; GFX8-NEXT: flat_load_ushort v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s4, 0x40010
; GFX8-NEXT: s_bfe_u32 s10, s4, 0x40014
; GFX8-NEXT: s_bfe_u32 s12, s4, 0x40018
; GFX8-NEXT: s_lshr_b32 s14, s4, 28
; GFX8-NEXT: s_bfe_u32 s4, s4, 0x4000c
; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s4 ; GFX8-NEXT: v_mov_b32_e32 v5, s4
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s0, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v6, s7
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s8 ; GFX8-NEXT: v_mov_b32_e32 v7, s8
; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s10 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s13, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s9
; GFX8-NEXT: v_mov_b32_e32 v9, s12 ; GFX8-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v9, s11
; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 0xffff, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s6, v5, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s7, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s9, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s11, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s13, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s12, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s14 ; GFX8-NEXT: v_mov_b32_e32 v3, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc16_vecMul: ; GFX9-LABEL: udot8_acc16_vecMul:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s4
; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s5 ; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40004 ; GFX9-NEXT: s_lshr_b32 s13, s2, 28
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s6 ; GFX9-NEXT: s_and_b32 s4, s0, 15
; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_pack_ll_b32_b16 s4, s4, s5
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-NEXT: s_pack_ll_b32_b16 s11, s11, s13
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s1, s0, 0x40008
; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s7 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x4000c
; GFX9-NEXT: v_pk_mul_lo_u16 v3, s0, v3 ; GFX9-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40008 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s6 ; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s0, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s7 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40014
; GFX9-NEXT: v_pk_mul_lo_u16 v4, s1, v4 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s12, s0
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40010 ; GFX9-NEXT: v_mov_b32_e32 v4, s11
; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-NEXT: v_pk_mul_lo_u16 v4, s0, v4
; GFX9-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s8, s2
; GFX9-NEXT: s_lshr_b32 s4, s4, 28
; GFX9-NEXT: v_mov_b32_e32 v5, s0 ; GFX9-NEXT: v_mov_b32_e32 v5, s0
; GFX9-NEXT: s_pack_ll_b32_b16 s5, s5, s6 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s6, s7
; GFX9-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX9-NEXT: v_pk_mul_lo_u16 v3, s4, v3
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s5
; GFX9-NEXT: s_pack_ll_b32_b16 s1, s1, s4 ; GFX9-NEXT: v_mov_b32_e32 v6, s0
; GFX9-NEXT: v_pk_mul_lo_u16 v5, s5, v5 ; GFX9-NEXT: v_pk_mul_lo_u16 v6, s1, v6
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s2, s9, s10
; GFX9-NEXT: v_mov_b32_e32 v6, s1 ; GFX9-NEXT: v_pk_mul_lo_u16 v5, s2, v5
; GFX9-NEXT: v_pk_mul_lo_u16 v6, s0, v6
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-NEXT: v_add_u32_e32 v2, v3, v2
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_add_u32_e32 v2, v2, v6 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v4
; GFX9-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc16_vecMul: ; GFX9-DL-LABEL: udot8_acc16_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s4
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s5 ; GFX9-DL-NEXT: s_bfe_u32 s11, s2, 0x40018
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40004 ; GFX9-DL-NEXT: s_lshr_b32 s13, s2, 28
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s6 ; GFX9-DL-NEXT: s_and_b32 s4, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s4, s4, s5
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40008 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s11, s11, s13
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s1, s0, 0x40008
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s7 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x4000c
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, s0, v3 ; GFX9-DL-NEXT: s_bfe_u32 s9, s0, 0x40010
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40008 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s12, s0, 0x40018
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s6 ; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s0, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40010
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s7 ; GFX9-DL-NEXT: s_bfe_u32 s2, s2, 0x40014
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, s1, v4 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s12, s0
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40010 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s11
; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40014 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v4, s0, v4
; GFX9-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s8, s2
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 28
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s0
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s6 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s6, s7
; GFX9-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v3, s4, v3
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s5
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s1, s1, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v6, s0
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v5, s5, v5 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v6, s1, v6
; GFX9-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-DL-NEXT: s_pack_ll_b32_b16 s2, s9, s10
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s1 ; GFX9-DL-NEXT: v_pk_mul_lo_u16 v5, s2, v5
; GFX9-DL-NEXT: v_pk_mul_lo_u16 v6, s0, v6
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v3, v2
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v6 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v4
; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-DL-NEXT: v_add_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-DL-NEXT: global_store_short v[0:1], v2, off ; GFX9-DL-NEXT: global_store_short v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc16_vecMul: ; GFX10-DL-LABEL: udot8_acc16_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ushort v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s0, 0x40004
; GFX10-DL-NEXT: s_and_b32 s5, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s1 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s2, s2, s6
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40008
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s6 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s4, s4, s5
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40008
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s7, s7, s8 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, s2, s4
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x40010 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s4, s6, s7
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, s0, s5 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s8
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s1, s6 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s1, s2, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s6, s0, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s5, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s8, s1, 0x40014
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, s7, s0 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, s5, s4
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s8, s1 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s2, s2, s6
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s5, s6 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s5, s7, s8
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX10-DL-NEXT: s_pack_ll_b32_b16 s0, s4, s0
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s6, s1
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, s1, s5 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v3, s2, s5
; GFX10-DL-NEXT: s_pack_ll_b32_b16 s1, s6, s4
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:BYTE_0
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, s0, s1 ; GFX10-DL-NEXT: v_pk_mul_lo_u16 v4, s0, s1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v4 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v4
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: global_store_short v[0:1], v2, off ; GFX10-DL-NEXT: global_store_short v[0:1], v2, off
▲ Show 20 Lines • Show All 310 Lines • ▼ Show 20 Lines
; ;
; GFX10-DL-LABEL: udot8_acc8_vecMul: ; GFX10-DL-LABEL: udot8_acc8_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff ; GFX10-DL-NEXT: s_mov_b32 s2, 0xffff
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s1, s5, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x40004
; GFX10-DL-NEXT: s_and_b32 s6, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s6, s0, 15
; GFX10-DL-NEXT: s_and_b32 s8, s5, 15 ; GFX10-DL-NEXT: s_and_b32 s8, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s7, s0, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s9, s5, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s9, s1, 0x4000c
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, s0, s1 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v3, s4, s5
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, s6, s8 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v4, s6, s8
; GFX10-DL-NEXT: s_bfe_u32 s1, s5, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x40008
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s7, s9 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s7, s9
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v3 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v3
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40014
; GFX10-DL-NEXT: s_lshr_b32 s7, s4, 28 ; GFX10-DL-NEXT: s_bfe_u32 s6, s0, 0x40018
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, s0, s1 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, s4, s5
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 8, v5 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 8, v5
; GFX10-DL-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX10-DL-NEXT: v_or_b32_e32 v3, v4, v3
; GFX10-DL-NEXT: s_bfe_u32 s0, s5, 0x40014 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: s_lshr_b32 s9, s5, 28 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40010 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: v_or_b32_sdwa v4, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX10-DL-NEXT: v_or_b32_sdwa v4, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3 ; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s6, s0 ; GFX10-DL-NEXT: s_bfe_u32 s8, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s8, s5, 0x40010 ; GFX10-DL-NEXT: s_lshr_b32 s9, s1, 28
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x40018 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s5, s7
; GFX10-DL-NEXT: s_bfe_u32 s4, s5, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s1, s1, 0x40018
; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4 ; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v4
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v5, 8, v5 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, s4, s8
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v6, s1, s8 ; GFX10-DL-NEXT: v_mul_lo_u16_e64 v7, s0, s9
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v7, s7, s9 ; GFX10-DL-NEXT: v_lshrrev_b32_e32 v8, 8, v4
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v8, s0, s4 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v7, 8, v7
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v9, 8, v4
; GFX10-DL-NEXT: v_or_b32_e32 v5, v6, v5
; GFX10-DL-NEXT: v_lshlrev_b16_e64 v6, 8, v7
; GFX10-DL-NEXT: v_and_b32_e32 v5, s2, v5
; GFX10-DL-NEXT: v_or_b32_sdwa v6, v8, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-DL-NEXT: v_or_b32_e32 v11, v5, v6
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v7, 8, v11
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v3, v2
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v9 ; GFX10-DL-NEXT: v_lshlrev_b16_e64 v3, 8, v5
; GFX10-DL-NEXT: v_mul_lo_u16_e64 v5, s6, s1
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v8
; GFX10-DL-NEXT: v_or_b32_e32 v3, v6, v3
; GFX10-DL-NEXT: v_or_b32_sdwa v5, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_2 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:BYTE_2
; GFX10-DL-NEXT: v_and_b32_e32 v3, s2, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX10-DL-NEXT: v_or_b32_e32 v4, v3, v5
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_lshrrev_b32_e32 v3, 8, v4
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3 ; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v5
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v7
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX10-DL-NEXT: v_add_nc_u32_sdwa v2, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i8 addrspace(1)* nocapture %dst) { i8 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0 ; GFX7-NEXT: buffer_store_byte v0, off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_acc4_vecMul: ; GFX8-LABEL: udot8_acc4_vecMul:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s1, s2, 15
; GFX8-NEXT: s_and_b32 s1, s4, 15 ; GFX8-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX8-NEXT: s_and_b32 s1, s0, 15
; GFX8-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX8-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v4, s5 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: v_mov_b32_e32 v5, s7
; GFX8-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX8-NEXT: v_mov_b32_e32 v6, s6 ; GFX8-NEXT: v_mov_b32_e32 v6, s6
; GFX8-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX8-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX8-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX8-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX8-NEXT: v_and_b32_e32 v5, 15, v5
; GFX8-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX8-NEXT: v_mov_b32_e32 v7, s9 ; GFX8-NEXT: v_mov_b32_e32 v7, s6
; GFX8-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX8-NEXT: s_lshr_b32 s11, s2, 28
; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v8, s11 ; GFX8-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX8-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX8-NEXT: v_mov_b32_e32 v8, s8
; GFX8-NEXT: s_lshr_b32 s4, s4, 28 ; GFX8-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX8-NEXT: v_mov_b32_e32 v9, s13 ; GFX8-NEXT: v_mov_b32_e32 v9, s2
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s0, s0, 28
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v5, v2 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v5, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX8-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX8-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 15, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_acc4_vecMul: ; GFX9-LABEL: udot8_acc4_vecMul:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s1, s2, 15
; GFX9-NEXT: s_and_b32 s1, s4, 15 ; GFX9-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-NEXT: s_and_b32 s1, s0, 15
; GFX9-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-NEXT: v_mov_b32_e32 v4, s4
; GFX9-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-NEXT: v_mov_b32_e32 v5, s7
; GFX9-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-NEXT: v_mov_b32_e32 v6, s6
; GFX9-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-NEXT: v_mov_b32_e32 v7, s6
; GFX9-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-NEXT: v_mov_b32_e32 v8, s8
; GFX9-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-NEXT: v_mov_b32_e32 v9, s2
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-NEXT: global_store_byte v[0:1], v2, off ; GFX9-NEXT: global_store_byte v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_acc4_vecMul: ; GFX9-DL-LABEL: udot8_acc4_vecMul:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[6:7], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX9-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX9-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX9-DL-NEXT: s_and_b32 s1, s2, 15
; GFX9-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX9-DL-NEXT: s_bfe_u32 s4, s2, 0x40004
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s1
; GFX9-DL-NEXT: s_bfe_u32 s5, s4, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s6, s4, 0x40008 ; GFX9-DL-NEXT: s_and_b32 s1, s0, 15
; GFX9-DL-NEXT: s_bfe_u32 s7, s4, 0x4000c ; GFX9-DL-NEXT: s_bfe_u32 s7, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v4, s5 ; GFX9-DL-NEXT: v_mov_b32_e32 v4, s4
; GFX9-DL-NEXT: s_bfe_u32 s1, s2, 0x40004 ; GFX9-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX9-DL-NEXT: s_bfe_u32 s5, s2, 0x40008
; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7 ; GFX9-DL-NEXT: v_mov_b32_e32 v5, s7
; GFX9-DL-NEXT: s_bfe_u32 s8, s0, 0x4000c
; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6 ; GFX9-DL-NEXT: v_mov_b32_e32 v6, s6
; GFX9-DL-NEXT: s_bfe_u32 s4, s0, 0x40008
; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5 ; GFX9-DL-NEXT: v_mul_u32_u24_e32 v5, s8, v5
; GFX9-DL-NEXT: s_bfe_u32 s9, s4, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s6, s2, 0x40010
; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5 ; GFX9-DL-NEXT: v_and_b32_e32 v5, 15, v5
; GFX9-DL-NEXT: s_bfe_u32 s11, s4, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s8, s2, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s10, s2, 0x40010 ; GFX9-DL-NEXT: s_bfe_u32 s7, s0, 0x40010
; GFX9-DL-NEXT: v_mov_b32_e32 v7, s9 ; GFX9-DL-NEXT: v_mov_b32_e32 v7, s6
; GFX9-DL-NEXT: s_bfe_u32 s13, s4, 0x40018 ; GFX9-DL-NEXT: s_lshr_b32 s11, s2, 28
; GFX9-DL-NEXT: s_bfe_u32 s12, s2, 0x40014 ; GFX9-DL-NEXT: s_bfe_u32 s2, s2, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v8, s11 ; GFX9-DL-NEXT: s_bfe_u32 s9, s0, 0x40014
; GFX9-DL-NEXT: s_bfe_u32 s14, s2, 0x40018 ; GFX9-DL-NEXT: v_mov_b32_e32 v8, s8
; GFX9-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX9-DL-NEXT: s_bfe_u32 s10, s0, 0x40018
; GFX9-DL-NEXT: v_mov_b32_e32 v9, s13 ; GFX9-DL-NEXT: v_mov_b32_e32 v9, s2
; GFX9-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX9-DL-NEXT: s_waitcnt vmcnt(0) ; GFX9-DL-NEXT: s_waitcnt vmcnt(0)
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v3, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s1, v4, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v4, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s5, v6, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s4, v6, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5 ; GFX9-DL-NEXT: v_add_u32_e32 v2, v2, v5
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v7, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s7, v7, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s12, v8, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s9, v8, v2
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s14, v9, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s10, v9, v2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-DL-NEXT: v_mov_b32_e32 v3, s11
; GFX9-DL-NEXT: v_mad_u32_u24 v2, s2, v3, v2 ; GFX9-DL-NEXT: v_mad_u32_u24 v2, s0, v3, v2
; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX9-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX9-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_acc4_vecMul: ; GFX10-DL-LABEL: udot8_acc4_vecMul:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_load_dword s0, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s1, s[6:7], 0x0
; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off ; GFX10-DL-NEXT: global_load_ubyte v2, v[0:1], off
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_and_b32 s0, s2, 15 ; GFX10-DL-NEXT: s_and_b32 s2, s0, 15
; GFX10-DL-NEXT: s_and_b32 s1, s4, 15 ; GFX10-DL-NEXT: s_and_b32 s4, s1, 15
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40004 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40004
; GFX10-DL-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX10-DL-NEXT: s_bfe_u32 s7, s1, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s8, s2, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s9, s4, 0x40008
; GFX10-DL-NEXT: s_waitcnt vmcnt(0) ; GFX10-DL-NEXT: s_waitcnt vmcnt(0)
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s4, 0x4000c ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40008
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s4, s0, 0x4000c
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s8, s0 ; GFX10-DL-NEXT: s_bfe_u32 s5, s1, 0x4000c
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40010 ; GFX10-DL-NEXT: s_bfe_u32 s6, s1, 0x40014
; GFX10-DL-NEXT: s_bfe_u32 s5, s2, 0x40014 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s7, v2
; GFX10-DL-NEXT: s_bfe_u32 s6, s4, 0x40014 ; GFX10-DL-NEXT: v_mul_u32_u24_e64 v3, s4, s5
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s7, s9, v2 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40010
; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40010
; GFX10-DL-NEXT: s_bfe_u32 s5, s0, 0x40014
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: v_and_b32_e32 v3, 15, v3
; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3 ; GFX10-DL-NEXT: v_add_nc_u32_e32 v2, v2, v3
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: s_bfe_u32 s0, s2, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s2, s0, 0x40018
; GFX10-DL-NEXT: s_bfe_u32 s1, s4, 0x40018 ; GFX10-DL-NEXT: s_bfe_u32 s4, s1, 0x40018
; GFX10-DL-NEXT: s_lshr_b32 s2, s2, 28 ; GFX10-DL-NEXT: s_lshr_b32 s0, s0, 28
; GFX10-DL-NEXT: s_lshr_b32 s4, s4, 28 ; GFX10-DL-NEXT: s_lshr_b32 s1, s1, 28
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s5, s6, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2 ; GFX10-DL-NEXT: v_mad_u32_u24 v2, s2, s4, v2
; GFX10-DL-NEXT: v_mad_u32_u24 v2, s0, s1, v2
; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2 ; GFX10-DL-NEXT: v_and_b32_e32 v2, 15, v2
; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off ; GFX10-DL-NEXT: global_store_byte v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
<8 x i4> addrspace(1)* %src2, <8 x i4> addrspace(1)* %src2,
i4 addrspace(1)* nocapture %dst) { i4 addrspace(1)* nocapture %dst) {
entry: entry:
%vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1 %vec1 = load <8 x i4>, <8 x i4> addrspace(1)* %src1
%vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2 %vec2 = load <8 x i4>, <8 x i4> addrspace(1)* %src2
Show All 27 Lines
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0 ; GFX7-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0 ; GFX7-NEXT: s_load_dword s5, s[6:7], 0x0
; GFX7-NEXT: s_load_dword s6, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s20, s[0:1], 0x0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_and_b32 s7, s4, 15 ; GFX7-NEXT: s_and_b32 s6, s4, 15
; GFX7-NEXT: s_and_b32 s8, s5, 15 ; GFX7-NEXT: s_and_b32 s7, s5, 15
; GFX7-NEXT: s_bfe_u32 s9, s4, 0x40004 ; GFX7-NEXT: s_bfe_u32 s8, s4, 0x40004
; GFX7-NEXT: s_bfe_u32 s11, s4, 0x40008 ; GFX7-NEXT: s_bfe_u32 s10, s4, 0x40008
; GFX7-NEXT: s_bfe_u32 s13, s4, 0x4000c ; GFX7-NEXT: s_bfe_u32 s12, s4, 0x4000c
; GFX7-NEXT: s_bfe_u32 s15, s4, 0x40010 ; GFX7-NEXT: s_bfe_u32 s14, s4, 0x40010
; GFX7-NEXT: s_bfe_u32 s17, s4, 0x40014 ; GFX7-NEXT: s_bfe_u32 s16, s4, 0x40014
; GFX7-NEXT: s_bfe_u32 s19, s4, 0x40018 ; GFX7-NEXT: s_bfe_u32 s18, s4, 0x40018
; GFX7-NEXT: s_lshr_b32 s4, s4, 28 ; GFX7-NEXT: s_lshr_b32 s4, s4, 28
; GFX7-NEXT: v_mov_b32_e32 v0, s7 ; GFX7-NEXT: v_mov_b32_e32 v0, s6
; GFX7-NEXT: v_mov_b32_e32 v1, s6 ; GFX7-NEXT: v_mov_b32_e32 v1, s20
; GFX7-NEXT: v_mad_u32_u24 v0, s8, v0, v1 ; GFX7-NEXT: v_mad_u32_u24 v0, s7, v0, v1
; GFX7-NEXT: s_bfe_u32 s10, s5, 0x40004 ; GFX7-NEXT: s_bfe_u32 s9, s5, 0x40004
; GFX7-NEXT: s_bfe_u32 s12, s5, 0x40008 ; GFX7-NEXT: s_bfe_u32 s11, s5, 0x40008
; GFX7-NEXT: s_bfe_u32 s14, s5, 0x4000c ; GFX7-NEXT: s_bfe_u32 s13, s5, 0x4000c
; GFX7-NEXT: s_bfe_u32 s16, s5, 0x40010 ; GFX7-NEXT: s_bfe_u32 s15, s5, 0x40010
; GFX7-NEXT: s_bfe_u32 s18, s5, 0x40014 ; GFX7-NEXT: s_bfe_u32 s17, s5, 0x40014
; GFX7-NEXT: s_bfe_u32 s20, s5, 0x40018 ; GFX7-NEXT: s_bfe_u32 s19, s5, 0x40018
; GFX7-NEXT: s_lshr_b32 s5, s5, 28 ; GFX7-NEXT: s_lshr_b32 s5, s5, 28
; GFX7-NEXT: v_mov_b32_e32 v1, s4 ; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s5, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s9 ; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mad_u32_u24 v0, s10, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s11 ; GFX7-NEXT: v_mov_b32_e32 v1, s10
; GFX7-NEXT: v_mad_u32_u24 v0, s12, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s13 ; GFX7-NEXT: v_mov_b32_e32 v1, s12
; GFX7-NEXT: v_mad_u32_u24 v0, s14, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s13, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s15 ; GFX7-NEXT: v_mov_b32_e32 v1, s14
; GFX7-NEXT: v_mad_u32_u24 v0, s16, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s15, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s17 ; GFX7-NEXT: v_mov_b32_e32 v1, s16
; GFX7-NEXT: v_mad_u32_u24 v0, s18, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s17, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v1, s19 ; GFX7-NEXT: v_mov_b32_e32 v1, s18
; GFX7-NEXT: v_mad_u32_u24 v0, s20, v1, v0 ; GFX7-NEXT: v_mad_u32_u24 v0, s19, v1, v0
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: udot8_variant1: ; GFX8-LABEL: udot8_variant1:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX8-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX8-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX8-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX8-NEXT: s_load_dword s18, s[0:1], 0x0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_and_b32 s0, s2, 15 ; GFX8-NEXT: s_and_b32 s4, s2, 15
; GFX8-NEXT: s_and_b32 s1, s3, 15 ; GFX8-NEXT: s_and_b32 s5, s3, 15
; GFX8-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX8-NEXT: s_bfe_u32 s6, s2, 0x40004
; GFX8-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX8-NEXT: s_bfe_u32 s8, s2, 0x40008
; GFX8-NEXT: s_bfe_u32 s9, s2, 0x4000c ; GFX8-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX8-NEXT: s_bfe_u32 s11, s2, 0x40010 ; GFX8-NEXT: s_bfe_u32 s12, s2, 0x40010
; GFX8-NEXT: s_bfe_u32 s13, s2, 0x40014 ; GFX8-NEXT: s_bfe_u32 s14, s2, 0x40014
; GFX8-NEXT: s_bfe_u32 s15, s2, 0x40018 ; GFX8-NEXT: s_bfe_u32 s16, s2, 0x40018
; GFX8-NEXT: s_lshr_b32 s2, s2, 28 ; GFX8-NEXT: s_lshr_b32 s2, s2, 28
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s18
; GFX8-NEXT: v_mad_u32_u24 v2, s1, v2, v3 ; GFX8-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX8-NEXT: s_bfe_u32 s6, s3, 0x40004 ; GFX8-NEXT: s_bfe_u32 s7, s3, 0x40004
; GFX8-NEXT: s_bfe_u32 s8, s3, 0x40008 ; GFX8-NEXT: s_bfe_u32 s9, s3, 0x40008
; GFX8-NEXT: s_bfe_u32 s10, s3, 0x4000c ; GFX8-NEXT: s_bfe_u32 s11, s3, 0x4000c
; GFX8-NEXT: s_bfe_u32 s12, s3, 0x40010 ; GFX8-NEXT: s_bfe_u32 s13, s3, 0x40010
; GFX8-NEXT: s_bfe_u32 s14, s3, 0x40014 ; GFX8-NEXT: s_bfe_u32 s15, s3, 0x40014
; GFX8-NEXT: s_bfe_u32 s16, s3, 0x40018 ; GFX8-NEXT: s_bfe_u32 s17, s3, 0x40018
; GFX8-NEXT: s_lshr_b32 s3, s3, 28 ; GFX8-NEXT: s_lshr_b32 s3, s3, 28
; GFX8-NEXT: v_mov_b32_e32 v3, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s3, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s6
; GFX8-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s8
; GFX8-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s10
; GFX8-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s12
; GFX8-NEXT: v_mad_u32_u24 v2, s12, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s13, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v1, s14
; GFX8-NEXT: v_mad_u32_u24 v2, s14, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v0, s15, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v3, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s16
; GFX8-NEXT: v_mad_u32_u24 v2, s16, v3, v2 ; GFX8-NEXT: v_mad_u32_u24 v2, s17, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udot8_variant1: ; GFX9-LABEL: udot8_variant1:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-NEXT: s_load_dword s3, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-NEXT: s_load_dword s18, s[0:1], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_and_b32 s0, s2, 15 ; GFX9-NEXT: s_and_b32 s4, s2, 15
; GFX9-NEXT: s_and_b32 s1, s3, 15 ; GFX9-NEXT: s_and_b32 s5, s3, 15
; GFX9-NEXT: s_bfe_u32 s5, s2, 0x40004 ; GFX9-NEXT: s_bfe_u32 s6, s2, 0x40004
; GFX9-NEXT: s_bfe_u32 s7, s2, 0x40008 ; GFX9-NEXT: s_bfe_u32 s8, s2, 0x40008
; GFX9-NEXT: s_bfe_u32 s9, s2, 0x4000c ; GFX9-NEXT: s_bfe_u32 s10, s2, 0x4000c
; GFX9-NEXT: s_bfe_u32 s11, s2, 0x40010 ; GFX9-NEXT: s_bfe_u32 s12, s2, 0x40010
; GFX9-NEXT: s_bfe_u32 s13, s2, 0x40014 ; GFX9-NEXT: s_bfe_u32 s14, s2, 0x40014
; GFX9-NEXT: s_bfe_u32 s15, s2, 0x40018 ; GFX9-NEXT: s_bfe_u32 s16, s2, 0x40018
; GFX9-NEXT: s_lshr_b32 s2, s2, 28 ; GFX9-NEXT: s_lshr_b32 s2, s2, 28
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s4 ; GFX9-NEXT: v_mov_b32_e32 v1, s18
; GFX9-NEXT: v_mad_u32_u24 v2, s1, v2, v3 ; GFX9-NEXT: v_mad_u32_u24 v0, s5, v0, v1
; GFX9-NEXT: s_bfe_u32 s6, s3, 0x40004 ; GFX9-NEXT: s_bfe_u32 s7, s3, 0x40004
; GFX9-NEXT: s_bfe_u32 s8, s3, 0x40008 ; GFX9-NEXT: s_bfe_u32 s9, s3, 0x40008
; GFX9-NEXT: s_bfe_u32 s10, s3, 0x4000c ; GFX9-NEXT: s_bfe_u32 s11, s3, 0x4000c
; GFX9-NEXT: s_bfe_u32 s12, s3, 0x40010 ; GFX9-NEXT: s_bfe_u32 s13, s3, 0x40010
; GFX9-NEXT: s_bfe_u32 s14, s3, 0x40014 ; GFX9-NEXT: s_bfe_u32 s15, s3, 0x40014
; GFX9-NEXT: s_bfe_u32 s16, s3, 0x40018 ; GFX9-NEXT: s_bfe_u32 s17, s3, 0x40018
; GFX9-NEXT: s_lshr_b32 s3, s3, 28 ; GFX9-NEXT: s_lshr_b32 s3, s3, 28
; GFX9-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NEXT: v_mov_b32_e32 v1, s2
; GFX9-NEXT: v_mad_u32_u24 v2, s3, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s3, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s6
; GFX9-NEXT: v_mad_u32_u24 v2, s6, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s7, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NEXT: v_mad_u32_u24 v2, s8, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s9, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s10
; GFX9-NEXT: v_mad_u32_u24 v2, s10, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s11, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s12
; GFX9-NEXT: v_mad_u32_u24 v2, s12, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s13, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v1, s14
; GFX9-NEXT: v_mad_u32_u24 v2, s14, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v0, s15, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v3, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s16
; GFX9-NEXT: v_mad_u32_u24 v2, s16, v3, v2 ; GFX9-NEXT: v_mad_u32_u24 v2, s17, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX9-DL-LABEL: udot8_variant1: ; GFX9-DL-LABEL: udot8_variant1:
; GFX9-DL: ; %bb.0: ; %entry ; GFX9-DL: ; %bb.0: ; %entry
; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-DL-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX9-DL-NEXT: s_load_dword s3, s[0:1], 0x0
; GFX9-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX9-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s3
; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s4, v0, v1
; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-DL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-DL-NEXT: v_mov_b32_e32 v3, s4
; GFX9-DL-NEXT: v_dot8_u32_u4 v2, s3, v2, v3
; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX9-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX9-DL-NEXT: s_endpgm ; GFX9-DL-NEXT: s_endpgm
; ;
; GFX10-DL-LABEL: udot8_variant1: ; GFX10-DL-LABEL: udot8_variant1:
; GFX10-DL: ; %bb.0: ; %entry ; GFX10-DL: ; %bb.0: ; %entry
; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-DL-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX10-DL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX10-DL-NEXT: ; implicit-def: $vcc_hi ; GFX10-DL-NEXT: ; implicit-def: $vcc_hi
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX10-DL-NEXT: s_load_dword s2, s[0:1], 0x0
; GFX10-DL-NEXT: s_load_dword s3, s[6:7], 0x0 ; GFX10-DL-NEXT: s_load_dword s3, s[4:5], 0x0
; GFX10-DL-NEXT: s_load_dword s4, s[0:1], 0x0 ; GFX10-DL-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s4, s3, v0
; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-DL-NEXT: v_mov_b32_e32 v0, s0
; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-DL-NEXT: v_mov_b32_e32 v1, s1
; GFX10-DL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-DL-NEXT: v_mov_b32_e32 v2, s4
; GFX10-DL-NEXT: v_dot8_u32_u4 v2, s3, s2, v2
; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off ; GFX10-DL-NEXT: global_store_dword v[0:1], v2, off
; GFX10-DL-NEXT: s_endpgm ; GFX10-DL-NEXT: s_endpgm
i32 addrspace(1)* %v2addr, i32 addrspace(1)* %v2addr,
i32 addrspace(1)* %dst) { i32 addrspace(1)* %dst) {
entry: entry:
%v1 = load i32, i32 addrspace(1)* %v1addr, align 4 %v1 = load i32, i32 addrspace(1)* %v1addr, align 4
%v2 = load i32, i32 addrspace(1)* %v2addr, align 4 %v2 = load i32, i32 addrspace(1)* %v2addr, align 4
%and = and i32 %v1, 15 %and = and i32 %v1, 15
▲ Show 20 Lines • Show All 55 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll

Show First 20 Lines • Show All 556 Lines • ▼ Show 20 Lines
; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; SI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd ; SI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
; SI-NEXT: s_mov_b32 s3, 0xf000 ; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s0, s4 ; SI-NEXT: s_mov_b32 s0, s4
; SI-NEXT: s_mov_b32 s1, s5 ; SI-NEXT: s_mov_b32 s1, s5
; SI-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0 ; SI-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0
; SI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s4
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5
; SI-NEXT: s_lshr_b32 s4, s4, 16 ; SI-NEXT: s_lshr_b32 s4, s4, 16
; SI-NEXT: s_lshr_b32 s5, s5, 16
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
; SI-NEXT: s_lshr_b32 s4, s5, 16 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s4 ; SI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0
; SI-NEXT: s_lshr_b32 s4, s7, 16 ; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s4 ; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5 ; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: s_lshr_b32 s4, s6, 16 ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v7, s7 ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s6, s5, 16
; SI-NEXT: v_cvt_f32_f16_e32 v5, s6
; SI-NEXT: v_cvt_f32_f16_e32 v4, s4
; SI-NEXT: s_lshr_b32 s4, s4, 16
; SI-NEXT: v_cvt_f32_f16_e32 v7, s5
; SI-NEXT: v_cvt_f32_f16_e32 v6, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s4
; SI-NEXT: v_cvt_f32_f16_e32 v4, s6
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: v_max_f32_e32 v3, v3, v5 ; SI-NEXT: v_max_f32_e32 v3, v3, v5
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v7 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v7
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_max_f32_e32 v1, v1, v5 ; SI-NEXT: v_max_f32_e32 v1, v1, v5
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v6 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v6
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_max_f32_e32 v2, v2, v5 ; SI-NEXT: v_max_f32_e32 v2, v2, v5
; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4 ; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_max_f32_e32 v0, v0, v4 ; SI-NEXT: v_max_f32_e32 v0, v0, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v3 ; SI-NEXT: v_or_b32_e32 v1, v1, v3
▲ Show 20 Lines • Show All 157 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll

Show First 20 Lines • Show All 609 Lines • ▼ Show 20 Lines
; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; SI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd ; SI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
; SI-NEXT: s_mov_b32 s3, 0xf000 ; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s0, s4 ; SI-NEXT: s_mov_b32 s0, s4
; SI-NEXT: s_mov_b32 s1, s5 ; SI-NEXT: s_mov_b32 s1, s5
; SI-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0 ; SI-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x0
; SI-NEXT: s_load_dwordx2 s[6:7], s[8:9], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s4
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5
; SI-NEXT: s_lshr_b32 s4, s4, 16 ; SI-NEXT: s_lshr_b32 s4, s4, 16
; SI-NEXT: s_lshr_b32 s5, s5, 16
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
; SI-NEXT: s_lshr_b32 s4, s5, 16 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s5
; SI-NEXT: v_cvt_f32_f16_e32 v3, s4 ; SI-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0
; SI-NEXT: s_lshr_b32 s4, s7, 16 ; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_cvt_f32_f16_e32 v5, s4 ; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5 ; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: s_lshr_b32 s4, s6, 16 ; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_cvt_f32_f16_e32 v7, s7 ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s6, s5, 16
; SI-NEXT: v_cvt_f32_f16_e32 v5, s6
; SI-NEXT: v_cvt_f32_f16_e32 v4, s4
; SI-NEXT: s_lshr_b32 s4, s4, 16
; SI-NEXT: v_cvt_f32_f16_e32 v7, s5
; SI-NEXT: v_cvt_f32_f16_e32 v6, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s4
; SI-NEXT: v_cvt_f32_f16_e32 v4, s6
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v5
; SI-NEXT: v_mul_f32_e32 v3, 1.0, v3
; SI-NEXT: v_min_f32_e32 v3, v3, v5 ; SI-NEXT: v_min_f32_e32 v3, v3, v5
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v7 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v7
; SI-NEXT: v_mul_f32_e32 v1, 1.0, v1
; SI-NEXT: v_min_f32_e32 v1, v1, v5 ; SI-NEXT: v_min_f32_e32 v1, v1, v5
; SI-NEXT: v_mul_f32_e32 v5, 1.0, v6 ; SI-NEXT: v_mul_f32_e32 v5, 1.0, v6
; SI-NEXT: v_mul_f32_e32 v2, 1.0, v2
; SI-NEXT: v_min_f32_e32 v2, v2, v5 ; SI-NEXT: v_min_f32_e32 v2, v2, v5
; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4 ; SI-NEXT: v_mul_f32_e32 v4, 1.0, v4
; SI-NEXT: v_mul_f32_e32 v0, 1.0, v0
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_min_f32_e32 v0, v0, v4 ; SI-NEXT: v_min_f32_e32 v0, v0, v4
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_or_b32_e32 v1, v1, v3 ; SI-NEXT: v_or_b32_e32 v1, v1, v3
▲ Show 20 Lines • Show All 157 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/madak.ll

; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX6,GFX6_8_9,MAD %s ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX6,GFX6_8_9,MAD %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX8,GFX6_8_9,GFX8_9,GFX8_9_10,MAD %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX8,GFX6_8_9,GFX8_9,GFX8_9_10,MAD %s
; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX9,GFX6_8_9,GFX8_9,GFX8_9_10,MAD %s ; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX9,GFX6_8_9,GFX8_9,GFX8_9_10,MAD %s
; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX10,GFX8_9_10,GFX10-MAD %s ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX10,GFX8_9_10,GFX10-MAD %s
; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -fp-contract=fast -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX10,GFX8_9_10,FMA %s ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -fp-contract=fast -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefixes=GCN,GFX10,GFX8_9_10,FMA %s
declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
declare float @llvm.fabs.f32(float) nounwind readnone declare float @llvm.fabs.f32(float) nounwind readnone
; GCN-LABEL: {{^}}madak_f32: ; GCN-LABEL: {{^}}madak_f32:
; GFX6: buffer_load_dword [[VA:v[0-9]+]] ; GFX6: buffer_load_dword [[VA:v[0-9]+]]
; GFX6: buffer_load_dword [[VB:v[0-9]+]] ; GFX6: buffer_load_dword [[VB:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX8: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX9: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX9: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]] ; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX10: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX10: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]] ; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; MAD: v_madak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000 ; MAD: v_madak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000
; GFX10-MAD: v_madak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000 ; GFX10-MAD: v_madak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000
; FMA: v_fmaak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000 ; FMA: v_fmaak_f32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000
define amdgpu_kernel void @madak_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { define amdgpu_kernel void @madak_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind {
▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Lines
} }
; Make sure nothing weird happens with a value that is also allowed as ; Make sure nothing weird happens with a value that is also allowed as
; an inline immediate. ; an inline immediate.
; GCN-LABEL: {{^}}madak_inline_imm_f32: ; GCN-LABEL: {{^}}madak_inline_imm_f32:
; GFX6: buffer_load_dword [[VA:v[0-9]+]] ; GFX6: buffer_load_dword [[VA:v[0-9]+]]
; GFX6: buffer_load_dword [[VB:v[0-9]+]] ; GFX6: buffer_load_dword [[VB:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX8: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX8: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX9: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX9: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]] ; GFX9: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; GFX10: {{flat|global}}_load_dword [[VA:v[0-9]+]] ; GFX10: {{flat|global}}_load_dword [[VA:v[0-9]+]]
; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]] ; GFX10: {{flat|global}}_load_dword [[VB:v[0-9]+]]
; MAD: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0 ; MAD: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0
; GFX10-MAD: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0 ; GFX10-MAD: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0
; FMA: v_fma_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0 ; FMA: v_fma_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0
define amdgpu_kernel void @madak_inline_imm_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { define amdgpu_kernel void @madak_inline_imm_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind {
▲ Show 20 Lines • Show All 155 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/max.i16.ll

Show All 10 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_ushort v5, v[0:1]
; VI-NEXT: flat_load_ushort v2, v[2:3] ; VI-NEXT: flat_load_ushort v2, v[2:3]
; VI-NEXT: flat_load_ushort v3, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_i16_e32 v2, v3, v2 ; VI-NEXT: v_max_i16_e32 v2, v5, v2
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_imax_sge_i16: ; GFX9-LABEL: v_test_imax_sge_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_ushort v5, v[0:1], off
; GFX9-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-NEXT: global_load_ushort v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_i16_e32 v2, v3, v2 ; GFX9-NEXT: v_max_i16_e32 v2, v5, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid %outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
%a = load i16, i16 addrspace(1)* %gep0, align 4 %a = load i16, i16 addrspace(1)* %gep0, align 4
%b = load i16, i16 addrspace(1)* %gep1, align 4 %b = load i16, i16 addrspace(1)* %gep1, align 4
Show All 12 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_dword v5, v[0:1]
; VI-NEXT: flat_load_dword v2, v[2:3] ; VI-NEXT: flat_load_dword v2, v[2:3]
; VI-NEXT: flat_load_dword v3, v[0:1]
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_i16_e32 v4, v3, v2 ; VI-NEXT: v_max_i16_e32 v3, v5, v2
; VI-NEXT: v_max_i16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_max_i16_sdwa v2, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_or_b32_e32 v2, v4, v2 ; VI-NEXT: v_or_b32_e32 v2, v3, v2
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_imax_sge_v2i16: ; GFX9-LABEL: v_test_imax_sge_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_dword v5, v[0:1], off
; GFX9-NEXT: global_load_dword v2, v[2:3], off ; GFX9-NEXT: global_load_dword v2, v[2:3], off
; GFX9-NEXT: global_load_dword v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_max_i16 v2, v3, v2 ; GFX9-NEXT: v_pk_max_i16 v2, v5, v2
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid %outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid
%a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4 %a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4
%b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4 %b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4
%cmp = icmp sge <2 x i16> %a, %b %cmp = icmp sge <2 x i16> %a, %b
%val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b %val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b
store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4 store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4
ret void ret void
} }
; FIXME: Need to handle non-uniform case for function below (load without gep). ; FIXME: Need to handle non-uniform case for function below (load without gep).
define amdgpu_kernel void @v_test_imax_sge_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> addrspace(1)* %aptr, <3 x i16> addrspace(1)* %bptr) nounwind { define amdgpu_kernel void @v_test_imax_sge_v3i16(<3 x i16> addrspace(1)* %out, <3 x i16> addrspace(1)* %aptr, <3 x i16> addrspace(1)* %bptr) nounwind {
; VI-LABEL: v_test_imax_sge_v3i16: ; VI-LABEL: v_test_imax_sge_v3i16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: v_lshlrev_b32_e32 v8, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v6, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v6
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v8
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_add_u32_e32 v2, vcc, s6, v8 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v6
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: v_add_u32_e32 v4, vcc, 4, v0 ; VI-NEXT: v_add_u32_e32 v4, vcc, 4, v0
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; VI-NEXT: v_add_u32_e32 v6, vcc, 4, v2 ; VI-NEXT: v_mov_b32_e32 v7, s5
; VI-NEXT: flat_load_dword v9, v[0:1] ; VI-NEXT: v_add_u32_e32 v6, vcc, s4, v6
; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT: flat_load_ushort v4, v[4:5] ; VI-NEXT: flat_load_dword v8, v[0:1]
; VI-NEXT: flat_load_dword v5, v[2:3] ; VI-NEXT: flat_load_ushort v9, v[4:5]
; VI-NEXT: flat_load_ushort v6, v[6:7] ; VI-NEXT: v_add_u32_e32 v0, vcc, 4, v2
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v8 ; VI-NEXT: flat_load_dword v2, v[2:3]
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: flat_load_ushort v0, v[0:1]
; VI-NEXT: v_add_u32_e32 v2, vcc, 4, v0 ; VI-NEXT: v_add_u32_e32 v4, vcc, 4, v6
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v7, vcc
; VI-NEXT: s_waitcnt vmcnt(1) lgkmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1) lgkmcnt(1)
; VI-NEXT: v_max_i16_e32 v7, v5, v9 ; VI-NEXT: v_max_i16_e32 v1, v8, v2
; VI-NEXT: v_max_i16_sdwa v5, v5, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_max_i16_sdwa v2, v8, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_or_b32_e32 v1, v1, v2
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_i16_e32 v4, v6, v4 ; VI-NEXT: v_max_i16_e32 v0, v9, v0
; VI-NEXT: v_or_b32_e32 v5, v7, v5 ; VI-NEXT: flat_store_dword v[6:7], v1
; VI-NEXT: flat_store_dword v[0:1], v5 ; VI-NEXT: flat_store_short v[4:5], v0
; VI-NEXT: flat_store_short v[2:3], v4
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_imax_sge_v3i16: ; GFX9-LABEL: v_test_imax_sge_v3i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_dword v6, v[2:3], off ; GFX9-NEXT: global_load_dword v6, v[0:1], off
; GFX9-NEXT: global_load_dword v7, v[0:1], off ; GFX9-NEXT: global_load_dword v7, v[2:3], off
; GFX9-NEXT: v_mov_b32_e32 v5, s5 ; GFX9-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v8, v6
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v8, v7 ; GFX9-NEXT: v_pk_max_i16 v6, v6, v7
; GFX9-NEXT: v_pk_max_i16 v7, v7, v6 ; GFX9-NEXT: global_load_short_d16 v7, v[2:3], off offset:4
; GFX9-NEXT: global_load_short_d16 v6, v[2:3], off offset:4
; GFX9-NEXT: global_load_short_d16 v8, v[0:1], off offset:4 ; GFX9-NEXT: global_load_short_d16 v8, v[0:1], off offset:4
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_max_i16 v0, v8, v6 ; GFX9-NEXT: v_pk_max_i16 v0, v8, v7
; GFX9-NEXT: global_store_dword v[4:5], v7, off ; GFX9-NEXT: global_store_dword v[4:5], v6, off
; GFX9-NEXT: global_store_short v[4:5], v0, off offset:4 ; GFX9-NEXT: global_store_short v[4:5], v0, off offset:4
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %out, i32 %tid %outgep = getelementptr <3 x i16>, <3 x i16> addrspace(1)* %out, i32 %tid
%a = load <3 x i16>, <3 x i16> addrspace(1)* %gep0, align 4 %a = load <3 x i16>, <3 x i16> addrspace(1)* %gep0, align 4
%b = load <3 x i16>, <3 x i16> addrspace(1)* %gep1, align 4 %b = load <3 x i16>, <3 x i16> addrspace(1)* %gep1, align 4
Show All 12 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]
; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_add_u32_e32 v4, vcc, s4, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_i16_e32 v6, v1, v3 ; VI-NEXT: v_max_i16_e32 v6, v1, v3
; VI-NEXT: v_max_i16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_max_i16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_max_i16_e32 v3, v0, v2 ; VI-NEXT: v_max_i16_e32 v3, v0, v2
; VI-NEXT: v_max_i16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_max_i16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
Show All 9 Lines
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: v_mov_b32_e32 v5, s5 ; GFX9-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_max_i16 v1, v1, v3 ; GFX9-NEXT: v_pk_max_i16 v1, v1, v3
; GFX9-NEXT: v_pk_max_i16 v0, v0, v2 ; GFX9-NEXT: v_pk_max_i16 v0, v0, v2
; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
Show All 18 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_ushort v5, v[0:1]
; VI-NEXT: flat_load_ushort v2, v[2:3] ; VI-NEXT: flat_load_ushort v2, v[2:3]
; VI-NEXT: flat_load_ushort v3, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_i16_e32 v2, v3, v2 ; VI-NEXT: v_max_i16_e32 v2, v5, v2
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_imax_sgt_i16: ; GFX9-LABEL: v_test_imax_sgt_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_ushort v5, v[0:1], off
; GFX9-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-NEXT: global_load_ushort v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_i16_e32 v2, v3, v2 ; GFX9-NEXT: v_max_i16_e32 v2, v5, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid %outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
%a = load i16, i16 addrspace(1)* %gep0, align 4 %a = load i16, i16 addrspace(1)* %gep0, align 4
%b = load i16, i16 addrspace(1)* %gep1, align 4 %b = load i16, i16 addrspace(1)* %gep1, align 4
Show All 12 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_ushort v5, v[0:1]
; VI-NEXT: flat_load_ushort v2, v[2:3] ; VI-NEXT: flat_load_ushort v2, v[2:3]
; VI-NEXT: flat_load_ushort v3, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_u16_e32 v2, v3, v2 ; VI-NEXT: v_max_u16_e32 v2, v5, v2
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_umax_uge_i16: ; GFX9-LABEL: v_test_umax_uge_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_ushort v5, v[0:1], off
; GFX9-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-NEXT: global_load_ushort v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_u16_e32 v2, v3, v2 ; GFX9-NEXT: v_max_u16_e32 v2, v5, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid %outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
%a = load i16, i16 addrspace(1)* %gep0, align 4 %a = load i16, i16 addrspace(1)* %gep0, align 4
%b = load i16, i16 addrspace(1)* %gep1, align 4 %b = load i16, i16 addrspace(1)* %gep1, align 4
Show All 12 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_ushort v5, v[0:1]
; VI-NEXT: flat_load_ushort v2, v[2:3] ; VI-NEXT: flat_load_ushort v2, v[2:3]
; VI-NEXT: flat_load_ushort v3, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_u16_e32 v2, v3, v2 ; VI-NEXT: v_max_u16_e32 v2, v5, v2
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_umax_ugt_i16: ; GFX9-LABEL: v_test_umax_ugt_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 1, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_ushort v5, v[0:1], off
; GFX9-NEXT: global_load_ushort v2, v[2:3], off ; GFX9-NEXT: global_load_ushort v2, v[2:3], off
; GFX9-NEXT: global_load_ushort v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_u16_e32 v2, v3, v2 ; GFX9-NEXT: v_max_u16_e32 v2, v5, v2
; GFX9-NEXT: global_store_short v[0:1], v2, off ; GFX9-NEXT: global_store_short v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr i16, i16 addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr i16, i16 addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid %outgep = getelementptr i16, i16 addrspace(1)* %out, i32 %tid
%a = load i16, i16 addrspace(1)* %gep0, align 4 %a = load i16, i16 addrspace(1)* %gep0, align 4
%b = load i16, i16 addrspace(1)* %gep1, align 4 %b = load i16, i16 addrspace(1)* %gep1, align 4
Show All 11 Lines
; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v4, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v4
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_dword v5, v[0:1]
; VI-NEXT: flat_load_dword v2, v[2:3] ; VI-NEXT: flat_load_dword v2, v[2:3]
; VI-NEXT: flat_load_dword v3, v[0:1]
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v4
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_max_u16_e32 v4, v3, v2 ; VI-NEXT: v_max_u16_e32 v3, v5, v2
; VI-NEXT: v_max_u16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_max_u16_sdwa v2, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_or_b32_e32 v2, v4, v2 ; VI-NEXT: v_or_b32_e32 v2, v3, v2
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_umax_ugt_v2i16: ; GFX9-LABEL: v_test_umax_ugt_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_dword v5, v[0:1], off
; GFX9-NEXT: global_load_dword v2, v[2:3], off ; GFX9-NEXT: global_load_dword v2, v[2:3], off
; GFX9-NEXT: global_load_dword v3, v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_max_u16 v2, v3, v2 ; GFX9-NEXT: v_pk_max_u16 v2, v5, v2
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
%gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid %gep0 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %aptr, i32 %tid
%gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid %gep1 = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %bptr, i32 %tid
%outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid %outgep = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %out, i32 %tid
%a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4 %a = load <2 x i16>, <2 x i16> addrspace(1)* %gep0, align 4
%b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4 %b = load <2 x i16>, <2 x i16> addrspace(1)* %gep1, align 4
%cmp = icmp ugt <2 x i16> %a, %b %cmp = icmp ugt <2 x i16> %a, %b
%val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b %val = select <2 x i1> %cmp, <2 x i16> %a, <2 x i16> %b
store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4 store <2 x i16> %val, <2 x i16> addrspace(1)* %outgep, align 4
ret void ret void
} }
declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone

llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll

Show First 20 Lines • Show All 387 Lines • ▼ Show 20 Lines
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}] ; GFX8: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
; ;
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048 ; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048 ; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-4096
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048 ; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-4096
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
; GFX9: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:2048
; ;
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-2048 ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-2048
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-2048 ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off offset:-2048
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}} ; GFX10: global_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}], off{{$}}
i8 addrspace(1)* %buffer2) { i8 addrspace(1)* %buffer2) {
▲ Show 20 Lines • Show All 140 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll

Show First 20 Lines • Show All 67 Lines • ▼ Show 20 Linesentry:
%mul = mul i16 %a, %b %mul = mul i16 %a, %b
store i16 %mul, i16 addrspace(1)* %out, align 4 store i16 %mul, i16 addrspace(1)* %out, align 4
ret void ret void
} }
; GCN-LABEL: {{^}}mul_v2i16: ; GCN-LABEL: {{^}}mul_v2i16:
; NOSDWA: v_lshrrev_b32_e32 v[[DST0:[0-9]+]], 16, v{{[0-9]+}} ; NOSDWA: v_lshrrev_b32_e32 v[[DST0:[0-9]+]], 16, v{{[0-9]+}}
; NOSDWA: v_lshrrev_b32_e32 v[[DST1:[0-9]+]], 16, v{{[0-9]+}} ; NOSDWA: v_lshrrev_b32_e32 v[[DST1:[0-9]+]], 16, v{{[0-9]+}}
; NOSDWA: v_mul_u32_u24_e32 v[[DST_MUL:[0-9]+]], v[[DST0]], v[[DST1]] ; NOSDWA: v_mul_u32_u24_e32 v[[DST_MUL:[0-9]+]], v[[DST1]], v[[DST0]]
; NOSDWA: v_lshlrev_b32_e32 v[[DST_SHL:[0-9]+]], 16, v[[DST_MUL]] ; NOSDWA: v_lshlrev_b32_e32 v[[DST_SHL:[0-9]+]], 16, v[[DST_MUL]]
; NOSDWA: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v[[DST_SHL]] ; NOSDWA: v_or_b32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v[[DST_SHL]]
; NOSDWA-NOT: v_mul_u32_u24_sdwa ; NOSDWA-NOT: v_mul_u32_u24_sdwa
; VI-DAG: v_mul_u32_u24_sdwa v[[DST_MUL_LO:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0 ; VI-DAG: v_mul_u32_u24_sdwa v[[DST_MUL_LO:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:WORD_0
; VI-DAG: v_mul_u32_u24_sdwa v[[DST_MUL_HI:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-DAG: v_mul_u32_u24_sdwa v[[DST_MUL_HI:[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}} dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI: v_or_b32_sdwa v{{[0-9]+}}, v[[DST_MUL_LO]], v[[DST_MUL_HI]] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI: v_or_b32_sdwa v{{[0-9]+}}, v[[DST_MUL_LO]], v[[DST_MUL_HI]] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
▲ Show 20 Lines • Show All 482 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/shl_add_ptr.ll

Show First 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; pointer can be used with an offset into the second one. ; pointer can be used with an offset into the second one.
; TODO: Recover the optimization of using ds_read2st64_b32 using alignment hints ; TODO: Recover the optimization of using ds_read2st64_b32 using alignment hints
; GCN-LABEL: {{^}}load_shl_base_lds_2: ; GCN-LABEL: {{^}}load_shl_base_lds_2:
; GCN: v_lshlrev_b32_e32 [[OFS:v[0-9]+]], 2, {{v[0-9]+}} ; GCN: v_lshlrev_b32_e32 [[OFS:v[0-9]+]], 2, {{v[0-9]+}}
; GCN-DAG: v_add_{{[iu]}}32_e32 [[PTR0:v[0-9]+]], vcc, lds0@abs32@lo, [[OFS]] ; GCN-DAG: v_add_{{[iu]}}32_e32 [[PTR0:v[0-9]+]], vcc, lds0@abs32@lo, [[OFS]]
; GCN-DAG: v_add_{{[iu]}}32_e32 [[PTR1:v[0-9]+]], vcc, lds1@abs32@lo, [[OFS]] ; GCN-DAG: v_add_{{[iu]}}32_e32 [[PTR1:v[0-9]+]], vcc, lds1@abs32@lo, [[OFS]]
; GCN: s_mov_b32 m0, -1 ; GCN-DAG: s_mov_b32 m0, -1
; GCN-DAG: ds_read_b32 {{v[0-9]+}}, [[PTR0]] offset:256 ; GCN-DAG: ds_read_b32 {{v[0-9]+}}, [[PTR0]] offset:256
; GCN-DAG: ds_read_b32 {{v[0-9]+}}, [[PTR1]] offset:256 ; GCN-DAG: ds_read_b32 {{v[0-9]+}}, [[PTR1]] offset:256
; TODO: ds_read2st64_b32 {{v\[[0-9]+:[0-9]+\]}}, [[PTR]] offset0:1 offset1:9 ; TODO: ds_read2st64_b32 {{v\[[0-9]+:[0-9]+\]}}, [[PTR]] offset0:1 offset1:9
; GCN: s_endpgm ; GCN: s_endpgm
define amdgpu_kernel void @load_shl_base_lds_2(float addrspace(1)* %out) #0 { define amdgpu_kernel void @load_shl_base_lds_2(float addrspace(1)* %out) #0 {
%tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %tid.x = tail call i32 @llvm.amdgcn.workitem.id.x() #1
▲ Show 20 Lines • Show All 347 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/sub.i16.ll

Show First 20 Lines • Show All 101 Lines • ▼ Show 20 Linesdefine amdgpu_kernel void @v_test_sub_i16_zext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
store i64 %ext, i64 addrspace(1)* %out store i64 %ext, i64 addrspace(1)* %out
ret void ret void
} }
; FIXME: Need to handle non-uniform case for function below (load without gep). ; FIXME: Need to handle non-uniform case for function below (load without gep).
; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i32: ; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i32:
; VI: flat_load_ushort [[A:v[0-9]+]] ; VI: flat_load_ushort [[A:v[0-9]+]]
; VI: flat_load_ushort [[B:v[0-9]+]] ; VI: flat_load_ushort [[B:v[0-9]+]]
; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] ; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16 ; VI-NEXT: v_bfe_i32 [[SEXT:v[0-9]+]], [[ADD]], 0, 16
; VI-NEXT: buffer_store_dword [[SEXT]] ; VI-NEXT: buffer_store_dword [[SEXT]]
define amdgpu_kernel void @v_test_sub_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { define amdgpu_kernel void @v_test_sub_i16_sext_to_i32(i32 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %tid
%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
%a = load i16, i16 addrspace(1)* %gep.in0 %a = load i16, i16 addrspace(1)* %gep.in0
%b = load i16, i16 addrspace(1)* %gep.in1 %b = load i16, i16 addrspace(1)* %gep.in1
%add = sub i16 %a, %b %add = sub i16 %a, %b
%ext = sext i16 %add to i32 %ext = sext i16 %add to i32
store i32 %ext, i32 addrspace(1)* %out store i32 %ext, i32 addrspace(1)* %out
ret void ret void
} }
; FIXME: Need to handle non-uniform case for function below (load without gep). ; FIXME: Need to handle non-uniform case for function below (load without gep).
; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i64: ; GCN-LABEL: {{^}}v_test_sub_i16_sext_to_i64:
; VI: flat_load_ushort [[A:v[0-9]+]] ; VI: flat_load_ushort [[A:v[0-9]+]]
; VI: flat_load_ushort [[B:v[0-9]+]] ; VI: flat_load_ushort [[B:v[0-9]+]]
; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[B]], [[A]] ; VI: v_sub_u16_e32 [[ADD:v[0-9]+]], [[A]], [[B]]
; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16 ; VI-NEXT: v_bfe_i32 v[[LO:[0-9]+]], [[ADD]], 0, 16
; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]] ; VI-NEXT: v_ashrrev_i32_e32 v[[HI:[0-9]+]], 31, v[[LO]]
; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}} ; VI-NEXT: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
define amdgpu_kernel void @v_test_sub_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 { define amdgpu_kernel void @v_test_sub_i16_sext_to_i64(i64 addrspace(1)* %out, i16 addrspace(1)* %in0, i16 addrspace(1)* %in1) #1 {
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid %gep.out = getelementptr inbounds i64, i64 addrspace(1)* %out, i32 %tid
%gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid %gep.in0 = getelementptr inbounds i16, i16 addrspace(1)* %in0, i32 %tid
%gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid %gep.in1 = getelementptr inbounds i16, i16 addrspace(1)* %in1, i32 %tid
Show All 31 Lines

llvm/test/CodeGen/AMDGPU/sub.v2i16.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines; VI-NEXT: s_endpgm
store <2 x i16> %add, <2 x i16> addrspace(1)* %out store <2 x i16> %add, <2 x i16> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @s_test_sub_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(4)* %in0, <2 x i16> addrspace(4)* %in1) #1 { define amdgpu_kernel void @s_test_sub_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(4)* %in0, <2 x i16> addrspace(4)* %in1) #1 {
; GFX9-LABEL: s_test_sub_v2i16: ; GFX9-LABEL: s_test_sub_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x34
; GFX9-NEXT: s_mov_b32 s3, 0xf000 ; GFX9-NEXT: s_mov_b32 s3, 0xf000
; GFX9-NEXT: s_mov_b32 s2, -1 ; GFX9-NEXT: s_mov_b32 s2, -1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s6, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s7, s[0:1], 0x0
; GFX9-NEXT: s_mov_b32 s0, s4 ; GFX9-NEXT: s_mov_b32 s0, s4
; GFX9-NEXT: s_mov_b32 s1, s5 ; GFX9-NEXT: s_mov_b32 s1, s5
; GFX9-NEXT: s_load_dword s4, s[6:7], 0x0
; GFX9-NEXT: s_load_dword s5, s[8:9], 0x0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, s7 ; GFX9-NEXT: v_mov_b32_e32 v0, s5
; GFX9-NEXT: v_pk_sub_i16 v0, s6, v0 ; GFX9-NEXT: v_pk_sub_i16 v0, s4, v0
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; VI-LABEL: s_test_sub_v2i16: ; VI-LABEL: s_test_sub_v2i16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x34
; VI-NEXT: s_mov_b32 s3, 0xf000 ; VI-NEXT: s_mov_b32 s3, 0xf000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_load_dword s6, s[6:7], 0x0
; VI-NEXT: s_load_dword s7, s[0:1], 0x0
; VI-NEXT: s_mov_b32 s0, s4 ; VI-NEXT: s_mov_b32 s0, s4
; VI-NEXT: s_mov_b32 s1, s5 ; VI-NEXT: s_mov_b32 s1, s5
; VI-NEXT: s_load_dword s4, s[6:7], 0x0
; VI-NEXT: s_load_dword s5, s[8:9], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshr_b32 s4, s6, 16 ; VI-NEXT: s_lshr_b32 s6, s4, 16
; VI-NEXT: s_lshr_b32 s5, s7, 16 ; VI-NEXT: s_lshr_b32 s7, s5, 16
; VI-NEXT: s_sub_i32 s4, s4, s5 ; VI-NEXT: s_sub_i32 s4, s4, s5
; VI-NEXT: s_sub_i32 s6, s6, s7 ; VI-NEXT: s_sub_i32 s5, s6, s7
; VI-NEXT: s_and_b32 s5, s6, 0xffff ; VI-NEXT: s_and_b32 s4, s4, 0xffff
; VI-NEXT: s_lshl_b32 s4, s4, 16 ; VI-NEXT: s_lshl_b32 s5, s5, 16
; VI-NEXT: s_or_b32 s4, s5, s4 ; VI-NEXT: s_or_b32 s4, s4, s5
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%a = load <2 x i16>, <2 x i16> addrspace(4)* %in0 %a = load <2 x i16>, <2 x i16> addrspace(4)* %in0
%b = load <2 x i16>, <2 x i16> addrspace(4)* %in1 %b = load <2 x i16>, <2 x i16> addrspace(4)* %in1
%add = sub <2 x i16> %a, %b %add = sub <2 x i16> %a, %b
store <2 x i16> %add, <2 x i16> addrspace(1)* %out store <2 x i16> %add, <2 x i16> addrspace(1)* %out
ret void ret void
▲ Show 20 Lines • Show All 499 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_mov_b32 s2, -1 ; GFX9-NEXT: s_mov_b32 s2, -1
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v2 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s6, v2
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: global_load_dword v2, v[2:3], off
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: global_load_dword v1, v[2:3], off
; GFX9-NEXT: s_mov_b32 s0, s4 ; GFX9-NEXT: s_mov_b32 s0, s4
; GFX9-NEXT: s_mov_b32 s1, s5 ; GFX9-NEXT: s_mov_b32 s1, s5
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_sub_i16 v1, v0, v2 ; GFX9-NEXT: v_pk_sub_i16 v1, v0, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX9-NEXT: v_bfe_i32 v0, v1, 0, 16 ; GFX9-NEXT: v_bfe_i32 v0, v1, 0, 16
; GFX9-NEXT: v_bfe_i32 v2, v2, 0, 16 ; GFX9-NEXT: v_bfe_i32 v2, v2, 0, 16
; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GFX9-NEXT: v_ashrrev_i32_e32 v3, 31, v2
; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX9-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; VI-LABEL: v_test_sub_v2i16_sext_to_v2i64: ; VI-LABEL: v_test_sub_v2i16_sext_to_v2i64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_mov_b32 s3, 0xf000 ; VI-NEXT: s_mov_b32 s3, 0xf000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v2
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_load_dword v2, v[2:3]
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: flat_load_dword v1, v[2:3]
; VI-NEXT: s_mov_b32 s0, s4 ; VI-NEXT: s_mov_b32 s0, s4
; VI-NEXT: s_mov_b32 s1, s5 ; VI-NEXT: s_mov_b32 s1, s5
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: v_sub_u16_sdwa v1, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_sub_u16_sdwa v2, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_sub_u16_e32 v0, v0, v2 ; VI-NEXT: v_sub_u16_e32 v0, v0, v1
; VI-NEXT: v_bfe_i32 v2, v1, 0, 16
; VI-NEXT: v_bfe_i32 v0, v0, 0, 16 ; VI-NEXT: v_bfe_i32 v0, v0, 0, 16
; VI-NEXT: v_bfe_i32 v2, v2, 0, 16
; VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; VI-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v2
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep.out = getelementptr inbounds <2 x i64>, <2 x i64> addrspace(1)* %out, i32 %tid %gep.out = getelementptr inbounds <2 x i64>, <2 x i64> addrspace(1)* %out, i32 %tid
%gep.in0 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in0, i32 %tid %gep.in0 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in0, i32 %tid
%gep.in1 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in1, i32 %tid %gep.in1 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in1, i32 %tid
Show All 12 Lines

llvm/test/CodeGen/AMDGPU/trunc-combine.ll

Show First 20 Lines • Show All 100 Lines • ▼ Show 20 Lines
; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: truncate_high_elt_extract_vector: ; VI-LABEL: truncate_high_elt_extract_vector:
; VI: ; %bb.0: ; %bb ; VI: ; %bb.0: ; %bb
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_load_dword s2, s[4:5], 0x0
; VI-NEXT: s_load_dword s3, s[6:7], 0x0
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: s_load_dword s0, s[4:5], 0x0
; VI-NEXT: s_load_dword s1, s[6:7], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_sext_i32_i16 s0, s2 ; VI-NEXT: s_sext_i32_i16 s0, s0
; VI-NEXT: s_sext_i32_i16 s1, s3 ; VI-NEXT: s_sext_i32_i16 s1, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_mul_i32_i24_e32 v2, s1, v2 ; VI-NEXT: v_mul_i32_i24_e32 v2, s1, v2
; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; VI-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
bb: bb:
%tmp = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %arg, i64 undef %tmp = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %arg, i64 undef
%tmp3 = load <2 x i16>, <2 x i16> addrspace(1)* %tmp, align 4 %tmp3 = load <2 x i16>, <2 x i16> addrspace(1)* %tmp, align 4
Show All 35 Lines

llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll

Show All 13 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_234u(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_234u(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_234u: ; GFX9-LABEL: shuffle_v4f16_234u:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 4, i32 undef> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 4, i32 undef>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_u1u3(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_u1u3(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 undef, i32 undef, i32 7> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 undef, i32 undef, i32 7>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_35u5(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_35u5(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_35u5: ; GFX9-LABEL: shuffle_v4f16_35u5:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v2, v[2:3], off
; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4
; GFX9-NEXT: global_load_dword v1, v[2:3], off ; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 5, i32 undef, i32 5> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 5, i32 undef, i32 5>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_357u(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_357u(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_357u: ; GFX9-LABEL: shuffle_v4f16_357u:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4
; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 5, i32 7, i32 undef> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 5, i32 7, i32 undef>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_0101(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_0101(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
Show All 22 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_0145(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_0145(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_0145: ; GFX9-LABEL: shuffle_v4f16_0145:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v2 ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 4, i32 5> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_0167(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_0167(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_0167: ; GFX9-LABEL: shuffle_v4f16_0167:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v3 ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 6, i32 7> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_2301(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_2301(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
Show All 23 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 2, i32 3> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_2345(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_2345(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_2345: ; GFX9-LABEL: shuffle_v4f16_2345:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 4, i32 5> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_2367(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_2367(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_2367: ; GFX9-LABEL: shuffle_v4f16_2367:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1 ; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: v_mov_b32_e32 v1, v3
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 6, i32 7> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_4501(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_4501(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_4501: ; GFX9-LABEL: shuffle_v4f16_4501:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[3:4], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[1:2], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v0, v3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v4
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 0, i32 1> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_4523(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_4523(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_4523: ; GFX9-LABEL: shuffle_v4f16_4523:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v2 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 2, i32 3> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
Show All 24 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 6, i32 7> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_6701(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_6701(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_6701: ; GFX9-LABEL: shuffle_v4f16_6701:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[1:2], v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v0, v3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v1
; GFX9-NEXT: v_mov_b32_e32 v1, v4
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 7, i32 0, i32 1> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_6723(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_6723(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_6723: ; GFX9-LABEL: shuffle_v4f16_6723:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v3 ; GFX9-NEXT: v_mov_b32_e32 v0, v3
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 7, i32 2, i32 3> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
Show All 27 Lines
} }
define <4 x half> @shuffle_v4f16_2356(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_2356(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_2356: ; GFX9-LABEL: shuffle_v4f16_2356:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v6, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v0, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v0, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v5 ; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 5, i32 6> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 5, i32 6>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_5623(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_5623(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_5623: ; GFX9-LABEL: shuffle_v4f16_5623:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v4, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_and_b32_sdwa v0, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_mov_b32_e32 v0, 0xffff
; GFX9-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 6, i32 2, i32 3> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 6, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_3456(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_3456(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_3456: ; GFX9-LABEL: shuffle_v4f16_3456:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4
; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v3, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_and_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v3 ; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 ; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v4
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 4, i32 5, i32 6> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_5634(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_5634(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_5634: ; GFX9-LABEL: shuffle_v4f16_5634:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4
; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off ; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_and_b32_sdwa v3, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v0
; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v3 ; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v4
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 6, i32 3, i32 4> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 6, i32 3, i32 4>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_5734(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_5734(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_5734: ; GFX9-LABEL: shuffle_v4f16_5734:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v4, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[2:3], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:4
; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v3, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 16, v1 ; GFX9-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_and_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v1, v0, 16, v3 ; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v0
; GFX9-NEXT: v_lshl_or_b32 v0, v4, 16, v2 ; GFX9-NEXT: v_lshl_or_b32 v0, v3, 16, v4
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 7, i32 3, i32 4> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 5, i32 7, i32 3, i32 4>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x i16> @shuffle_v4i16_2356(<4 x i16> addrspace(1)* %arg0, <4 x i16> addrspace(1)* %arg1) { define <4 x i16> @shuffle_v4i16_2356(<4 x i16> addrspace(1)* %arg0, <4 x i16> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4i16_2356: ; GFX9-LABEL: shuffle_v4i16_2356:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off ; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: v_mov_b32_e32 v6, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v0, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v0, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, v5 ; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x i16>, <4 x i16> addrspace(1)* %arg0 %val0 = load <4 x i16>, <4 x i16> addrspace(1)* %arg0
%val1 = load <4 x i16>, <4 x i16> addrspace(1)* %arg1 %val1 = load <4 x i16>, <4 x i16> addrspace(1)* %arg1
%shuffle = shufflevector <4 x i16> %val0, <4 x i16> %val1, <4 x i32> <i32 2, i32 3, i32 5, i32 6> %shuffle = shufflevector <4 x i16> %val0, <4 x i16> %val1, <4 x i32> <i32 2, i32 3, i32 5, i32 6>
ret <4 x i16> %shuffle ret <4 x i16> %shuffle
} }
define <4 x i16> @shuffle_v4i16_0167(<4 x i16> addrspace(1)* %arg0, <4 x i16> addrspace(1)* %arg1) { define <4 x i16> @shuffle_v4i16_0167(<4 x i16> addrspace(1)* %arg0, <4 x i16> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4i16_0167: ; GFX9-LABEL: shuffle_v4i16_0167:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v3 ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x i16>, <4 x i16> addrspace(1)* %arg0 %val0 = load <4 x i16>, <4 x i16> addrspace(1)* %arg0
%val1 = load <4 x i16>, <4 x i16> addrspace(1)* %arg1 %val1 = load <4 x i16>, <4 x i16> addrspace(1)* %arg1
%shuffle = shufflevector <4 x i16> %val0, <4 x i16> %val1, <4 x i32> <i32 0, i32 1, i32 6, i32 7> %shuffle = shufflevector <4 x i16> %val0, <4 x i16> %val1, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
ret <4 x i16> %shuffle ret <4 x i16> %shuffle
} }
define <4 x half> @shuffle_v4f16_0000(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_0000(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 1, i32 1, i32 0, i32 0> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 1, i32 1, i32 0, i32 0>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v4f16_6161(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_6161(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_6161: ; GFX9-LABEL: shuffle_v4f16_6161:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v2, v[2:3], off offset:4
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: global_load_dword v1, v[2:3], off offset:4
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1 ; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1
; GFX9-NEXT: v_mov_b32_e32 v1, v0 ; GFX9-NEXT: v_mov_b32_e32 v1, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 1, i32 6, i32 1> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 6, i32 1, i32 6, i32 1>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v8f16_4589(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v8f16_4589(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v8f16_4589: ; GFX9-LABEL: shuffle_v8f16_4589:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v2, v[2:3], off
; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:8 ; GFX9-NEXT: global_load_dword v0, v[0:1], off offset:8
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: global_load_dword v1, v[2:3], off
; GFX9-NEXT: v_mov_b32_e32 v1, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0 %val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0
%val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1 %val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1
%shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 4, i32 5, i32 8, i32 9> %shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 4, i32 5, i32 8, i32 9>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v8f16_10_11_2_3(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v8f16_10_11_2_3(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v8f16_10_11_2_3: ; GFX9-LABEL: shuffle_v8f16_10_11_2_3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v2, v[2:3], off offset:4
; GFX9-NEXT: global_load_dword v1, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dword v1, v[0:1], off offset:4
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: global_load_dword v0, v[2:3], off offset:4
; GFX9-NEXT: v_mov_b32_e32 v0, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0 %val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0
%val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1 %val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1
%shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 10, i32 11, i32 2, i32 3> %shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 10, i32 11, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <4 x half> @shuffle_v8f16_13_14_2_3(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v8f16_13_14_2_3(<8 x half> addrspace(1)* %arg0, <8 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v8f16_13_14_2_3: ; GFX9-LABEL: shuffle_v8f16_13_14_2_3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[2:5], v[2:3], off ; GFX9-NEXT: global_load_dwordx4 v[2:5], v[2:3], off
; GFX9-NEXT: global_load_dword v1, v[0:1], off offset:4 ; GFX9-NEXT: global_load_dword v1, v[0:1], off offset:4
; GFX9-NEXT: v_mov_b32_e32 v6, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v0, 0xffff
; GFX9-NEXT: s_waitcnt vmcnt(1) ; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_and_b32_sdwa v0, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_and_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v0, v5, 16, v0 ; GFX9-NEXT: v_lshl_or_b32 v0, v5, 16, v0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0 %val0 = load <8 x half>, <8 x half> addrspace(1)* %arg0
%val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1 %val1 = load <8 x half>, <8 x half> addrspace(1)* %arg1
%shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 13, i32 14, i32 2, i32 3> %shuffle = shufflevector <8 x half> %val0, <8 x half> %val1, <4 x i32> <i32 13, i32 14, i32 2, i32 3>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
Show All 28 Lines; GFX9-NEXT: s_setpc_b64 s[30:31]
%shuffle = shufflevector <2 x half> %val0, <2 x half> %val1, <4 x i32> <i32 0, i32 1, i32 1, i32 0> %shuffle = shufflevector <2 x half> %val0, <2 x half> %val1, <4 x i32> <i32 0, i32 1, i32 1, i32 0>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
define <6 x half> @shuffle_v6f16_452367(<6 x half> addrspace(1)* %arg0, <6 x half> addrspace(1)* %arg1) { define <6 x half> @shuffle_v6f16_452367(<6 x half> addrspace(1)* %arg0, <6 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v6f16_452367: ; GFX9-LABEL: shuffle_v6f16_452367:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v3, v[2:3], off ; GFX9-NEXT: v_mov_b32_e32 v4, v3
; GFX9-NEXT: v_mov_b32_e32 v3, v2
; GFX9-NEXT: global_load_dwordx3 v[0:2], v[0:1], off ; GFX9-NEXT: global_load_dwordx3 v[0:2], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: global_load_dword v3, v[3:4], off
; GFX9-NEXT: s_waitcnt vmcnt(1)
; GFX9-NEXT: v_mov_b32_e32 v0, v2 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v2, v3 ; GFX9-NEXT: v_mov_b32_e32 v2, v3
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <6 x half>, <6 x half> addrspace(1)* %arg0 %val0 = load <6 x half>, <6 x half> addrspace(1)* %arg0
%val1 = load <6 x half>, <6 x half> addrspace(1)* %arg1 %val1 = load <6 x half>, <6 x half> addrspace(1)* %arg1
%shuffle = shufflevector <6 x half> %val0, <6 x half> %val1, <6 x i32> <i32 4, i32 5, i32 2, i32 3, i32 6, i32 7> %shuffle = shufflevector <6 x half> %val0, <6 x half> %val1, <6 x i32> <i32 4, i32 5, i32 2, i32 3, i32 6, i32 7>
ret <6 x half> %shuffle ret <6 x half> %shuffle
} }
define amdgpu_kernel void @fma_shuffle(<4 x half> addrspace(1)* nocapture readonly %A, <4 x half> addrspace(1)* nocapture readonly %B, <4 x half> addrspace(1)* nocapture %C) { define amdgpu_kernel void @fma_shuffle(<4 x half> addrspace(1)* nocapture readonly %A, <4 x half> addrspace(1)* nocapture readonly %B, <4 x half> addrspace(1)* nocapture %C) {
; GFX9-LABEL: fma_shuffle: ; GFX9-LABEL: fma_shuffle:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, s0, v4
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v4
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: v_mov_b32_e32 v5, s5 ; GFX9-NEXT: v_mov_b32_e32 v5, s5
; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4 ; GFX9-NEXT: v_add_co_u32_e32 v4, vcc, s4, v4
; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc
; GFX9-NEXT: global_load_dwordx2 v[6:7], v[4:5], off
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[6:7], v[4:5], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_pk_fma_f16 v6, v0, v2, v6 op_sel_hi:[0,1,1] ; GFX9-NEXT: v_pk_fma_f16 v6, v0, v2, v6 op_sel_hi:[0,1,1]
; GFX9-NEXT: v_pk_fma_f16 v2, v1, v2, v7 op_sel_hi:[0,1,1] ; GFX9-NEXT: v_pk_fma_f16 v2, v1, v2, v7 op_sel_hi:[0,1,1]
; GFX9-NEXT: v_pk_fma_f16 v0, v0, v3, v6 op_sel:[1,0,0] ; GFX9-NEXT: v_pk_fma_f16 v0, v0, v3, v6 op_sel:[1,0,0]
; GFX9-NEXT: v_pk_fma_f16 v1, v1, v3, v2 op_sel:[1,0,0] ; GFX9-NEXT: v_pk_fma_f16 v1, v1, v3, v2 op_sel:[1,0,0]
; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
entry: entry:
Show All 24 Linesentry:
store <4 x half> %tmp32, <4 x half> addrspace(1)* %arrayidx2, align 8 store <4 x half> %tmp32, <4 x half> addrspace(1)* %arrayidx2, align 8
ret void ret void
} }
define <4 x half> @shuffle_v4f16_0456(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) { define <4 x half> @shuffle_v4f16_0456(<4 x half> addrspace(1)* %arg0, <4 x half> addrspace(1)* %arg1) {
; GFX9-LABEL: shuffle_v4f16_0456: ; GFX9-LABEL: shuffle_v4f16_0456:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[2:3], v[2:3], off
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff ; GFX9-NEXT: global_load_dwordx2 v[1:2], v[2:3], off
; GFX9-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 ; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff
; GFX9-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX9-NEXT: v_and_b32_e32 v0, v3, v0
; GFX9-NEXT: v_lshl_or_b32 v0, v2, 16, v0 ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshl_or_b32 v1, v3, 16, v4 ; GFX9-NEXT: v_and_b32_sdwa v3, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: v_lshl_or_b32 v0, v1, 16, v0
; GFX9-NEXT: v_lshl_or_b32 v1, v2, 16, v3
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0 %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0
%val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1 %val1 = load <4 x half>, <4 x half> addrspace(1)* %arg1
%shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 4, i32 5, i32 6> %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 0, i32 4, i32 5, i32 6>
ret <4 x half> %shuffle ret <4 x half> %shuffle
} }
declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) #0 declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) #0
declare i32 @llvm.amdgcn.workitem.id.x() #0 declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone speculatable } attributes #0 = { nounwind readnone speculatable }

llvm/test/CodeGen/AMDGPU/wait.ll

; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT
; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=DEFAULT
; RUN: llc -march=amdgcn --misched=ilpmax -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX ; RUN: llc -march=amdgcn --misched=ilpmax -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX
; RUN: llc -march=amdgcn --misched=ilpmax -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX ; RUN: llc -march=amdgcn --misched=ilpmax -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -strict-whitespace %s --check-prefix=ILPMAX
; The ilpmax scheduler is used for the second test to get the ordering we want for the test. ; The ilpmax scheduler is used for the second test to get the ordering we want for the test.
; DEFAULT-LABEL: {{^}}main: ; DEFAULT-LABEL: {{^}}main:
; DEFAULT: s_load_dwordx4 ; DEFAULT: s_load_dwordx4
; DEFAULT: s_load_dwordx4 ; DEFAULT: s_load_dwordx4
; DEFAULT: s_waitcnt lgkmcnt(0) ; DEFAULT: s_waitcnt lgkmcnt(0)
; DEFAULT: buffer_load_format_xyzw ; DEFAULT: buffer_load_format_xyzw
; DEFAULT: s_waitcnt vmcnt(0) ; DEFAULT: s_waitcnt vmcnt(0)
; DEFAULT: buffer_load_format_xyzw ; DEFAULT: buffer_load_format_xyzw
; DEFAULT: s_waitcnt vmcnt(0) ; DEFAULT: s_waitcnt vmcnt(0)
; DEFAULT: exp ; DEFAULT: exp
; DEFAULT-NEXT: exp ; DEFAULT: exp
; DEFAULT-NEXT: s_endpgm ; DEFAULT-NEXT: s_endpgm
define amdgpu_vs void @main(<16 x i8> addrspace(4)* inreg %arg, <16 x i8> addrspace(4)* inreg %arg1, <32 x i8> addrspace(4)* inreg %arg2, <16 x i8> addrspace(4)* inreg %arg3, <16 x i8> addrspace(4)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(4)* inreg %constptr) #0 { define amdgpu_vs void @main(<16 x i8> addrspace(4)* inreg %arg, <16 x i8> addrspace(4)* inreg %arg1, <32 x i8> addrspace(4)* inreg %arg2, <16 x i8> addrspace(4)* inreg %arg3, <16 x i8> addrspace(4)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(4)* inreg %constptr) #0 {
main_body: main_body:
%tmp = getelementptr <16 x i8>, <16 x i8> addrspace(4)* %arg3, i32 0 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(4)* %arg3, i32 0
%tmp10 = load <16 x i8>, <16 x i8> addrspace(4)* %tmp, !tbaa !0 %tmp10 = load <16 x i8>, <16 x i8> addrspace(4)* %tmp, !tbaa !0
%tmp10.cast = bitcast <16 x i8> %tmp10 to <4 x i32> %tmp10.cast = bitcast <16 x i8> %tmp10 to <4 x i32>
%tmp11 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %tmp10.cast, i32 %arg6, i32 0, i1 false, i1 false) %tmp11 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> %tmp10.cast, i32 %arg6, i32 0, i1 false, i1 false)
%tmp12 = extractelement <4 x float> %tmp11, i32 0 %tmp12 = extractelement <4 x float> %tmp11, i32 0
▲ Show 20 Lines • Show All 64 Lines • Show Last 20 Lines