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[AArch64][SVE2] Add intrinsics for binary narrowing operations
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Authored by andwar on Dec 16 2019, 8:26 AM.

Details

Summary

The following intrinsics for binary narrowing shift righ operations are
added:

  • @llvm.aarch64.sve.shrnb
  • @llvm.aarch64.sve.uqshrnb
  • @llvm.aarch64.sve.sqshrnb
  • @llvm.aarch64.sve.sqshrunb
  • @llvm.aarch64.sve.uqrshrnb
  • @llvm.aarch64.sve.sqrshrnb
  • @llvm.aarch64.sve.sqrshrunb
  • @llvm.aarch64.sve.shrnt
  • @llvm.aarch64.sve.uqshrnt
  • @llvm.aarch64.sve.sqshrnt
  • @llvm.aarch64.sve.sqshrunt
  • @llvm.aarch64.sve.uqrshrnt
  • @llvm.aarch64.sve.sqrshrnt
  • @llvm.aarch64.sve.sqrshrunt

Diff Detail

Event Timeline

andwar created this revision.Dec 16 2019, 8:26 AM
efriedma added inline comments.Dec 16 2019, 12:46 PM
llvm/include/llvm/IR/IntrinsicsAArch64.td
1033

Missing ImmArg

andwar updated this revision to Diff 234247.Dec 17 2019, 2:20 AM
  • Add missing ImmArg
  • Add TImmLeaf-based equivalents for vecshiftR8, vecshiftR16 and vecshiftR32
  • Add missing s in the tests (that was an accidental typo)
andwar marked an inline comment as done.Dec 17 2019, 2:22 AM
This revision is now accepted and ready to land.Dec 17 2019, 1:13 PM
This revision was automatically updated to reflect the committed changes.