This patch is an extension of an earlier patch introducing support for r6-r11 (https://reviews.llvm.org/D68862). Here we replace the former hard-coded use of r4 as a scratch register in some parts of the ARM backend, and deal with the cases where r4 and r5 are used as input registers to segmented stack routines (e.g. __chkstk).
Reserving r4 or r5 with segmented stacks is realized by temporarily storing the contents of these registers in free scratch registers, so is subject to a small performance impact (i.e., two additional mov instructions per register). This is only supported on targets where ARMv6 instructions are available.