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carwil (Carey Williams)
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User Since
Jan 5 2018, 8:33 AM (100 w, 6 d)

Recent Activity

Fri, Nov 29

carwil committed rG76fd58d0fe69: Revert "[ARM] Allocatable Global Register Variables for ARM" (authored by carwil).
Revert "[ARM] Allocatable Global Register Variables for ARM"
Fri, Nov 29, 9:18 AM
carwil added a reverting change for rG2d739f98d8a5: [ARM] Allocatable Global Register Variables for ARM: rG76fd58d0fe69: Revert "[ARM] Allocatable Global Register Variables for ARM".
Fri, Nov 29, 9:18 AM
carwil committed rGc313a6bdbe36: Revert "[NFC] Fix test reserve_global_reg.ll after 2d739f9" (authored by carwil).
Revert "[NFC] Fix test reserve_global_reg.ll after 2d739f9"
Fri, Nov 29, 9:17 AM
carwil added a reverting change for rGaea7578fade2: [NFC] Fix test reserve_global_reg.ll after 2d739f9: rGc313a6bdbe36: Revert "[NFC] Fix test reserve_global_reg.ll after 2d739f9".
Fri, Nov 29, 9:17 AM
carwil added a comment to D68862: [ARM] Allocatable Global Register Variables for ARM.

Reverted.

Fri, Nov 29, 9:17 AM · Restricted Project, Restricted Project

Tue, Nov 26

carwil added a comment to D68862: [ARM] Allocatable Global Register Variables for ARM.

Hi @efriedma, thanks your comments. You're right, that was hasty of me. Apologies for that, it won't happen again.

Tue, Nov 26, 7:21 AM · Restricted Project, Restricted Project

Fri, Nov 15

carwil accepted D68862: [ARM] Allocatable Global Register Variables for ARM.

I think there's been plenty of time for comments here. LGTM.

Fri, Nov 15, 8:27 AM · Restricted Project, Restricted Project

Oct 30 2019

carwil added a comment to D68862: [ARM] Allocatable Global Register Variables for ARM.

Just want to double check with @efriedma, before we except this. I believe this patch now catches all the points you made on https://reviews.llvm.org/D56005. Anything we've missed?

Oct 30 2019, 10:02 AM · Restricted Project, Restricted Project

Oct 17 2019

carwil committed rL375091: Request Github access for carwil.
Request Github access for carwil
Oct 17 2019, 2:21 AM

Oct 15 2019

carwil added a comment to D68862: [ARM] Allocatable Global Register Variables for ARM.

IMHO, since reserved registes are per-function, this strongly suggests implementation as function attribute(s), rather than subtarget features (also for the pre-existing r9).

What do you mean reserved registers are per-function? That sounds like you're describing local register variables, which I don't believe Clang has any support for (and there aren't a great deal of use-cases for anyway).
We're specifically talking about global usage here.

I mean that the set is dynamically computed and depends on the specific function: cf. https://github.com/llvm/llvm-project/blob/master/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp#L184
as opposed to, say, depend only on target/subtarget/abi.

Oct 15 2019, 6:31 AM · Restricted Project, Restricted Project

Oct 14 2019

carwil added a comment to D68862: [ARM] Allocatable Global Register Variables for ARM.

IMHO, since reserved registes are per-function, this strongly suggests implementation as function attribute(s), rather than subtarget features (also for the pre-existing r9).

Oct 14 2019, 8:06 AM · Restricted Project, Restricted Project

Oct 11 2019

carwil abandoned D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Superseded by https://reviews.llvm.org/D68862.

Oct 11 2019, 2:44 AM
carwil abandoned D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.

Superseded by https://reviews.llvm.org/D68862.

Oct 11 2019, 2:44 AM

Sep 6 2019

Herald updated subscribers of D66180: [GlobalISel][CallLowering] Add support for splitting types according to calling conventions.
Sep 6 2019, 8:48 AM · Restricted Project

Aug 1 2019

carwil accepted D65516: [NFC] Test commit, corrected some spelling in comment.

NFC test commit. LGTM.

Aug 1 2019, 5:04 AM · Restricted Project

Jul 25 2019

carwil added a comment to D65000: [ARM] Set default alignment to 64bits.

test case missing A8 aside this looks ok to me. Would like to see if there are any comments from the Pacific time zone.

Jul 25 2019, 5:44 AM · Restricted Project, Restricted Project

Mar 22 2019

carwil committed rG2c3c9ca4ba26: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent (authored by carwil).
[ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent
Mar 22 2019, 9:20 AM
carwil committed rL356776: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.
[ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent
Mar 22 2019, 9:20 AM
carwil committed rC356776: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.
[ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent
Mar 22 2019, 9:20 AM
carwil closed D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.
Mar 22 2019, 9:19 AM · Restricted Project

Mar 15 2019

carwil updated the diff for D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.

Done. I've added an extra parameter over what you might expect as classifyArgumentTypes doesn't seem to consider AAPCS16, whereas classifyReturnTypes does.
I've also renamed the variable to make the distinction between it and the function clearer.

Mar 15 2019, 3:31 AM · Restricted Project

Mar 14 2019

carwil updated the diff for D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.

I got bit a confused earlier. That does actually seem like correct behaviour (once we're no longer able to treat the struct as a homogeneous aggregate).
I've tightened up the conditional a bit as it wouldn't have previously accounted for the case where you had mfloat-abi=hard with an AAPCS (non VFP) attribute. Although in this instance, the backend does seem to be correcting/ignoring that, it's still best we don't blindly rely on such behaviour.

Mar 14 2019, 9:48 AM · Restricted Project

Mar 8 2019

carwil added a comment to D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.

Not sure how to write a testcase off the top of my head... have you tried homogeneous aggregates with more than two elements?

Mar 8 2019, 2:58 AM · Restricted Project

Mar 7 2019

carwil added reviewers for D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent: srhines, efriedma, peter.smith, psmith.
Mar 7 2019, 7:19 AM · Restricted Project
carwil created D59094: [ARM] Fix bug 39982 - pcs("aapcs-vfp") is not consistent.
Mar 7 2019, 7:17 AM · Restricted Project

Feb 21 2019

carwil added a comment to D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Not at all, thank you your comments.

Feb 21 2019, 8:33 AM

Feb 15 2019

carwil updated subscribers of D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Hi @eli.friedman, are you still happy to review this?

Feb 15 2019, 2:23 AM

Feb 5 2019

carwil updated the diff for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.

Removed the complicated frame pointer/ffixed combination errors in favour of an always on warning (in a new group, so it can be silenced).

Feb 5 2019, 4:00 AM
carwil updated the diff for D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Fixed an oversight where R6 could be used as the base pointer, even with ffixed-r6 specified.

Feb 5 2019, 3:57 AM

Jan 24 2019

carwil accepted D57088: Add information about unit tests to the testing guide.

Thanks for the changes! LGTM. Approved.

Jan 24 2019, 6:52 AM

Jan 23 2019

carwil updated the diff for D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Added more test coverage, notably that to catch issues with using reserved registers for alignment and making up Thumb reg deficit.

Jan 23 2019, 9:26 AM
carwil updated the diff for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.

More tests, and better handling of argument combination errors.

Jan 23 2019, 9:23 AM
carwil added a comment to D57088: Add information about unit tests to the testing guide.

Thanks for posting this! Always good to doc updates.
Bit of _very_ opinionated bit of bike-shedding. Content otherwise LGTM!

Jan 23 2019, 3:33 AM

Jan 18 2019

carwil added a comment to D56305: [AArch64] Support reserving arbitrary general purpose registers.

Hi, we're currently working on similar functionality for the ARM backend, so I got pointed to take a look at this patch.
Looks good to me, I quite like the tablegen improvements, but agree with trong's comments.

Jan 18 2019, 10:03 AM · Restricted Project, Restricted Project

Jan 15 2019

carwil updated the diff for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.

Added cfe-commits.

Jan 15 2019, 3:26 AM
carwil updated the diff for D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.

Added llvm-commits.

Jan 15 2019, 2:35 AM

Jan 14 2019

carwil updated the diff for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.

Added some regression tests for invalid -ffixed-reg combinations and the declaration of (un)supported variables.

Jan 14 2019, 10:20 AM

Jan 11 2019

carwil updated the diff for D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.
  • Re-implementation using subtarget features over metadata.
  • Reduction of register range to R5-R11.
  • Additional checks to fix issues with spilling registers for stack alignment.
Jan 11 2019, 12:45 PM
carwil updated the diff for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.
  • Re-implementation using subtarget features over metadata.
  • Reduction of register range to R5-R11.
  • Additional checks to fix issues with spilling registers for stack alignment.
  • Added clang errors for conflicting options with reserved registers.
Jan 11 2019, 12:40 PM

Dec 21 2018

carwil added a reviewer for D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM: amilendra_arm.
Dec 21 2018, 7:48 AM
carwil added a reviewer for D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM: amilendra_arm.
Dec 21 2018, 7:48 AM
carwil created D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM.
Dec 21 2018, 7:46 AM
carwil created D56003: [RFC] [CFE] Allocatable Global Register Variables for ARM.
Dec 21 2018, 7:41 AM

Dec 17 2018

carwil committed rC349335: [Docs] Expand -fstack-protector and -fstack-protector-all.
[Docs] Expand -fstack-protector and -fstack-protector-all
Dec 17 2018, 2:15 AM
carwil committed rL349335: [Docs] Expand -fstack-protector and -fstack-protector-all.
[Docs] Expand -fstack-protector and -fstack-protector-all
Dec 17 2018, 2:14 AM
carwil closed D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info.
Dec 17 2018, 2:14 AM · Restricted Project

Dec 12 2018

carwil updated the diff for D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info.

Reworded -fstack-protector-all to bring it in line with the changes to the other two options.

Dec 12 2018, 2:10 AM · Restricted Project

Dec 11 2018

carwil updated the diff for D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info.

Make thopre's suggested changes.

Dec 11 2018, 12:43 AM · Restricted Project

Dec 7 2018

carwil added reviewers for D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info: thopre, petpav01, jmagee.
Dec 7 2018, 9:36 AM · Restricted Project
carwil updated the diff for D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info.

Edited Options.td directly, rather than the generated docs file.

Dec 7 2018, 9:31 AM · Restricted Project
carwil created D55428: [Docs] Expand -fstack-protector and -fstack-protector-all info.
Dec 7 2018, 5:16 AM · Restricted Project

Jan 22 2018

carwil committed rL323118: [AArch64] optimise v4f16 fcmps to utilise vector instructions.
[AArch64] optimise v4f16 fcmps to utilise vector instructions
Jan 22 2018, 6:19 AM
carwil closed D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions.
Jan 22 2018, 6:19 AM
carwil updated the diff for D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions.

Missing colon

Jan 22 2018, 6:18 AM
carwil updated the diff for D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions.
Jan 22 2018, 5:40 AM

Jan 19 2018

carwil committed rL322958: Test commit.
Test commit
Jan 19 2018, 8:57 AM

Jan 16 2018

carwil updated the diff for D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions.

Improved code formatting based on review

Jan 16 2018, 10:50 AM

Jan 5 2018

carwil created D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions.
Jan 5 2018, 9:22 AM