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Differential D69734

[globalisel] Rename G_GEP to G_PTR_ADD
ClosedPublic

Authored by dsanders on Nov 1 2019, 1:19 PM.

Details

Reviewers
volkan
aditya_nandakumar
bogner
rovka
arsenm
Commits
rGe74c5b96610d: [globalisel] Rename G_GEP to G_PTR_ADD
Summary

G_GEP is rather poorly named. It's a simple pointer+scalar addition and
doesn't support any of the complexities of getelementptr. I therefore
propose that we rename it. There's a G_PTR_MASK so let's follow that
convention and go with G_PTR_ADD

Diff Detail

Event Timeline

dsanders created this revision.Nov 1 2019, 1:19 PM
Herald added a project: Restricted Project. · View Herald TranscriptNov 1 2019, 1:19 PM
Herald added subscribers: Petar.Avramovic, arphaman, atanasyan and 6 others. · View Herald Transcript
Harbormaster completed remote builds in B40420: Diff 227519.Nov 1 2019, 1:19 PM
rovka accepted this revision.Nov 4 2019, 1:05 AM

LGTM.

This revision is now accepted and ready to land.Nov 4 2019, 1:05 AM
aditya_nandakumar accepted this revision.Nov 4 2019, 11:46 AM

LGTM.

dsanders added a comment.Nov 5 2019, 10:12 AM

Thanks.

I realized I missed a couple things in this patch this morning:

  • Filenames containing 'gep'
  • Functions named buildGep() and similar

I'll fix both of this this before pushing

dsanders added a comment.Nov 5 2019, 10:23 AM

... this this ...

*sigh* More typos

arsenm added a comment.Nov 5 2019, 10:26 AM
In D69734#1734287, @dsanders wrote:

Thanks.

I realized I missed a couple things in this patch this morning:

  • Filenames containing 'gep'
  • Functions named buildGep() and similar

I'll fix both of this this before pushing

If you're fixing names of instructions, that buildUndef doesn't match the G_IMPLICIT_DEF name has bothered me. I'm not sure which should be renamed, especially since freeze seems to be happening

Closed by commit rGe74c5b96610d: [globalisel] Rename G_GEP to G_PTR_ADD (authored by dsanders). · Explain WhyNov 5 2019, 10:38 AM
This revision was automatically updated to reflect the committed changes.
dsanders added a comment.Nov 5 2019, 12:14 PM
In D69734#1734315, @arsenm wrote:
In D69734#1734287, @dsanders wrote:

Thanks.

I realized I missed a couple things in this patch this morning:

  • Filenames containing 'gep'
  • Functions named buildGep() and similar

I'll fix both of this this before pushing

If you're fixing names of instructions, that buildUndef doesn't match the G_IMPLICIT_DEF name has bothered me. I'm not sure which should be renamed

Probably buildUndef() should change to buildImplicitDef(). I'm going to leave it for the moment though just to let this change flow down to our downstream repos before I do another big rename

especially since freeze seems to be happening

I'm not sure what you're referring to here.

arsenm added a comment.Nov 5 2019, 12:28 PM
In D69734#1734586, @dsanders wrote:
In D69734#1734315, @arsenm wrote:
In D69734#1734287, @dsanders wrote:

Thanks.

I realized I missed a couple things in this patch this morning:

  • Filenames containing 'gep'
  • Functions named buildGep() and similar

I'll fix both of this this before pushing

If you're fixing names of instructions, that buildUndef doesn't match the G_IMPLICIT_DEF name has bothered me. I'm not sure which should be renamed

Probably buildUndef() should change to buildImplicitDef(). I'm going to leave it for the moment though just to let this change flow down to our downstream repos before I do another big rename

especially since freeze seems to be happening

I'm not sure what you're referring to here.

The freeze instruction was recently committed, and I thought the plan was to eventually remove undef. Stricter rules are necessary at least for frozen undef than I think are implied by G_IMPLICIT_DEF

Large Diff

This large diff affects 133 files. Files without inline comments have been collapsed. Expand All Files

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Diff 227920

llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h

llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h

llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h

llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

llvm/include/llvm/Support/TargetOpcodes.def

llvm/include/llvm/Target/GenericOpcodes.td

llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp

llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

llvm/lib/CodeGen/MachineVerifier.cpp

llvm/lib/Target/AArch64/AArch64CallLowering.cpp

llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp

llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp

llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp

llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

llvm/lib/Target/ARM/ARMCallLowering.cpp

llvm/lib/Target/ARM/ARMInstructionSelector.cpp

llvm/lib/Target/ARM/ARMLegalizerInfo.cpp

llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp

llvm/lib/Target/Mips/MipsCallLowering.cpp

llvm/lib/Target/Mips/MipsInstructionSelector.cpp

llvm/lib/Target/Mips/MipsLegalizerInfo.cpp

llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp

llvm/lib/Target/X86/X86CallLowering.cpp

llvm/lib/Target/X86/X86InstructionSelector.cpp

llvm/lib/Target/X86/X86LegalizerInfo.cpp

llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll

llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll

llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll

llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll

llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll

llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll

llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir

llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir

llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir

llvm/test/CodeGen/AArch64/GlobalISel/inline-small-memcpy.mir

llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll

llvm/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir

llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir

llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir

llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir

llvm/test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir

llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir

llvm/test/CodeGen/AArch64/GlobalISel/select-load.mir

llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir

llvm/test/CodeGen/AArch64/GlobalISel/select.mir

llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir

llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll

llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-gep.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll

llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-gep.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-gep.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir

llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir

llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir

llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll

llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir

llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-vfp4.mir

llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll

llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir

llvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll

llvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir

llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load_store_fold.mir

llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir

llvm/test/CodeGen/Mips/GlobalISel/instruction-select/var_arg.mir

llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll

llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll

llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll

llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll

llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll

llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir

llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir

llvm/test/CodeGen/Mips/GlobalISel/legalizer/var_arg.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/load.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s32.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/long_ambiguous_chain_s64.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/store.mir

llvm/test/CodeGen/Mips/GlobalISel/regbankselect/var_arg.mir

llvm/test/CodeGen/X86/GlobalISel/gep.ll

llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll

llvm/test/CodeGen/X86/GlobalISel/legalize-gep.mir

llvm/test/CodeGen/X86/GlobalISel/legalize-memop-scalar-32.mir

llvm/test/CodeGen/X86/GlobalISel/legalize-ptr-add.mir

llvm/test/CodeGen/X86/GlobalISel/legalize-undef.mir

llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll

llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir

llvm/test/CodeGen/X86/GlobalISel/select-gep.mir

llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-unordered.mir

llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar.mir

llvm/test/CodeGen/X86/GlobalISel/select-ptr-add.mir

llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll

llvm/test/MachineVerifier/test_g_gep.mir

llvm/test/MachineVerifier/test_g_ptr_add.mir