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[X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding.
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Authored by craig.topper on Oct 5 2019, 11:39 PM.

Details

Summary

The 2 source operands commutable instructions are encoded in the
VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.

The VEX.B field is missing from the 2-byte VEX encoding. If the
VEX.VVVV source is 0-7 and the other register is 8-15 we can
swap them to avoid needing the VEX.B field. This works as long as
the VEX.W, VEX.mmmmm, and VEX.X fields are also not needed.

Fixes PR36706.

Diff Detail

Event Timeline

craig.topper created this revision.Oct 5 2019, 11:39 PM
Herald added a project: Restricted Project. · View Herald TranscriptOct 5 2019, 11:39 PM
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RKSimon accepted this revision.Oct 13 2019, 4:34 AM

LGTM with one minor query.

llvm/lib/Target/X86/X86MCInstLower.cpp
915

The need to exclude specific opcodes here is unfortunate - maybe add a comment explaining why? Maybe even put them under a separate 'no doing' case statement?

This revision is now accepted and ready to land.Oct 13 2019, 4:34 AM
This revision was automatically updated to reflect the committed changes.