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[InstCombine] Range metadata for ARM MVE VMIN/VMAX.
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Authored by simon_tatham on Sep 11 2019, 4:58 AM.



The VMINV and VMAXV intrinsics return a value of type i32. But it's
always going to be the sign- or zero-extension of a lane of its vector
operand, so if that lane is smaller than 32 bits, the i32 value will
often have a smaller range.

Setting range metadata on the output value should allow the backend to
avoid emitting an unnecessary UXTB or SXTB instruction if the user
code then casts the value back to the smaller vector-lane integer

In fact, this seems to work in the unsigned case, but not in the
signed case, because SelectionDAGBuilder::lowerRangeToAssertZExt
doesn't come with a counterpart for AssertSExt. But if one is added in
future, then this commit will enable it to apply to VMIN and VMAX.

Event Timeline

simon_tatham created this revision.Sep 11 2019, 4:58 AM

This is because the Rda parameter of a vminv is treated as being the same size as the elements? Not as a 32bit integer.

Is is possible to do the same thing in DAG combining, in some place like SimplifyDemandedBitsForTargetNode? This would avoid needing the range metadata and might capture the sext case.

Rebased to current master.