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[InstCombine] Known-bits optimization for ARM MVE VADC.

Authored by simon_tatham on Sep 4 2019, 5:49 AM.



The MVE VADC instruction reads and writes the carry bit at bit 29 of
the FPSCR register. The corresponding ACLE intrinsic is specified to
work with an integer in which the carry bit is stored at bit 0. So if
a user writes a code sequence in C that passes the carry from one VADC
to the next, like this,

s0 = vadcq_u32(a0, b0, &carry);
s1 = vadcq_u32(a1, b1, &carry);

then clang will generate IR for each of those operations that shifts
the carry bit up into bit 29 before the VADC, and after it, shifts it
back down and masks off all but the low bit. But in this situation
what you really wanted was two consecutive VADC instructions, so that
the second one directly reads the value left in FPSCR by the first,
without wasting several instructions on pointlessly clearing the other
flag bits in between.

This commit explains to InstCombine that the other bits of the flags
operand don't matter, and adds a test that demonstrates that all the
code between the two VADC instructions can be optimized away as a

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simon_tatham created this revision.Sep 4 2019, 5:49 AM

Sounds good.

We may also be able to do something similar in ISel, during the optimisation there, but this looks like a more general fix (and I'm not sure that would add a lot over what is already here).


This looks like something else entirely!

It's setting the range metadata on vminv's?


Is this ever not 32? If so the 32 below should be the same value


I think the last parameter is depth, and the default is 0? If so it might as well be left off.


Can you include a test for arm_mve_vadc_predicated?

simon_tatham marked an inline comment as done.Sep 5 2019, 9:03 AM
simon_tatham added inline comments.

D'oh! Well spotted. That's what I get for writing my commit messages at the last minute.

simon_tatham marked 3 inline comments as done.Sep 11 2019, 4:57 AM
simon_tatham added inline comments.

It should always be 32, because that intrinsic argument represents a value you can VMSR into FPSCR. I'll get rid of CarryWidth completely and make it an assertion.

Moved the vmin range metadata into a separate patch.

Rebased to current master.

dmgreen accepted this revision.Oct 9 2019, 6:29 AM

LGTM. Thanks

This revision is now accepted and ready to land.Oct 9 2019, 6:29 AM

(Rebased to current master; no change)

This revision was automatically updated to reflect the committed changes.