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Differential D66793

[MVE] VMOVX patterns
ClosedPublic

Authored by dmgreen on Aug 27 2019, 2:42 AM.

Details

Reviewers
t.p.northover
SjoerdMeijer
simon_tatham
samparker
miyuki
ostannard
efriedma
Commits
rG1c5b143c990c: [MVE] VMOVX patterns
rL370184: [MVE] VMOVX patterns
Summary

This adds fp16 VMOVX patterns, using the same patterns as rL362482 with some adjustments for MVE. It allows us to move fp16 registers without going into and out of gprs.

VMOVX is able to move the top bits from a fp16 in a fp reg into the bottom bits of another register, zeroing the rest. This can be used for odd MVE register lanes. The top bits are not read by fp16 instructions, so no move is required there if we are dealing with even lanes.

Diff Detail

Repository
rL LLVM

Event Timeline

dmgreen created this revision.Aug 27 2019, 2:42 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 27 2019, 2:42 AM
Herald added subscribers: hiraditya, javed.absar. · View Herald Transcript
samparker accepted this revision.Aug 27 2019, 5:33 AM

Nice!

This revision is now accepted and ready to land.Aug 27 2019, 5:33 AM
Closed by commit rL370184: [MVE] VMOVX patterns (authored by dmgreen). · Explain WhyAug 28 2019, 3:13 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
ARM/
8 lines
test/
CodeGen/
Thumb2/
138 lines
255 lines
548 lines
68 lines
204 lines
54 lines
53 lines
162 lines
1812 lines
1532 lines
1532 lines
52 lines
1 line

Diff 217595

llvm/trunk/lib/Target/ARM/ARMInstrMVE.td

Show First 20 Lines • Show All 1,340 Lines • ▼ Show 20 Lineslet Predicates = [HasMVEInt] in {
// Floating point patterns, still enabled under HasMVEInt // Floating point patterns, still enabled under HasMVEInt
def : Pat<(extractelt (v4f32 MQPR:$src), imm:$lane), def : Pat<(extractelt (v4f32 MQPR:$src), imm:$lane),
(COPY_TO_REGCLASS (f32 (EXTRACT_SUBREG MQPR:$src, (SSubReg_f32_reg imm:$lane))), SPR)>; (COPY_TO_REGCLASS (f32 (EXTRACT_SUBREG MQPR:$src, (SSubReg_f32_reg imm:$lane))), SPR)>;
def : Pat<(insertelt (v4f32 MQPR:$src1), (f32 SPR:$src2), imm:$lane), def : Pat<(insertelt (v4f32 MQPR:$src1), (f32 SPR:$src2), imm:$lane),
(INSERT_SUBREG (v4f32 (COPY_TO_REGCLASS MQPR:$src1, MQPR)), SPR:$src2, (SSubReg_f32_reg imm:$lane))>; (INSERT_SUBREG (v4f32 (COPY_TO_REGCLASS MQPR:$src1, MQPR)), SPR:$src2, (SSubReg_f32_reg imm:$lane))>;
def : Pat<(insertelt (v8f16 MQPR:$src1), HPR:$src2, imm:$lane), def : Pat<(insertelt (v8f16 MQPR:$src1), HPR:$src2, imm:$lane),
(MVE_VMOV_to_lane_16 MQPR:$src1, (COPY_TO_REGCLASS HPR:$src2, rGPR), imm:$lane)>; (MVE_VMOV_to_lane_16 MQPR:$src1, (COPY_TO_REGCLASS HPR:$src2, rGPR), imm:$lane)>;
def : Pat<(extractelt (v8f16 MQPR:$src), imm:$lane), def : Pat<(extractelt (v8f16 MQPR:$src), imm_even:$lane),
(COPY_TO_REGCLASS (MVE_VMOV_from_lane_u16 MQPR:$src, imm:$lane), HPR)>; (EXTRACT_SUBREG MQPR:$src, (SSubReg_f16_reg imm_even:$lane))>;
def : Pat<(extractelt (v8f16 MQPR:$src), imm_odd:$lane),
(COPY_TO_REGCLASS
(VMOVH (EXTRACT_SUBREG MQPR:$src, (SSubReg_f16_reg imm_odd:$lane))),
HPR)>;
def : Pat<(v4f32 (scalar_to_vector SPR:$src)), def : Pat<(v4f32 (scalar_to_vector SPR:$src)),
(INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), SPR:$src, ssub_0)>; (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), SPR:$src, ssub_0)>;
def : Pat<(v4f32 (scalar_to_vector GPR:$src)), def : Pat<(v4f32 (scalar_to_vector GPR:$src)),
(MVE_VMOV_to_lane_32 (v4f32 (IMPLICIT_DEF)), rGPR:$src, (i32 0))>; (MVE_VMOV_to_lane_32 (v4f32 (IMPLICIT_DEF)), rGPR:$src, (i32 0))>;
def : Pat<(v8f16 (scalar_to_vector HPR:$src)), def : Pat<(v8f16 (scalar_to_vector HPR:$src)),
(INSERT_SUBREG (v8f16 (IMPLICIT_DEF)), HPR:$src, ssub_0)>; (INSERT_SUBREG (v8f16 (IMPLICIT_DEF)), HPR:$src, ssub_0)>;
def : Pat<(v8f16 (scalar_to_vector GPR:$src)), def : Pat<(v8f16 (scalar_to_vector GPR:$src)),
▲ Show 20 Lines • Show All 3,771 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-div-expand.ll

Show First 20 Lines • Show All 926 Lines • ▼ Show 20 Linesentry:
%out = frem <4 x float> %in1, %in2 %out = frem <4 x float> %in1, %in2
ret <4 x float> %out ret <4 x float> %out
} }
define arm_aapcs_vfpcc <8 x half> @fdiv_f16(<8 x half> %in1, <8 x half> %in2) { define arm_aapcs_vfpcc <8 x half> @fdiv_f16(<8 x half> %in1, <8 x half> %in2) {
; CHECK-LABEL: fdiv_f16: ; CHECK-LABEL: fdiv_f16:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r0, q1[0] ; CHECK-NEXT: vdiv.f16 s8, s0, s4
; CHECK-NEXT: vmov.u16 r1, q1[1] ; CHECK-NEXT: vmovx.f16 s10, s0
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vmov.u16 r0, q0[0]
; CHECK-NEXT: vmov s10, r0
; CHECK-NEXT: vmov.u16 r2, q0[1]
; CHECK-NEXT: vdiv.f16 s8, s10, s8
; CHECK-NEXT: vmov s10, r2
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov s8, r1 ; CHECK-NEXT: vmovx.f16 s8, s4
; CHECK-NEXT: vdiv.f16 s8, s10, s8 ; CHECK-NEXT: vdiv.f16 s8, s10, s8
; CHECK-NEXT: vdiv.f16 s12, s1, s5
; CHECK-NEXT: vmov r1, s8 ; CHECK-NEXT: vmov r1, s8
; CHECK-NEXT: vmov.16 q2[0], r0 ; CHECK-NEXT: vmov.16 q2[0], r0
; CHECK-NEXT: vmov.u16 r0, q1[2] ; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vmovx.f16 s12, s5
; CHECK-NEXT: vmovx.f16 s14, s1
; CHECK-NEXT: vmov.16 q2[1], r1 ; CHECK-NEXT: vmov.16 q2[1], r1
; CHECK-NEXT: vmov s12, r0
; CHECK-NEXT: vmov.u16 r0, q0[2]
; CHECK-NEXT: vmov s14, r0
; CHECK-NEXT: vdiv.f16 s12, s14, s12 ; CHECK-NEXT: vdiv.f16 s12, s14, s12
; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vmov.16 q2[2], r0 ; CHECK-NEXT: vmov.16 q2[2], r0
; CHECK-NEXT: vmov.u16 r0, q1[3]
; CHECK-NEXT: vmov s12, r0
; CHECK-NEXT: vmov.u16 r0, q0[3]
; CHECK-NEXT: vmov s14, r0
; CHECK-NEXT: vdiv.f16 s12, s14, s12
; CHECK-NEXT: vmov r0, s12 ; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vdiv.f16 s12, s2, s6
; CHECK-NEXT: vmov.16 q2[3], r0 ; CHECK-NEXT: vmov.16 q2[3], r0
; CHECK-NEXT: vmov.u16 r0, q1[4]
; CHECK-NEXT: vmov s12, r0
; CHECK-NEXT: vmov.u16 r0, q0[4]
; CHECK-NEXT: vmov s14, r0
; CHECK-NEXT: vdiv.f16 s12, s14, s12
; CHECK-NEXT: vmov r0, s12 ; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vmov.16 q2[4], r0 ; CHECK-NEXT: vmovx.f16 s12, s6
; CHECK-NEXT: vmov.u16 r0, q1[5] ; CHECK-NEXT: vmovx.f16 s14, s2
; CHECK-NEXT: vmov s12, r0
; CHECK-NEXT: vmov.u16 r0, q0[5]
; CHECK-NEXT: vmov s14, r0
; CHECK-NEXT: vdiv.f16 s12, s14, s12 ; CHECK-NEXT: vdiv.f16 s12, s14, s12
; CHECK-NEXT: vmov.16 q2[4], r0
; CHECK-NEXT: vmov r0, s12 ; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vdiv.f16 s12, s3, s7
; CHECK-NEXT: vmovx.f16 s4, s7
; CHECK-NEXT: vmovx.f16 s0, s3
; CHECK-NEXT: vmov.16 q2[5], r0 ; CHECK-NEXT: vmov.16 q2[5], r0
; CHECK-NEXT: vmov.u16 r0, q1[6]
; CHECK-NEXT: vmov s12, r0
; CHECK-NEXT: vmov.u16 r0, q0[6]
; CHECK-NEXT: vmov s14, r0
; CHECK-NEXT: vdiv.f16 s12, s14, s12
; CHECK-NEXT: vmov r0, s12 ; CHECK-NEXT: vmov r0, s12
; CHECK-NEXT: vmov.16 q2[6], r0
; CHECK-NEXT: vmov.u16 r0, q1[7]
; CHECK-NEXT: vmov s4, r0
; CHECK-NEXT: vmov.u16 r0, q0[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vdiv.f16 s0, s0, s4 ; CHECK-NEXT: vdiv.f16 s0, s0, s4
; CHECK-NEXT: vmov.16 q2[6], r0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q2[7], r0 ; CHECK-NEXT: vmov.16 q2[7], r0
; CHECK-NEXT: vmov q0, q2 ; CHECK-NEXT: vmov q0, q2
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%out = fdiv <8 x half> %in1, %in2 %out = fdiv <8 x half> %in1, %in2
ret <8 x half> %out ret <8 x half> %out
} }
define arm_aapcs_vfpcc <8 x half> @frem_f16(<8 x half> %in1, <8 x half> %in2) { define arm_aapcs_vfpcc <8 x half> @frem_f16(<8 x half> %in1, <8 x half> %in2) {
; CHECK-LABEL: frem_f16: ; CHECK-LABEL: frem_f16:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13} ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13} ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13}
; CHECK-NEXT: .pad #64 ; CHECK-NEXT: .pad #64
; CHECK-NEXT: sub sp, #64 ; CHECK-NEXT: sub sp, #64
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov.u16 r0, q1[0]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vmov q5, q1 ; CHECK-NEXT: vmov q5, q1
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vstr s2, [sp, #56] ; CHECK-NEXT: vstr s0, [sp, #56]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s20
; CHECK-NEXT: vstr s0, [sp, #60] ; CHECK-NEXT: vstr s0, [sp, #60]
; CHECK-NEXT: ldrd r0, r1, [sp, #56] ; CHECK-NEXT: ldrd r0, r1, [sp, #56]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q5[1] ; CHECK-NEXT: vmovx.f16 s2, s16
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[1]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmovx.f16 s0, s20
; CHECK-NEXT: vstr s2, [sp, #48] ; CHECK-NEXT: vstr s2, [sp, #48]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #52] ; CHECK-NEXT: vstr s0, [sp, #52]
; CHECK-NEXT: ldrd r0, r1, [sp, #48] ; CHECK-NEXT: ldrd r0, r1, [sp, #48]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q6[0], r4 ; CHECK-NEXT: vmov.16 q6[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[1], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q5[2] ; CHECK-NEXT: vstr s0, [sp, #40]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s21
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #40]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #44] ; CHECK-NEXT: vstr s0, [sp, #44]
; CHECK-NEXT: vmov.16 q6[1], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #40] ; CHECK-NEXT: ldrd r0, r1, [sp, #40]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s17
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[2], r0
; CHECK-NEXT: vmov.u16 r0, q5[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s21
; CHECK-NEXT: vstr s2, [sp, #32] ; CHECK-NEXT: vstr s2, [sp, #32]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #36] ; CHECK-NEXT: vstr s0, [sp, #36]
; CHECK-NEXT: vmov.16 q6[2], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #32] ; CHECK-NEXT: ldrd r0, r1, [sp, #32]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q5[4] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s22
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #24]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vmov.16 q6[3], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #24] ; CHECK-NEXT: ldrd r0, r1, [sp, #24]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s18
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[4], r0
; CHECK-NEXT: vmov.u16 r0, q5[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s22
; CHECK-NEXT: vstr s2, [sp, #16] ; CHECK-NEXT: vstr s2, [sp, #16]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q6[4], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #16] ; CHECK-NEXT: ldrd r0, r1, [sp, #16]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q5[6] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s23
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #8]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q6[5], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #8] ; CHECK-NEXT: ldrd r0, r1, [sp, #8]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s19
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[6], r0
; CHECK-NEXT: vmov.u16 r0, q5[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s23
; CHECK-NEXT: vstr s2, [sp] ; CHECK-NEXT: vstr s2, [sp]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q6[6], r0
; CHECK-NEXT: ldrd r0, r1, [sp] ; CHECK-NEXT: ldrd r0, r1, [sp]
; CHECK-NEXT: bl fmodf ; CHECK-NEXT: bl fmodf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[7], r0 ; CHECK-NEXT: vmov.16 q6[7], r0
; CHECK-NEXT: vmov q0, q6 ; CHECK-NEXT: vmov q0, q6
; CHECK-NEXT: add sp, #64 ; CHECK-NEXT: add sp, #64
▲ Show 20 Lines • Show All 62 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-fmas.ll

Show All 13 Lines
; CHECK-MVE-VMLA: @ %bb.0: @ %entry ; CHECK-MVE-VMLA: @ %bb.0: @ %entry
; CHECK-MVE-VMLA-NEXT: vfma.f16 q0, q1, q2 ; CHECK-MVE-VMLA-NEXT: vfma.f16 q0, q1, q2
; CHECK-MVE-VMLA-NEXT: bx lr ; CHECK-MVE-VMLA-NEXT: bx lr
; ;
; CHECK-MVE-LABEL: vfma16_v1: ; CHECK-MVE-LABEL: vfma16_v1:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r0, q2[0] ; CHECK-MVE-NEXT: vmovx.f16 s13, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q1[0] ; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s8
; CHECK-MVE-NEXT: vmov s14, r1 ; CHECK-MVE-NEXT: vmovx.f16 s14, s4
; CHECK-MVE-NEXT: vmov s13, r2 ; CHECK-MVE-NEXT: vmov.f32 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[1]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q0[1] ; CHECK-MVE-NEXT: vmov r1, s0
; CHECK-MVE-NEXT: vmla.f16 s16, s5, s9
; CHECK-MVE-NEXT: vmov r0, s13 ; CHECK-MVE-NEXT: vmov r0, s13
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vmov.16 q3[0], r1
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: vmov s12, r1 ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s13, r3 ; CHECK-MVE-NEXT: vmovx.f16 s16, s9
; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s1
; CHECK-MVE-NEXT: vmov r1, s13
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: vmov.u16 r0, q2[2]
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s18, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[3]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s2
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6] ; CHECK-MVE-NEXT: vmla.f16 s16, s6, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[4] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s10
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6] ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: vmov s16, r0 ; CHECK-MVE-NEXT: vmovx.f16 s20, s2
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[5]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s3
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmla.f16 s16, s7, s11
; CHECK-MVE-NEXT: vmovx.f16 s8, s11
; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[6] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8 ; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
entry: entry:
%0 = fmul <8 x half> %src2, %src3 %0 = fmul <8 x half> %src2, %src3
%1 = fadd <8 x half> %src1, %0 %1 = fadd <8 x half> %src1, %0
Show All 11 Lines
; CHECK-MVE-VMLA: @ %bb.0: @ %entry ; CHECK-MVE-VMLA: @ %bb.0: @ %entry
; CHECK-MVE-VMLA-NEXT: vfma.f16 q0, q1, q2 ; CHECK-MVE-VMLA-NEXT: vfma.f16 q0, q1, q2
; CHECK-MVE-VMLA-NEXT: bx lr ; CHECK-MVE-VMLA-NEXT: bx lr
; ;
; CHECK-MVE-LABEL: vfma16_v2: ; CHECK-MVE-LABEL: vfma16_v2:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r0, q2[0] ; CHECK-MVE-NEXT: vmovx.f16 s13, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q1[0] ; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s8
; CHECK-MVE-NEXT: vmov s14, r1 ; CHECK-MVE-NEXT: vmovx.f16 s14, s4
; CHECK-MVE-NEXT: vmov s13, r2 ; CHECK-MVE-NEXT: vmov.f32 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[1]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q0[1] ; CHECK-MVE-NEXT: vmov r1, s0
; CHECK-MVE-NEXT: vmla.f16 s16, s5, s9
; CHECK-MVE-NEXT: vmov r0, s13 ; CHECK-MVE-NEXT: vmov r0, s13
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vmov.16 q3[0], r1
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: vmov s12, r1 ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s13, r3 ; CHECK-MVE-NEXT: vmovx.f16 s16, s9
; CHECK-MVE-NEXT: vmla.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s1
; CHECK-MVE-NEXT: vmov r1, s13
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: vmov.u16 r0, q2[2]
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s18, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[3]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s2
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6] ; CHECK-MVE-NEXT: vmla.f16 s16, s6, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[4] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s10
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6] ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: vmov s16, r0 ; CHECK-MVE-NEXT: vmovx.f16 s20, s2
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[5]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s3
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmla.f16 s16, s7, s11
; CHECK-MVE-NEXT: vmovx.f16 s8, s11
; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[6] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmla.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8 ; CHECK-MVE-NEXT: vmla.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
entry: entry:
%0 = fmul <8 x half> %src2, %src3 %0 = fmul <8 x half> %src2, %src3
%1 = fadd <8 x half> %0, %src1 %1 = fadd <8 x half> %0, %src1
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; CHECK-MVE-VMLA: @ %bb.0: @ %entry ; CHECK-MVE-VMLA: @ %bb.0: @ %entry
; CHECK-MVE-VMLA-NEXT: vfms.f16 q0, q1, q2 ; CHECK-MVE-VMLA-NEXT: vfms.f16 q0, q1, q2
; CHECK-MVE-VMLA-NEXT: bx lr ; CHECK-MVE-VMLA-NEXT: bx lr
; ;
; CHECK-MVE-LABEL: vfms16: ; CHECK-MVE-LABEL: vfms16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r0, q2[0] ; CHECK-MVE-NEXT: vmovx.f16 s13, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q1[0] ; CHECK-MVE-NEXT: vmls.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s8
; CHECK-MVE-NEXT: vmov s14, r1 ; CHECK-MVE-NEXT: vmovx.f16 s14, s4
; CHECK-MVE-NEXT: vmov s13, r2 ; CHECK-MVE-NEXT: vmov.f32 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[1]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vmls.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmls.f16 s13, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q0[1] ; CHECK-MVE-NEXT: vmov r1, s0
; CHECK-MVE-NEXT: vmls.f16 s16, s5, s9
; CHECK-MVE-NEXT: vmov r0, s13 ; CHECK-MVE-NEXT: vmov r0, s13
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vmov.16 q3[0], r1
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: vmov s12, r1 ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s13, r3 ; CHECK-MVE-NEXT: vmovx.f16 s16, s9
; CHECK-MVE-NEXT: vmls.f16 s13, s14, s12 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s1
; CHECK-MVE-NEXT: vmov r1, s13
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: vmov.u16 r0, q2[2]
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s18, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[3]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s2
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6] ; CHECK-MVE-NEXT: vmls.f16 s16, s6, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[4] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s10
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6] ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: vmov s16, r0 ; CHECK-MVE-NEXT: vmovx.f16 s20, s2
; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[5]
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s20, r0
; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16 ; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov s18, r1 ; CHECK-MVE-NEXT: vmov.f32 s16, s3
; CHECK-MVE-NEXT: vmov r0, s20 ; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmls.f16 s16, s7, s11
; CHECK-MVE-NEXT: vmovx.f16 s8, s11
; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[6] ; CHECK-MVE-NEXT: vmov r0, s16
; CHECK-MVE-NEXT: vmov s16, r0
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmls.f16 s20, s18, s16
; CHECK-MVE-NEXT: vmov r0, s20
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmls.f16 s0, s4, s8 ; CHECK-MVE-NEXT: vmls.f16 s0, s4, s8
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
entry: entry:
%0 = fmul <8 x half> %src2, %src3 %0 = fmul <8 x half> %src2, %src3
%1 = fsub <8 x half> %src1, %0 %1 = fsub <8 x half> %src1, %0
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llvm/trunk/test/CodeGen/Thumb2/mve-fmath.ll

Show All 13 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @sqrt_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @sqrt_float16_t(<8 x half> %src) {
; CHECK-LABEL: sqrt_float16_t: ; CHECK-LABEL: sqrt_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r0, q0[0] ; CHECK-NEXT: vmovx.f16 s4, s0
; CHECK-NEXT: vmov.u16 r1, q0[1] ; CHECK-NEXT: vsqrt.f16 s8, s1
; CHECK-NEXT: vmov s4, r0
; CHECK-NEXT: vsqrt.f16 s4, s4 ; CHECK-NEXT: vsqrt.f16 s4, s4
; CHECK-NEXT: vmov r0, s4 ; CHECK-NEXT: vmov r0, s4
; CHECK-NEXT: vmov s4, r1 ; CHECK-NEXT: vsqrt.f16 s4, s0
; CHECK-NEXT: vsqrt.f16 s4, s4
; CHECK-NEXT: vmov r1, s4 ; CHECK-NEXT: vmov r1, s4
; CHECK-NEXT: vmov.16 q1[0], r0 ; CHECK-NEXT: vmovx.f16 s0, s3
; CHECK-NEXT: vmov.u16 r0, q0[2] ; CHECK-NEXT: vmov.16 q1[0], r1
; CHECK-NEXT: vmov.16 q1[1], r1 ; CHECK-NEXT: vsqrt.f16 s0, s0
; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vmov.16 q1[1], r0
; CHECK-NEXT: vsqrt.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s1
; CHECK-NEXT: vmov.16 q1[2], r0 ; CHECK-NEXT: vmov.16 q1[2], r0
; CHECK-NEXT: vmov.u16 r0, q0[3]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vsqrt.f16 s8, s8 ; CHECK-NEXT: vsqrt.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vsqrt.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[3], r0 ; CHECK-NEXT: vmov.16 q1[3], r0
; CHECK-NEXT: vmov.u16 r0, q0[4]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vsqrt.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[4], r0 ; CHECK-NEXT: vmov.16 q1[4], r0
; CHECK-NEXT: vmov.u16 r0, q0[5]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vsqrt.f16 s8, s8 ; CHECK-NEXT: vsqrt.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vsqrt.f16 s8, s3
; CHECK-NEXT: vmov.16 q1[5], r0 ; CHECK-NEXT: vmov.16 q1[5], r0
; CHECK-NEXT: vmov.u16 r0, q0[6]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vsqrt.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[6], r0 ; CHECK-NEXT: vmov.16 q1[6], r0
; CHECK-NEXT: vmov.u16 r0, q0[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vsqrt.f16 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q1[7], r0 ; CHECK-NEXT: vmov.16 q1[7], r0
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%0 = call fast <8 x half> @llvm.sqrt.v8f16(<8 x half> %src) %0 = call fast <8 x half> @llvm.sqrt.v8f16(<8 x half> %src)
ret <8 x half> %0 ret <8 x half> %0
} }
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; CHECK-LABEL: cos_float16_t: ; CHECK-LABEL: cos_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl cosf ; CHECK-NEXT: bl cosf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: sin_float16_t: ; CHECK-LABEL: sin_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl sinf ; CHECK-NEXT: bl sinf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: exp_float16_t: ; CHECK-LABEL: exp_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl expf ; CHECK-NEXT: bl expf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: exp2_float16_t: ; CHECK-LABEL: exp2_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl exp2f ; CHECK-NEXT: bl exp2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: log_float16_t: ; CHECK-LABEL: log_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl logf ; CHECK-NEXT: bl logf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: log2_float16_t: ; CHECK-LABEL: log2_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl log2f ; CHECK-NEXT: bl log2f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines
; CHECK-LABEL: log10_float16_t: ; CHECK-LABEL: log10_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-NEXT: vpush {d8, d9, d10, d11} ; CHECK-NEXT: vpush {d8, d9, d10, d11}
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q0[1]
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vstr s0, [sp, #24] ; CHECK-NEXT: ldr r0, [sp, #28]
; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0 ; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmovx.f16 s0, s16
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: ldr r0, [sp, #28] ; CHECK-NEXT: ldr r0, [sp, #24]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[0], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q5[1], r4
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q5[1], r0
; CHECK-NEXT: ldr r0, [sp, #20] ; CHECK-NEXT: ldr r0, [sp, #20]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[2], r0 ; CHECK-NEXT: vmovx.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[2], r0
; CHECK-NEXT: vstr s0, [sp, #16] ; CHECK-NEXT: vstr s0, [sp, #16]
; CHECK-NEXT: ldr r0, [sp, #16] ; CHECK-NEXT: ldr r0, [sp, #16]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q5[3], r0
; CHECK-NEXT: ldr r0, [sp, #12] ; CHECK-NEXT: ldr r0, [sp, #12]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[4], r0 ; CHECK-NEXT: vmovx.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[4], r0
; CHECK-NEXT: vstr s0, [sp, #8] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: ldr r0, [sp, #8] ; CHECK-NEXT: ldr r0, [sp, #8]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q5[5], r0
; CHECK-NEXT: ldr r0, [sp, #4] ; CHECK-NEXT: ldr r0, [sp, #4]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[6], r0 ; CHECK-NEXT: vmovx.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vmov.16 q5[6], r0
; CHECK-NEXT: vstr s0, [sp] ; CHECK-NEXT: vstr s0, [sp]
; CHECK-NEXT: ldr r0, [sp] ; CHECK-NEXT: ldr r0, [sp]
; CHECK-NEXT: bl log10f ; CHECK-NEXT: bl log10f
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q5[7], r0 ; CHECK-NEXT: vmov.16 q5[7], r0
; CHECK-NEXT: vmov q0, q5 ; CHECK-NEXT: vmov q0, q5
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; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .save {r4, lr} ; CHECK-NEXT: .save {r4, lr}
; CHECK-NEXT: push {r4, lr} ; CHECK-NEXT: push {r4, lr}
; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13} ; CHECK-NEXT: .vsave {d8, d9, d10, d11, d12, d13}
; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13} ; CHECK-NEXT: vpush {d8, d9, d10, d11, d12, d13}
; CHECK-NEXT: .pad #64 ; CHECK-NEXT: .pad #64
; CHECK-NEXT: sub sp, #64 ; CHECK-NEXT: sub sp, #64
; CHECK-NEXT: vmov q4, q0 ; CHECK-NEXT: vmov q4, q0
; CHECK-NEXT: vmov.u16 r0, q1[0]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[0]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vmov q5, q1 ; CHECK-NEXT: vmov q5, q1
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
; CHECK-NEXT: vstr s2, [sp, #56] ; CHECK-NEXT: vstr s0, [sp, #56]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s20
; CHECK-NEXT: vstr s0, [sp, #60] ; CHECK-NEXT: vstr s0, [sp, #60]
; CHECK-NEXT: ldrd r0, r1, [sp, #56] ; CHECK-NEXT: ldrd r0, r1, [sp, #56]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q5[1] ; CHECK-NEXT: vmovx.f16 s2, s16
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[1]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r4, s0
; CHECK-NEXT: vmovx.f16 s0, s20
; CHECK-NEXT: vstr s2, [sp, #48] ; CHECK-NEXT: vstr s2, [sp, #48]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #52] ; CHECK-NEXT: vstr s0, [sp, #52]
; CHECK-NEXT: ldrd r0, r1, [sp, #48] ; CHECK-NEXT: ldrd r0, r1, [sp, #48]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.16 q6[0], r4 ; CHECK-NEXT: vmov.16 q6[0], r4
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[1], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
; CHECK-NEXT: vmov.u16 r0, q5[2] ; CHECK-NEXT: vstr s0, [sp, #40]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s21
; CHECK-NEXT: vmov.u16 r0, q4[2]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #40]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #44] ; CHECK-NEXT: vstr s0, [sp, #44]
; CHECK-NEXT: vmov.16 q6[1], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #40] ; CHECK-NEXT: ldrd r0, r1, [sp, #40]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s17
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[2], r0
; CHECK-NEXT: vmov.u16 r0, q5[3]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[3]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s21
; CHECK-NEXT: vstr s2, [sp, #32] ; CHECK-NEXT: vstr s2, [sp, #32]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #36] ; CHECK-NEXT: vstr s0, [sp, #36]
; CHECK-NEXT: vmov.16 q6[2], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #32] ; CHECK-NEXT: ldrd r0, r1, [sp, #32]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[3], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
; CHECK-NEXT: vmov.u16 r0, q5[4] ; CHECK-NEXT: vstr s0, [sp, #24]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s22
; CHECK-NEXT: vmov.u16 r0, q4[4]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #24]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #28] ; CHECK-NEXT: vstr s0, [sp, #28]
; CHECK-NEXT: vmov.16 q6[3], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #24] ; CHECK-NEXT: ldrd r0, r1, [sp, #24]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s18
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[4], r0
; CHECK-NEXT: vmov.u16 r0, q5[5]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[5]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s22
; CHECK-NEXT: vstr s2, [sp, #16] ; CHECK-NEXT: vstr s2, [sp, #16]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #20] ; CHECK-NEXT: vstr s0, [sp, #20]
; CHECK-NEXT: vmov.16 q6[4], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #16] ; CHECK-NEXT: ldrd r0, r1, [sp, #16]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[5], r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
; CHECK-NEXT: vmov.u16 r0, q5[6] ; CHECK-NEXT: vstr s0, [sp, #8]
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s23
; CHECK-NEXT: vmov.u16 r0, q4[6]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vstr s2, [sp, #8]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #12] ; CHECK-NEXT: vstr s0, [sp, #12]
; CHECK-NEXT: vmov.16 q6[5], r0
; CHECK-NEXT: ldrd r0, r1, [sp, #8] ; CHECK-NEXT: ldrd r0, r1, [sp, #8]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmovx.f16 s2, s19
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[6], r0
; CHECK-NEXT: vmov.u16 r0, q5[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vmov.u16 r0, q4[7]
; CHECK-NEXT: vmov s2, r0
; CHECK-NEXT: vcvtb.f32.f16 s2, s2 ; CHECK-NEXT: vcvtb.f32.f16 s2, s2
; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmovx.f16 s0, s23
; CHECK-NEXT: vstr s2, [sp] ; CHECK-NEXT: vstr s2, [sp]
; CHECK-NEXT: vcvtb.f32.f16 s0, s0 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
; CHECK-NEXT: vstr s0, [sp, #4] ; CHECK-NEXT: vstr s0, [sp, #4]
; CHECK-NEXT: vmov.16 q6[6], r0
; CHECK-NEXT: ldrd r0, r1, [sp] ; CHECK-NEXT: ldrd r0, r1, [sp]
; CHECK-NEXT: bl powf ; CHECK-NEXT: bl powf
; CHECK-NEXT: vmov s0, r0 ; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vcvtb.f16.f32 s0, s0 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q6[7], r0 ; CHECK-NEXT: vmov.16 q6[7], r0
; CHECK-NEXT: vmov q0, q6 ; CHECK-NEXT: vmov q0, q6
; CHECK-NEXT: add sp, #64 ; CHECK-NEXT: add sp, #64
▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Linesentry:
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @copysign_float16_t(<8 x half> %src1, <8 x half> %src2) { define arm_aapcs_vfpcc <8 x half> @copysign_float16_t(<8 x half> %src1, <8 x half> %src2) {
; CHECK-LABEL: copysign_float16_t: ; CHECK-LABEL: copysign_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: .pad #32 ; CHECK-NEXT: .pad #32
; CHECK-NEXT: sub sp, #32 ; CHECK-NEXT: sub sp, #32
; CHECK-NEXT: vmov.u16 r0, q1[1] ; CHECK-NEXT: vmovx.f16 s8, s4
; CHECK-NEXT: vmov.u16 r1, q0[0] ; CHECK-NEXT: vstr.16 s4, [sp, #28]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vmov.u16 r0, q1[0]
; CHECK-NEXT: vstr.16 s8, [sp, #24] ; CHECK-NEXT: vstr.16 s8, [sp, #24]
; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vmovx.f16 s8, s5
; CHECK-NEXT: vmov.u16 r0, q1[2] ; CHECK-NEXT: vstr.16 s5, [sp, #20]
; CHECK-NEXT: vstr.16 s8, [sp, #28]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vmov.u16 r0, q1[3]
; CHECK-NEXT: vstr.16 s8, [sp, #20]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vmov.u16 r0, q1[4]
; CHECK-NEXT: vstr.16 s8, [sp, #16] ; CHECK-NEXT: vstr.16 s8, [sp, #16]
; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vmovx.f16 s8, s6
; CHECK-NEXT: vmov.u16 r0, q1[5] ; CHECK-NEXT: vmovx.f16 s4, s7
; CHECK-NEXT: vstr.16 s8, [sp, #12] ; CHECK-NEXT: vstr.16 s6, [sp, #12]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vmov.u16 r0, q1[6]
; CHECK-NEXT: vstr.16 s8, [sp, #8] ; CHECK-NEXT: vstr.16 s8, [sp, #8]
; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vstr.16 s7, [sp, #4]
; CHECK-NEXT: vmov.u16 r0, q1[7]
; CHECK-NEXT: vmov s4, r0
; CHECK-NEXT: vstr.16 s8, [sp, #4]
; CHECK-NEXT: vstr.16 s4, [sp] ; CHECK-NEXT: vstr.16 s4, [sp]
; CHECK-NEXT: vmov.u16 r0, q0[1] ; CHECK-NEXT: ldrb.w r0, [sp, #29]
; CHECK-NEXT: vmov s4, r0 ; CHECK-NEXT: vabs.f16 s4, s0
; CHECK-NEXT: ldrb.w r0, [sp, #25]
; CHECK-NEXT: vabs.f16 s4, s4
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s6, s4 ; CHECK-NEXT: vneg.f16 s6, s4
; CHECK-NEXT: vabs.f16 s8, s1
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s4, s4, s6 ; CHECK-NEXT: vseleq.f16 s4, s4, s6
; CHECK-NEXT: ldrb.w r1, [sp, #25]
; CHECK-NEXT: vmov r0, s4 ; CHECK-NEXT: vmov r0, s4
; CHECK-NEXT: vmov s4, r1 ; CHECK-NEXT: vmovx.f16 s4, s0
; CHECK-NEXT: ldrb.w r1, [sp, #29]
; CHECK-NEXT: vabs.f16 s4, s4
; CHECK-NEXT: ands r1, r1, #128 ; CHECK-NEXT: ands r1, r1, #128
; CHECK-NEXT: vneg.f16 s6, s4 ; CHECK-NEXT: vabs.f16 s4, s4
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r1, #1 ; CHECK-NEXT: movne r1, #1
; CHECK-NEXT: vneg.f16 s6, s4
; CHECK-NEXT: cmp r1, #0 ; CHECK-NEXT: cmp r1, #0
; CHECK-NEXT: vmovx.f16 s0, s3
; CHECK-NEXT: vseleq.f16 s4, s4, s6 ; CHECK-NEXT: vseleq.f16 s4, s4, s6
; CHECK-NEXT: vabs.f16 s0, s0
; CHECK-NEXT: vmov r1, s4 ; CHECK-NEXT: vmov r1, s4
; CHECK-NEXT: vmov.16 q1[0], r1 ; CHECK-NEXT: vmov.16 q1[0], r0
; CHECK-NEXT: vmov.16 q1[1], r0
; CHECK-NEXT: vmov.u16 r0, q0[2]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: ldrb.w r0, [sp, #21] ; CHECK-NEXT: ldrb.w r0, [sp, #21]
; CHECK-NEXT: vabs.f16 s8, s8 ; CHECK-NEXT: vmov.16 q1[1], r1
; CHECK-NEXT: ands r0, r0, #128 ; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s8, s8, s10 ; CHECK-NEXT: vseleq.f16 s8, s8, s10
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s1
; CHECK-NEXT: vmov.16 q1[2], r0 ; CHECK-NEXT: vmov.16 q1[2], r0
; CHECK-NEXT: vmov.u16 r0, q0[3]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: ldrb.w r0, [sp, #17] ; CHECK-NEXT: ldrb.w r0, [sp, #17]
; CHECK-NEXT: vabs.f16 s8, s8 ; CHECK-NEXT: vabs.f16 s8, s8
; CHECK-NEXT: ands r0, r0, #128 ; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8 ; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s8, s8, s10 ; CHECK-NEXT: vseleq.f16 s8, s8, s10
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vabs.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[3], r0 ; CHECK-NEXT: vmov.16 q1[3], r0
; CHECK-NEXT: vmov.u16 r0, q0[4]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: ldrb.w r0, [sp, #13] ; CHECK-NEXT: ldrb.w r0, [sp, #13]
; CHECK-NEXT: vabs.f16 s8, s8
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8 ; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s8, s8, s10 ; CHECK-NEXT: vseleq.f16 s8, s8, s10
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[4], r0 ; CHECK-NEXT: vmov.16 q1[4], r0
; CHECK-NEXT: vmov.u16 r0, q0[5]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: ldrb.w r0, [sp, #9] ; CHECK-NEXT: ldrb.w r0, [sp, #9]
; CHECK-NEXT: vabs.f16 s8, s8 ; CHECK-NEXT: vabs.f16 s8, s8
; CHECK-NEXT: vneg.f16 s2, s0
; CHECK-NEXT: ands r0, r0, #128 ; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8 ; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s8, s8, s10 ; CHECK-NEXT: vseleq.f16 s8, s8, s10
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vabs.f16 s8, s3
; CHECK-NEXT: vmov.16 q1[5], r0 ; CHECK-NEXT: vmov.16 q1[5], r0
; CHECK-NEXT: vmov.u16 r0, q0[6]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: ldrb.w r0, [sp, #5] ; CHECK-NEXT: ldrb.w r0, [sp, #5]
; CHECK-NEXT: vabs.f16 s8, s8
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s10, s8 ; CHECK-NEXT: vneg.f16 s10, s8
; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s8, s8, s10 ; CHECK-NEXT: vseleq.f16 s8, s8, s10
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[6], r0 ; CHECK-NEXT: vmov.16 q1[6], r0
; CHECK-NEXT: vmov.u16 r0, q0[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: ldrb.w r0, [sp, #1] ; CHECK-NEXT: ldrb.w r0, [sp, #1]
; CHECK-NEXT: vabs.f16 s0, s0
; CHECK-NEXT: ands r0, r0, #128 ; CHECK-NEXT: ands r0, r0, #128
; CHECK-NEXT: vneg.f16 s2, s0
; CHECK-NEXT: it ne ; CHECK-NEXT: it ne
; CHECK-NEXT: movne r0, #1 ; CHECK-NEXT: movne r0, #1
; CHECK-NEXT: cmp r0, #0 ; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: vseleq.f16 s0, s0, s2 ; CHECK-NEXT: vseleq.f16 s0, s0, s2
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q1[7], r0 ; CHECK-NEXT: vmov.16 q1[7], r0
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: add sp, #32 ; CHECK-NEXT: add sp, #32
▲ Show 20 Lines • Show All 58 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-fp-negabs.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVE
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-MVEFP
define arm_aapcs_vfpcc <8 x half> @fneg_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @fneg_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: fneg_float16_t: ; CHECK-MVE-LABEL: fneg_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vneg.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vneg.f16 s4, s4 ; CHECK-MVE-NEXT: vneg.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vneg.f16 s4, s0
; CHECK-MVE-NEXT: vneg.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vneg.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vneg.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vneg.f16 s8, s8 ; CHECK-MVE-NEXT: vneg.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vneg.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vneg.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vneg.f16 s8, s8 ; CHECK-MVE-NEXT: vneg.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vneg.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vneg.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vneg.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: fneg_float16_t: ; CHECK-MVEFP-LABEL: fneg_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vneg.f16 q0, q0 ; CHECK-MVEFP-NEXT: vneg.f16 q0, q0
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
entry: entry:
%0 = fsub nnan ninf nsz <2 x double> <double 0.0e0, double 0.0e0>, %src %0 = fsub nnan ninf nsz <2 x double> <double 0.0e0, double 0.0e0>, %src
ret <2 x double> %0 ret <2 x double> %0
} }
define arm_aapcs_vfpcc <8 x half> @fabs_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @fabs_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: fabs_float16_t: ; CHECK-MVE-LABEL: fabs_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vabs.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vabs.f16 s4, s4 ; CHECK-MVE-NEXT: vabs.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vabs.f16 s4, s0
; CHECK-MVE-NEXT: vabs.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vabs.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vabs.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vabs.f16 s8, s8 ; CHECK-MVE-NEXT: vabs.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vabs.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vabs.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vabs.f16 s8, s8 ; CHECK-MVE-NEXT: vabs.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vabs.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vabs.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vabs.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: fabs_float16_t: ; CHECK-MVEFP-LABEL: fabs_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vabs.f16 q0, q0 ; CHECK-MVEFP-NEXT: vabs.f16 q0, q0
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-frint.ll

Show All 18 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.ceil.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.ceil.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @fceil_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @fceil_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: fceil_float16_t: ; CHECK-MVE-LABEL: fceil_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vrintp.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vrintp.f16 s4, s4 ; CHECK-MVE-NEXT: vrintp.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vrintp.f16 s4, s0
; CHECK-MVE-NEXT: vrintp.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vrintp.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vrintp.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintp.f16 s8, s8 ; CHECK-MVE-NEXT: vrintp.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintp.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintp.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintp.f16 s8, s8 ; CHECK-MVE-NEXT: vrintp.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintp.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintp.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vrintp.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: fceil_float16_t: ; CHECK-MVEFP-LABEL: fceil_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vrintp.f16 q0, q0 ; CHECK-MVEFP-NEXT: vrintp.f16 q0, q0
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.trunc.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.trunc.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @ftrunc_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @ftrunc_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: ftrunc_float16_t: ; CHECK-MVE-LABEL: ftrunc_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vrintz.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vrintz.f16 s4, s4 ; CHECK-MVE-NEXT: vrintz.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vrintz.f16 s4, s0
; CHECK-MVE-NEXT: vrintz.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vrintz.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vrintz.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintz.f16 s8, s8 ; CHECK-MVE-NEXT: vrintz.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintz.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintz.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintz.f16 s8, s8 ; CHECK-MVE-NEXT: vrintz.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintz.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintz.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vrintz.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: ftrunc_float16_t: ; CHECK-MVEFP-LABEL: ftrunc_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vrintz.f16 q0, q0 ; CHECK-MVEFP-NEXT: vrintz.f16 q0, q0
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.rint.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.rint.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @frint_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @frint_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: frint_float16_t: ; CHECK-MVE-LABEL: frint_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vrintx.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vrintx.f16 s4, s4 ; CHECK-MVE-NEXT: vrintx.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vrintx.f16 s4, s0
; CHECK-MVE-NEXT: vrintx.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vrintx.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vrintx.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintx.f16 s8, s8 ; CHECK-MVE-NEXT: vrintx.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintx.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintx.f16 s8, s8 ; CHECK-MVE-NEXT: vrintx.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintx.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintx.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vrintx.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: frint_float16_t: ; CHECK-MVEFP-LABEL: frint_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vrintx.f16 q0, q0 ; CHECK-MVEFP-NEXT: vrintx.f16 q0, q0
Show All 39 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.nearbyint.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.nearbyint.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @fnearbyint_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @fnearbyint_float16_t(<8 x half> %src) {
; CHECK-LABEL: fnearbyint_float16_t: ; CHECK-LABEL: fnearbyint_float16_t:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r0, q0[0] ; CHECK-NEXT: vmovx.f16 s4, s0
; CHECK-NEXT: vmov.u16 r1, q0[1] ; CHECK-NEXT: vrintr.f16 s8, s1
; CHECK-NEXT: vmov s4, r0
; CHECK-NEXT: vrintr.f16 s4, s4 ; CHECK-NEXT: vrintr.f16 s4, s4
; CHECK-NEXT: vmov r0, s4 ; CHECK-NEXT: vmov r0, s4
; CHECK-NEXT: vmov s4, r1 ; CHECK-NEXT: vrintr.f16 s4, s0
; CHECK-NEXT: vrintr.f16 s4, s4
; CHECK-NEXT: vmov r1, s4 ; CHECK-NEXT: vmov r1, s4
; CHECK-NEXT: vmov.16 q1[0], r0 ; CHECK-NEXT: vmovx.f16 s0, s3
; CHECK-NEXT: vmov.u16 r0, q0[2] ; CHECK-NEXT: vmov.16 q1[0], r1
; CHECK-NEXT: vmov.16 q1[1], r1 ; CHECK-NEXT: vrintr.f16 s0, s0
; CHECK-NEXT: vmov s8, r0 ; CHECK-NEXT: vmov.16 q1[1], r0
; CHECK-NEXT: vrintr.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s1
; CHECK-NEXT: vmov.16 q1[2], r0 ; CHECK-NEXT: vmov.16 q1[2], r0
; CHECK-NEXT: vmov.u16 r0, q0[3]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vrintr.f16 s8, s8 ; CHECK-NEXT: vrintr.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vrintr.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[3], r0 ; CHECK-NEXT: vmov.16 q1[3], r0
; CHECK-NEXT: vmov.u16 r0, q0[4]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vrintr.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[4], r0 ; CHECK-NEXT: vmov.16 q1[4], r0
; CHECK-NEXT: vmov.u16 r0, q0[5]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vrintr.f16 s8, s8 ; CHECK-NEXT: vrintr.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vrintr.f16 s8, s3
; CHECK-NEXT: vmov.16 q1[5], r0 ; CHECK-NEXT: vmov.16 q1[5], r0
; CHECK-NEXT: vmov.u16 r0, q0[6]
; CHECK-NEXT: vmov s8, r0
; CHECK-NEXT: vrintr.f16 s8, s8
; CHECK-NEXT: vmov r0, s8 ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[6], r0 ; CHECK-NEXT: vmov.16 q1[6], r0
; CHECK-NEXT: vmov.u16 r0, q0[7]
; CHECK-NEXT: vmov s0, r0
; CHECK-NEXT: vrintr.f16 s0, s0
; CHECK-NEXT: vmov r0, s0 ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q1[7], r0 ; CHECK-NEXT: vmov.16 q1[7], r0
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%0 = call fast <8 x half> @llvm.nearbyint.v8f16(<8 x half> %src) %0 = call fast <8 x half> @llvm.nearbyint.v8f16(<8 x half> %src)
ret <8 x half> %0 ret <8 x half> %0
} }
Show All 39 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.floor.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.floor.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @ffloor_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @ffloor_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: ffloor_float16_t: ; CHECK-MVE-LABEL: ffloor_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vrintm.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vrintm.f16 s4, s4 ; CHECK-MVE-NEXT: vrintm.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vrintm.f16 s4, s0
; CHECK-MVE-NEXT: vrintm.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vrintm.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vrintm.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintm.f16 s8, s8 ; CHECK-MVE-NEXT: vrintm.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintm.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintm.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintm.f16 s8, s8 ; CHECK-MVE-NEXT: vrintm.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrintm.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrintm.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vrintm.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: ffloor_float16_t: ; CHECK-MVEFP-LABEL: ffloor_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vrintm.f16 q0, q0 ; CHECK-MVEFP-NEXT: vrintm.f16 q0, q0
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
entry: entry:
%0 = call fast <4 x float> @llvm.round.v4f32(<4 x float> %src) %0 = call fast <4 x float> @llvm.round.v4f32(<4 x float> %src)
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @fround_float16_t(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @fround_float16_t(<8 x half> %src) {
; CHECK-MVE-LABEL: fround_float16_t: ; CHECK-MVE-LABEL: fround_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vrinta.f16 s8, s1
; CHECK-MVE-NEXT: vmov s4, r0
; CHECK-MVE-NEXT: vrinta.f16 s4, s4 ; CHECK-MVE-NEXT: vrinta.f16 s4, s4
; CHECK-MVE-NEXT: vmov r0, s4 ; CHECK-MVE-NEXT: vmov r0, s4
; CHECK-MVE-NEXT: vmov s4, r1 ; CHECK-MVE-NEXT: vrinta.f16 s4, s0
; CHECK-MVE-NEXT: vrinta.f16 s4, s4
; CHECK-MVE-NEXT: vmov r1, s4 ; CHECK-MVE-NEXT: vmov r1, s4
; CHECK-MVE-NEXT: vmov.16 q1[0], r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov.16 q1[0], r1
; CHECK-MVE-NEXT: vmov.16 q1[1], r1 ; CHECK-MVE-NEXT: vrinta.f16 s0, s0
; CHECK-MVE-NEXT: vmov s8, r0 ; CHECK-MVE-NEXT: vmov.16 q1[1], r0
; CHECK-MVE-NEXT: vrinta.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s1
; CHECK-MVE-NEXT: vmov.16 q1[2], r0 ; CHECK-MVE-NEXT: vmov.16 q1[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrinta.f16 s8, s8 ; CHECK-MVE-NEXT: vrinta.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrinta.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[3], r0 ; CHECK-MVE-NEXT: vmov.16 q1[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrinta.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmovx.f16 s8, s2
; CHECK-MVE-NEXT: vmov.16 q1[4], r0 ; CHECK-MVE-NEXT: vmov.16 q1[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrinta.f16 s8, s8 ; CHECK-MVE-NEXT: vrinta.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vrinta.f16 s8, s3
; CHECK-MVE-NEXT: vmov.16 q1[5], r0 ; CHECK-MVE-NEXT: vmov.16 q1[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vrinta.f16 s8, s8
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov.16 q1[6], r0 ; CHECK-MVE-NEXT: vmov.16 q1[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vrinta.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q1[7], r0 ; CHECK-MVE-NEXT: vmov.16 q1[7], r0
; CHECK-MVE-NEXT: vmov q0, q1 ; CHECK-MVE-NEXT: vmov q0, q1
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: fround_float16_t: ; CHECK-MVEFP-LABEL: fround_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vrinta.f16 q0, q0 ; CHECK-MVEFP-NEXT: vrinta.f16 q0, q0
▲ Show 20 Lines • Show All 48 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-minmax.ll

Show First 20 Lines • Show All 325 Lines • ▼ Show 20 Linesentry:
%cmp = fcmp fast ogt <4 x float> %src2, %src1 %cmp = fcmp fast ogt <4 x float> %src2, %src1
%0 = select <4 x i1> %cmp, <4 x float> %src2, <4 x float> %src1 %0 = select <4 x i1> %cmp, <4 x float> %src2, <4 x float> %src1
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @minnm_float16_t(<8 x half> %src1, <8 x half> %src2) { define arm_aapcs_vfpcc <8 x half> @minnm_float16_t(<8 x half> %src1, <8 x half> %src2) {
; CHECK-MVE-LABEL: minnm_float16_t: ; CHECK-MVE-LABEL: minnm_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vminnm.f16 s8, s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s10, s4
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[0]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vminnm.f16 s8, s10, s8
; CHECK-MVE-NEXT: vmov s10, r2
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov s8, r1 ; CHECK-MVE-NEXT: vmovx.f16 s8, s0
; CHECK-MVE-NEXT: vminnm.f16 s8, s10, s8 ; CHECK-MVE-NEXT: vminnm.f16 s8, s10, s8
; CHECK-MVE-NEXT: vminnm.f16 s12, s5, s1
; CHECK-MVE-NEXT: vmov r1, s8 ; CHECK-MVE-NEXT: vmov r1, s8
; CHECK-MVE-NEXT: vmov.16 q2[0], r0 ; CHECK-MVE-NEXT: vmov.16 q2[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s12, s1
; CHECK-MVE-NEXT: vmovx.f16 s14, s5
; CHECK-MVE-NEXT: vmov.16 q2[1], r1 ; CHECK-MVE-NEXT: vmov.16 q2[1], r1
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[2], r0 ; CHECK-MVE-NEXT: vmov.16 q2[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vminnm.f16 s12, s6, s2
; CHECK-MVE-NEXT: vmov.16 q2[3], r0 ; CHECK-MVE-NEXT: vmov.16 q2[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s12, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s14, s6
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmovx.f16 s2, s7
; CHECK-MVE-NEXT: vminnm.f16 s12, s7, s3
; CHECK-MVE-NEXT: vmov.16 q2[5], r0 ; CHECK-MVE-NEXT: vmov.16 q2[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vminnm.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s2, r0
; CHECK-MVE-NEXT: vminnm.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vminnm.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q2[7], r0 ; CHECK-MVE-NEXT: vmov.16 q2[7], r0
; CHECK-MVE-NEXT: vmov q0, q2 ; CHECK-MVE-NEXT: vmov q0, q2
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: minnm_float16_t: ; CHECK-MVEFP-LABEL: minnm_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vminnm.f16 q0, q1, q0 ; CHECK-MVEFP-NEXT: vminnm.f16 q0, q1, q0
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llvm/trunk/test/CodeGen/Thumb2/mve-shuffle.ll

Show First 20 Lines • Show All 342 Lines • ▼ Show 20 Lines
entry: entry:
%out = shufflevector <4 x float> %src, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2> %out = shufflevector <4 x float> %src, <4 x float> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
ret <4 x float> %out ret <4 x float> %out
} }
define arm_aapcs_vfpcc <8 x half> @shuffle1_f16(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @shuffle1_f16(<8 x half> %src) {
; CHECK-LABEL: shuffle1_f16: ; CHECK-LABEL: shuffle1_f16:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r0, q0[7] ; CHECK-NEXT: vmovx.f16 s4, s3
; CHECK-NEXT: vmov.u16 r1, q0[6] ; CHECK-NEXT: vmov r0, s3
; CHECK-NEXT: vmov.16 q1[0], r0 ; CHECK-NEXT: vmov r1, s4
; CHECK-NEXT: vmov.u16 r0, q0[5] ; CHECK-NEXT: vmovx.f16 s8, s2
; CHECK-NEXT: vmov.16 q1[1], r1 ; CHECK-NEXT: vmov.16 q1[0], r1
; CHECK-NEXT: vmov.16 q1[1], r0
; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[2], r0 ; CHECK-NEXT: vmov.16 q1[2], r0
; CHECK-NEXT: vmov.u16 r0, q0[4] ; CHECK-NEXT: vmov r0, s2
; CHECK-NEXT: vmovx.f16 s8, s1
; CHECK-NEXT: vmov.16 q1[3], r0 ; CHECK-NEXT: vmov.16 q1[3], r0
; CHECK-NEXT: vmov.u16 r0, q0[3] ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s0
; CHECK-NEXT: vmov.16 q1[4], r0 ; CHECK-NEXT: vmov.16 q1[4], r0
; CHECK-NEXT: vmov.u16 r0, q0[2] ; CHECK-NEXT: vmov r0, s1
; CHECK-NEXT: vmov.16 q1[5], r0 ; CHECK-NEXT: vmov.16 q1[5], r0
; CHECK-NEXT: vmov.u16 r0, q0[1] ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[6], r0 ; CHECK-NEXT: vmov.16 q1[6], r0
; CHECK-NEXT: vmov.u16 r0, q0[0] ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q1[7], r0 ; CHECK-NEXT: vmov.16 q1[7], r0
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> %out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>
ret <8 x half> %out ret <8 x half> %out
} }
define arm_aapcs_vfpcc <8 x half> @shuffle2_f16(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @shuffle2_f16(<8 x half> %src) {
; CHECK-LABEL: shuffle2_f16: ; CHECK-LABEL: shuffle2_f16:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
ret <8 x half> %out ret <8 x half> %out
} }
define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) { define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) {
; CHECK-LABEL: shuffle3_f16: ; CHECK-LABEL: shuffle3_f16:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r0, q0[4] ; CHECK-NEXT: vmovx.f16 s4, s2
; CHECK-NEXT: vmov.u16 r1, q0[5] ; CHECK-NEXT: vmov r1, s2
; CHECK-NEXT: vmov.16 q1[0], r0 ; CHECK-NEXT: vmov r0, s4
; CHECK-NEXT: vmov.u16 r0, q0[7] ; CHECK-NEXT: vmov.16 q1[0], r1
; CHECK-NEXT: vmov.16 q1[1], r1 ; CHECK-NEXT: vmovx.f16 s8, s3
; CHECK-NEXT: vmov.16 q1[1], r0
; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s1
; CHECK-NEXT: vmov.16 q1[2], r0 ; CHECK-NEXT: vmov.16 q1[2], r0
; CHECK-NEXT: vmov.u16 r0, q0[6] ; CHECK-NEXT: vmov r0, s3
; CHECK-NEXT: vmov.16 q1[3], r0 ; CHECK-NEXT: vmov.16 q1[3], r0
; CHECK-NEXT: vmov.u16 r0, q0[3] ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmovx.f16 s8, s0
; CHECK-NEXT: vmov.16 q1[4], r0 ; CHECK-NEXT: vmov.16 q1[4], r0
; CHECK-NEXT: vmov.u16 r0, q0[1] ; CHECK-NEXT: vmov r0, s8
; CHECK-NEXT: vmov.16 q1[5], r0 ; CHECK-NEXT: vmov.16 q1[5], r0
; CHECK-NEXT: vmov.u16 r0, q0[2] ; CHECK-NEXT: vmov r0, s1
; CHECK-NEXT: vmov.16 q1[6], r0 ; CHECK-NEXT: vmov.16 q1[6], r0
; CHECK-NEXT: vmov.u16 r0, q0[0] ; CHECK-NEXT: vmov r0, s0
; CHECK-NEXT: vmov.16 q1[7], r0 ; CHECK-NEXT: vmov.16 q1[7], r0
; CHECK-NEXT: vmov q0, q1 ; CHECK-NEXT: vmov q0, q1
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 4, i32 5, i32 7, i32 6, i32 3, i32 1, i32 2, i32 0> %out = shufflevector <8 x half> %src, <8 x half> undef, <8 x i32> <i32 4, i32 5, i32 7, i32 6, i32 3, i32 1, i32 2, i32 0>
ret <8 x half> %out ret <8 x half> %out
} }
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entry: entry:
%res = extractelement <4 x float> %a, i32 3 %res = extractelement <4 x float> %a, i32 3
ret float %res ret float %res
} }
define arm_aapcs_vfpcc half @extract_f16_0(<8 x half> %a) { define arm_aapcs_vfpcc half @extract_f16_0(<8 x half> %a) {
; CHECK-LABEL: extract_f16_0: ; CHECK-LABEL: extract_f16_0:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r1, q0[0]
; CHECK-NEXT: vmov s0, r1
; CHECK-NEXT: vstr.16 s0, [r0] ; CHECK-NEXT: vstr.16 s0, [r0]
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%res = extractelement <8 x half> %a, i32 0 %res = extractelement <8 x half> %a, i32 0
ret half %res ret half %res
} }
define arm_aapcs_vfpcc half @extract_f16_3(<8 x half> %a) { define arm_aapcs_vfpcc half @extract_f16_3(<8 x half> %a) {
; CHECK-LABEL: extract_f16_3: ; CHECK-LABEL: extract_f16_3:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vmov.u16 r1, q0[3] ; CHECK-NEXT: vmovx.f16 s0, s1
; CHECK-NEXT: vmov s0, r1
; CHECK-NEXT: vstr.16 s0, [r0] ; CHECK-NEXT: vstr.16 s0, [r0]
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
%res = extractelement <8 x half> %a, i32 3 %res = extractelement <8 x half> %a, i32 3
ret half %res ret half %res
} }
define arm_aapcs_vfpcc double @extract_f64_0(<2 x double> %a) { define arm_aapcs_vfpcc double @extract_f64_0(<2 x double> %a) {
Show All 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-simple-arith.ll

Show First 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
entry: entry:
%0 = fadd nnan ninf nsz <4 x float> %src2, %src1 %0 = fadd nnan ninf nsz <4 x float> %src2, %src1
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @add_float16_t(<8 x half> %src1, <8 x half> %src2) { define arm_aapcs_vfpcc <8 x half> @add_float16_t(<8 x half> %src1, <8 x half> %src2) {
; CHECK-MVE-LABEL: add_float16_t: ; CHECK-MVE-LABEL: add_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vadd.f16 s8, s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s10, s4
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[0]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vadd.f16 s8, s10, s8
; CHECK-MVE-NEXT: vmov s10, r2
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov s8, r1 ; CHECK-MVE-NEXT: vmovx.f16 s8, s0
; CHECK-MVE-NEXT: vadd.f16 s8, s10, s8 ; CHECK-MVE-NEXT: vadd.f16 s8, s10, s8
; CHECK-MVE-NEXT: vadd.f16 s12, s5, s1
; CHECK-MVE-NEXT: vmov r1, s8 ; CHECK-MVE-NEXT: vmov r1, s8
; CHECK-MVE-NEXT: vmov.16 q2[0], r0 ; CHECK-MVE-NEXT: vmov.16 q2[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s12, s1
; CHECK-MVE-NEXT: vmovx.f16 s14, s5
; CHECK-MVE-NEXT: vmov.16 q2[1], r1 ; CHECK-MVE-NEXT: vmov.16 q2[1], r1
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[2], r0 ; CHECK-MVE-NEXT: vmov.16 q2[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vadd.f16 s12, s6, s2
; CHECK-MVE-NEXT: vmov.16 q2[3], r0 ; CHECK-MVE-NEXT: vmov.16 q2[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s12, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s14, s6
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmovx.f16 s2, s7
; CHECK-MVE-NEXT: vadd.f16 s12, s7, s3
; CHECK-MVE-NEXT: vmov.16 q2[5], r0 ; CHECK-MVE-NEXT: vmov.16 q2[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vadd.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s2, r0
; CHECK-MVE-NEXT: vadd.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vadd.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q2[7], r0 ; CHECK-MVE-NEXT: vmov.16 q2[7], r0
; CHECK-MVE-NEXT: vmov q0, q2 ; CHECK-MVE-NEXT: vmov q0, q2
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: add_float16_t: ; CHECK-MVEFP-LABEL: add_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vadd.f16 q0, q1, q0 ; CHECK-MVEFP-NEXT: vadd.f16 q0, q1, q0
▲ Show 20 Lines • Show All 105 Lines • ▼ Show 20 Lines
entry: entry:
%0 = fsub nnan ninf nsz <4 x float> %src2, %src1 %0 = fsub nnan ninf nsz <4 x float> %src2, %src1
ret <4 x float> %0 ret <4 x float> %0
} }
define arm_aapcs_vfpcc <8 x half> @sub_float16_t(<8 x half> %src1, <8 x half> %src2) { define arm_aapcs_vfpcc <8 x half> @sub_float16_t(<8 x half> %src1, <8 x half> %src2) {
; CHECK-MVE-LABEL: sub_float16_t: ; CHECK-MVE-LABEL: sub_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vsub.f16 s8, s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s10, s4
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[0]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vsub.f16 s8, s10, s8
; CHECK-MVE-NEXT: vmov s10, r2
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov s8, r1 ; CHECK-MVE-NEXT: vmovx.f16 s8, s0
; CHECK-MVE-NEXT: vsub.f16 s8, s10, s8 ; CHECK-MVE-NEXT: vsub.f16 s8, s10, s8
; CHECK-MVE-NEXT: vsub.f16 s12, s5, s1
; CHECK-MVE-NEXT: vmov r1, s8 ; CHECK-MVE-NEXT: vmov r1, s8
; CHECK-MVE-NEXT: vmov.16 q2[0], r0 ; CHECK-MVE-NEXT: vmov.16 q2[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s12, s1
; CHECK-MVE-NEXT: vmovx.f16 s14, s5
; CHECK-MVE-NEXT: vmov.16 q2[1], r1 ; CHECK-MVE-NEXT: vmov.16 q2[1], r1
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[2], r0 ; CHECK-MVE-NEXT: vmov.16 q2[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vsub.f16 s12, s6, s2
; CHECK-MVE-NEXT: vmov.16 q2[3], r0 ; CHECK-MVE-NEXT: vmov.16 q2[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s12, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s14, s6
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmovx.f16 s2, s7
; CHECK-MVE-NEXT: vsub.f16 s12, s7, s3
; CHECK-MVE-NEXT: vmov.16 q2[5], r0 ; CHECK-MVE-NEXT: vmov.16 q2[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vsub.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s2, r0
; CHECK-MVE-NEXT: vsub.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vsub.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q2[7], r0 ; CHECK-MVE-NEXT: vmov.16 q2[7], r0
; CHECK-MVE-NEXT: vmov q0, q2 ; CHECK-MVE-NEXT: vmov q0, q2
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: sub_float16_t: ; CHECK-MVEFP-LABEL: sub_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vsub.f16 q0, q1, q0 ; CHECK-MVEFP-NEXT: vsub.f16 q0, q1, q0
▲ Show 20 Lines • Show All 88 Lines • ▼ Show 20 Lines
entry: entry:
%0 = mul nsw <2 x i64> %src1, %src2 %0 = mul nsw <2 x i64> %src1, %src2
ret <2 x i64> %0 ret <2 x i64> %0
} }
define arm_aapcs_vfpcc <8 x half> @mul_float16_t(<8 x half> %src1, <8 x half> %src2) { define arm_aapcs_vfpcc <8 x half> @mul_float16_t(<8 x half> %src1, <8 x half> %src2) {
; CHECK-MVE-LABEL: mul_float16_t: ; CHECK-MVE-LABEL: mul_float16_t:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0] ; CHECK-MVE-NEXT: vmul.f16 s8, s4, s0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s10, s4
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[0]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[1]
; CHECK-MVE-NEXT: vmul.f16 s8, s10, s8
; CHECK-MVE-NEXT: vmov s10, r2
; CHECK-MVE-NEXT: vmov r0, s8 ; CHECK-MVE-NEXT: vmov r0, s8
; CHECK-MVE-NEXT: vmov s8, r1 ; CHECK-MVE-NEXT: vmovx.f16 s8, s0
; CHECK-MVE-NEXT: vmul.f16 s8, s10, s8 ; CHECK-MVE-NEXT: vmul.f16 s8, s10, s8
; CHECK-MVE-NEXT: vmul.f16 s12, s5, s1
; CHECK-MVE-NEXT: vmov r1, s8 ; CHECK-MVE-NEXT: vmov r1, s8
; CHECK-MVE-NEXT: vmov.16 q2[0], r0 ; CHECK-MVE-NEXT: vmov.16 q2[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2] ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s12, s1
; CHECK-MVE-NEXT: vmovx.f16 s14, s5
; CHECK-MVE-NEXT: vmov.16 q2[1], r1 ; CHECK-MVE-NEXT: vmov.16 q2[1], r1
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[2]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[2], r0 ; CHECK-MVE-NEXT: vmov.16 q2[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[3]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmul.f16 s12, s6, s2
; CHECK-MVE-NEXT: vmov.16 q2[3], r0 ; CHECK-MVE-NEXT: vmov.16 q2[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[4]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s12, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s14, s6
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[5]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.16 q2[4], r0
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmovx.f16 s2, s7
; CHECK-MVE-NEXT: vmul.f16 s12, s7, s3
; CHECK-MVE-NEXT: vmov.16 q2[5], r0 ; CHECK-MVE-NEXT: vmov.16 q2[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[6]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmul.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov r0, s12 ; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vmov s2, r0
; CHECK-MVE-NEXT: vmul.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vmul.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q2[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q2[7], r0 ; CHECK-MVE-NEXT: vmov.16 q2[7], r0
; CHECK-MVE-NEXT: vmov q0, q2 ; CHECK-MVE-NEXT: vmov q0, q2
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: mul_float16_t: ; CHECK-MVEFP-LABEL: mul_float16_t:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vmul.f16 q0, q1, q0 ; CHECK-MVEFP-NEXT: vmul.f16 q0, q1, q0
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-vcmpf.ll

Show First 20 Lines • Show All 821 Lines • ▼ Show 20 Lines
define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oeq_v8f16: ; CHECK-MVE-LABEL: vcmp_oeq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmp.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmp.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmp.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, q1
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp oeq <8 x half> %src, %src2 %c = fcmp oeq <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_one_v8f16: ; CHECK-MVE-LABEL: vcmp_one_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: vcmp.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov.16 q4[2], r1 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s2, s6
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4] ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov.16 q4[3], r1 ; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov.16 q4[4], r1 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s3, s7
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6] ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmov.16 q4[5], r1 ; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vmov s2, r2
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_one_v8f16: ; CHECK-MVEFP-LABEL: vcmp_one_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 9 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ogt_v8f16: ; CHECK-MVE-LABEL: vcmp_ogt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ogt <8 x half> %src, %src2 %c = fcmp ogt <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oge_v8f16: ; CHECK-MVE-LABEL: vcmp_oge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r2, #1 ; CHECK-MVE-NEXT: movge r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp oge <8 x half> %src, %src2 %c = fcmp oge <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_olt_v8f16: ; CHECK-MVE-LABEL: vcmp_olt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_olt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp olt <8 x half> %src, %src2 %c = fcmp olt <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ole_v8f16: ; CHECK-MVE-LABEL: vcmp_ole_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r2, #1 ; CHECK-MVE-NEXT: movls r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ole_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ole <8 x half> %src, %src2 %c = fcmp ole <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ueq_v8f16: ; CHECK-MVE-LABEL: vcmp_ueq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: vcmp.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov.16 q4[2], r1 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s2, s6
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4] ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov.16 q4[3], r1 ; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov.16 q4[4], r1 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s3, s7
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6] ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmov.16 q4[5], r1 ; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7]
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vmov s2, r2
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0 ; CHECK-MVEFP-NEXT: vcmp.f16 le, q1, q0
; CHECK-MVEFP-NEXT: vpst ; CHECK-MVEFP-NEXT: vpst
; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q1 ; CHECK-MVEFP-NEXT: vcmpt.f16 le, q0, q1
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ueq <8 x half> %src, %src2 %c = fcmp ueq <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_une_v8f16: ; CHECK-MVE-LABEL: vcmp_une_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmp.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmp.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20 ; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmp.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmp.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmp.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_une_v8f16: ; CHECK-MVEFP-LABEL: vcmp_une_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, q1
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp une <8 x half> %src, %src2 %c = fcmp une <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ugt_v8f16: ; CHECK-MVE-LABEL: vcmp_ugt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r2, #1 ; CHECK-MVE-NEXT: movhi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q1, q0
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ugt <8 x half> %src, %src2 %c = fcmp ugt <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uge_v8f16: ; CHECK-MVE-LABEL: vcmp_uge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r2, #1 ; CHECK-MVE-NEXT: movpl r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q1, q0
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp uge <8 x half> %src, %src2 %c = fcmp uge <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ult_v8f16: ; CHECK-MVE-LABEL: vcmp_ult_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r2, #1 ; CHECK-MVE-NEXT: movlt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ult_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, q1
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ult <8 x half> %src, %src2 %c = fcmp ult <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ule_v8f16: ; CHECK-MVE-LABEL: vcmp_ule_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r2, #1 ; CHECK-MVE-NEXT: movle r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ule_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1 ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, q1
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q2, q3 ; CHECK-MVEFP-NEXT: vpsel q0, q2, q3
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ule <8 x half> %src, %src2 %c = fcmp ule <8 x half> %src, %src2
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ord_v8f16: ; CHECK-MVE-LABEL: vcmp_ord_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r2, #1 ; CHECK-MVE-NEXT: movvc r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ord_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 9 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %src2, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uno_v8f16: ; CHECK-MVE-LABEL: vcmp_uno_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpush {d8, d9, d10, d11}
; CHECK-MVE-NEXT: vmov.u16 r1, q1[1] ; CHECK-MVE-NEXT: vmovx.f16 s16, s4
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vmovx.f16 s18, s0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[1]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vmovx.f16 s16, s8
; CHECK-MVE-NEXT: vmovx.f16 s18, s12
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r3, q0[0]
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: vmov.u16 r3, q2[0]
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s16, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q3[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s18, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s12, s8
; CHECK-MVE-NEXT: vcmpe.f16 s1, s5
; CHECK-MVE-NEXT: vmov r2, s16 ; CHECK-MVE-NEXT: vmov r2, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[0], r2 ; CHECK-MVE-NEXT: vmov.16 q4[0], r2
; CHECK-MVE-NEXT: vmov.u16 r2, q0[2] ; CHECK-MVE-NEXT: vmovx.f16 s22, s1
; CHECK-MVE-NEXT: vmov.16 q4[1], r1 ; CHECK-MVE-NEXT: vmov.16 q4[1], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[2] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[3] ; CHECK-MVE-NEXT: vseleq.f16 s20, s13, s9
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s4, s7
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3] ; CHECK-MVE-NEXT: vmovx.f16 s20, s5
; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[3]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmovx.f16 s22, s13
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[4]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s2, s6
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[4]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[5] ; CHECK-MVE-NEXT: vseleq.f16 s20, s14, s10
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vmovx.f16 s22, s2
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5] ; CHECK-MVE-NEXT: vmovx.f16 s20, s6
; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[5]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20 ; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmov.16 q4[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmovx.f16 s22, s14
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[6]
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20
; CHECK-MVE-NEXT: vmov s22, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s3, s7
; CHECK-MVE-NEXT: vmov r1, s20 ; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[6]
; CHECK-MVE-NEXT: vmov s20, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s22, s20
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q4[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q3[6] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s22, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[7] ; CHECK-MVE-NEXT: vcmpe.f16 s0, s4
; CHECK-MVE-NEXT: vseleq.f16 s20, s22, s20 ; CHECK-MVE-NEXT: vseleq.f16 s20, s15, s11
; CHECK-MVE-NEXT: vmov s2, r2 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: vcmpe.f16 s2, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q3[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s11
; CHECK-MVE-NEXT: vmovx.f16 s2, s15
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s20
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q4[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q4[7], r0 ; CHECK-MVE-NEXT: vmov.16 q4[7], r0
; CHECK-MVE-NEXT: vmov q0, q4 ; CHECK-MVE-NEXT: vmov q0, q4
; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11} ; CHECK-MVE-NEXT: vpop {d8, d9, d10, d11}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uno_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 10 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-vcmpfr.ll

Show First 20 Lines • Show All 871 Lines • ▼ Show 20 Lines
define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oeq_v8f16: ; CHECK-MVE-LABEL: vcmp_oeq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmp.f16 s12, s16 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 11 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_one_v8f16: ; CHECK-MVE-LABEL: vcmp_one_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmp.f16 s12, s16 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vcmp.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5]
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_one_v8f16: ; CHECK-MVEFP-LABEL: vcmp_one_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 15 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ogt_v8f16: ; CHECK-MVE-LABEL: vcmp_ogt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 11 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oge_v8f16: ; CHECK-MVE-LABEL: vcmp_oge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r2, #1 ; CHECK-MVE-NEXT: movge r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 11 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_olt_v8f16: ; CHECK-MVE-LABEL: vcmp_olt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_olt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 12 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ole_v8f16: ; CHECK-MVE-LABEL: vcmp_ole_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r2, #1 ; CHECK-MVE-NEXT: movls r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ole_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 12 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ueq_v8f16: ; CHECK-MVE-LABEL: vcmp_ueq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmp.f16 s12, s16 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vcmp.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5]
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 14 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_une_v8f16: ; CHECK-MVE-LABEL: vcmp_une_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmp.f16 s12, s16 ; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmp.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16 ; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmp.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_une_v8f16: ; CHECK-MVEFP-LABEL: vcmp_une_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 11 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ugt_v8f16: ; CHECK-MVE-LABEL: vcmp_ugt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r2, #1 ; CHECK-MVE-NEXT: movhi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 13 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uge_v8f16: ; CHECK-MVE-LABEL: vcmp_uge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r2, #1 ; CHECK-MVE-NEXT: movpl r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 13 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ult_v8f16: ; CHECK-MVE-LABEL: vcmp_ult_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r2, #1 ; CHECK-MVE-NEXT: movlt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ult_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 12 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ule_v8f16: ; CHECK-MVE-LABEL: vcmp_ule_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r2, #1 ; CHECK-MVE-NEXT: movle r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ule_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 12 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ord_v8f16: ; CHECK-MVE-LABEL: vcmp_ord_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r2, #1 ; CHECK-MVE-NEXT: movvc r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ord_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 15 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, half* %src2p, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uno_v8f16: ; CHECK-MVE-LABEL: vcmp_uno_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9, d10} ; CHECK-MVE-NEXT: .vsave {d8, d9, d10}
; CHECK-MVE-NEXT: vpush {d8, d9, d10} ; CHECK-MVE-NEXT: vpush {d8, d9, d10}
; CHECK-MVE-NEXT: vmov.u16 r2, q0[0]
; CHECK-MVE-NEXT: vldr.16 s16, [r0] ; CHECK-MVE-NEXT: vldr.16 s16, [r0]
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s14, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s16
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vmov r0, s12
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: mov.w r1, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s16
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmovx.f16 s20, s9
; CHECK-MVE-NEXT: vmov.16 q3[1], r0
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[2], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s1
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s5
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmovx.f16 s20, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r0 ; CHECK-MVE-NEXT: vmov.16 q3[3], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s18, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[4], r0 ; CHECK-MVE-NEXT: vmovx.f16 s18, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5]
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2 ; CHECK-MVE-NEXT: vmovx.f16 s18, s6
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s16
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r0, s18 ; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r0 ; CHECK-MVE-NEXT: vmov.16 q3[5], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6] ; CHECK-MVE-NEXT: mov.w r0, #0
; CHECK-MVE-NEXT: vmov s18, r0
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vcmpe.f16 s18, s16
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s20, r2
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vseleq.f16 s18, s20, s18 ; CHECK-MVE-NEXT: vseleq.f16 s18, s11, s7
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s16
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r0, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s2, r0 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov r0, s18
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9, d10} ; CHECK-MVE-NEXT: vpop {d8, d9, d10}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uno_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 16 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-vcmpfz.ll

Show First 20 Lines • Show All 825 Lines • ▼ Show 20 Lines
define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oeq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oeq_v8f16: ; CHECK-MVE-LABEL: vcmp_oeq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0 ; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmp.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0 ; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0 ; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oeq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 eq, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp oeq <8 x half> %src, zeroinitializer %c = fcmp oeq <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_one_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_one_v8f16: ; CHECK-MVE-LABEL: vcmp_one_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0 ; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmp.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_one_v8f16: ; CHECK-MVEFP-LABEL: vcmp_one_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 10 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ogt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ogt_v8f16: ; CHECK-MVE-LABEL: vcmp_ogt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r2, #1 ; CHECK-MVE-NEXT: movgt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r1, #1 ; CHECK-MVE-NEXT: movgt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it gt ; CHECK-MVE-NEXT: it gt
; CHECK-MVE-NEXT: movgt r0, #1 ; CHECK-MVE-NEXT: movgt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ogt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ogt <8 x half> %src, zeroinitializer %c = fcmp ogt <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_oge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_oge_v8f16: ; CHECK-MVE-LABEL: vcmp_oge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r2, #1 ; CHECK-MVE-NEXT: movge r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r1, #1 ; CHECK-MVE-NEXT: movge r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ge ; CHECK-MVE-NEXT: it ge
; CHECK-MVE-NEXT: movge r0, #1 ; CHECK-MVE-NEXT: movge r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_oge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_oge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp oge <8 x half> %src, zeroinitializer %c = fcmp oge <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_olt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_olt_v8f16: ; CHECK-MVE-LABEL: vcmp_olt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r2, #1 ; CHECK-MVE-NEXT: movmi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r1, #1 ; CHECK-MVE-NEXT: movmi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it mi ; CHECK-MVE-NEXT: it mi
; CHECK-MVE-NEXT: movmi r0, #1 ; CHECK-MVE-NEXT: movmi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_olt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_olt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 lt, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 lt, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp olt <8 x half> %src, zeroinitializer %c = fcmp olt <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ole_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ole_v8f16: ; CHECK-MVE-LABEL: vcmp_ole_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r2, #1 ; CHECK-MVE-NEXT: movls r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r1, #1 ; CHECK-MVE-NEXT: movls r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ls ; CHECK-MVE-NEXT: it ls
; CHECK-MVE-NEXT: movls r0, #1 ; CHECK-MVE-NEXT: movls r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ole_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ole_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 le, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 le, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ole <8 x half> %src, zeroinitializer %c = fcmp ole <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ueq_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ueq_v8f16: ; CHECK-MVE-LABEL: vcmp_ueq_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0 ; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r2, #1 ; CHECK-MVE-NEXT: moveq r2, #1
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0 ; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmp.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, #0
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r1, #1 ; CHECK-MVE-NEXT: moveq r1, #1
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it eq ; CHECK-MVE-NEXT: it eq
; CHECK-MVE-NEXT: moveq r0, #1 ; CHECK-MVE-NEXT: moveq r0, #1
; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ueq_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 9 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_une_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_une_v8f16: ; CHECK-MVE-LABEL: vcmp_une_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0 ; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmp.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmp.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0 ; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmp.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0 ; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmp.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmp.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmp.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_une_v8f16: ; CHECK-MVEFP-LABEL: vcmp_une_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 ne, q0, zr
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp une <8 x half> %src, zeroinitializer %c = fcmp une <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ugt_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ugt_v8f16: ; CHECK-MVE-LABEL: vcmp_ugt_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r2, #1 ; CHECK-MVE-NEXT: movhi r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r1, #1 ; CHECK-MVE-NEXT: movhi r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it hi ; CHECK-MVE-NEXT: it hi
; CHECK-MVE-NEXT: movhi r0, #1 ; CHECK-MVE-NEXT: movhi r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ugt_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 le, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 le, q0, zr
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ugt <8 x half> %src, zeroinitializer %c = fcmp ugt <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uge_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uge_v8f16: ; CHECK-MVE-LABEL: vcmp_uge_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r2, #1 ; CHECK-MVE-NEXT: movpl r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r1, #1 ; CHECK-MVE-NEXT: movpl r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it pl ; CHECK-MVE-NEXT: it pl
; CHECK-MVE-NEXT: movpl r0, #1 ; CHECK-MVE-NEXT: movpl r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uge_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uge_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 lt, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 lt, q0, zr
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp uge <8 x half> %src, zeroinitializer %c = fcmp uge <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ult_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ult_v8f16: ; CHECK-MVE-LABEL: vcmp_ult_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r2, #1 ; CHECK-MVE-NEXT: movlt r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r1, #1 ; CHECK-MVE-NEXT: movlt r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it lt ; CHECK-MVE-NEXT: it lt
; CHECK-MVE-NEXT: movlt r0, #1 ; CHECK-MVE-NEXT: movlt r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ult_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ult_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 ge, q0, zr
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ult <8 x half> %src, zeroinitializer %c = fcmp ult <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ule_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ule_v8f16: ; CHECK-MVE-LABEL: vcmp_ule_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, #0
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r2, #1 ; CHECK-MVE-NEXT: movle r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0 ; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r1, #1 ; CHECK-MVE-NEXT: movle r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, #0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it le ; CHECK-MVE-NEXT: it le
; CHECK-MVE-NEXT: movle r0, #1 ; CHECK-MVE-NEXT: movle r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ule_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ule_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, zr ; CHECK-MVEFP-NEXT: vcmp.f16 gt, q0, zr
; CHECK-MVEFP-NEXT: vpnot ; CHECK-MVEFP-NEXT: vpnot
; CHECK-MVEFP-NEXT: vpsel q0, q1, q2 ; CHECK-MVEFP-NEXT: vpsel q0, q1, q2
; CHECK-MVEFP-NEXT: bx lr ; CHECK-MVEFP-NEXT: bx lr
entry: entry:
%c = fcmp ule <8 x half> %src, zeroinitializer %c = fcmp ule <8 x half> %src, zeroinitializer
%s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b %s = select <8 x i1> %c, <8 x half> %a, <8 x half> %b
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_ord_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_ord_v8f16: ; CHECK-MVE-LABEL: vcmp_ord_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s12
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s12
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r2, #1 ; CHECK-MVE-NEXT: movvc r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s2
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s3
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r1, #1 ; CHECK-MVE-NEXT: movvc r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vc ; CHECK-MVE-NEXT: it vc
; CHECK-MVE-NEXT: movvc r0, #1 ; CHECK-MVE-NEXT: movvc r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_ord_v8f16: ; CHECK-MVEFP-LABEL: vcmp_ord_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 10 Linesentry:
ret <8 x half> %s ret <8 x half> %s
} }
define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) { define arm_aapcs_vfpcc <8 x half> @vcmp_uno_v8f16(<8 x half> %src, <8 x half> %a, <8 x half> %b) {
; CHECK-MVE-LABEL: vcmp_uno_v8f16: ; CHECK-MVE-LABEL: vcmp_uno_v8f16:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: .vsave {d8, d9} ; CHECK-MVE-NEXT: .vsave {d8, d9}
; CHECK-MVE-NEXT: vpush {d8, d9} ; CHECK-MVE-NEXT: vpush {d8, d9}
; CHECK-MVE-NEXT: vmov.u16 r1, q0[0] ; CHECK-MVE-NEXT: vmovx.f16 s12, s0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[0]
; CHECK-MVE-NEXT: vmov s12, r1
; CHECK-MVE-NEXT: movs r1, #0 ; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s12 ; CHECK-MVE-NEXT: vcmpe.f16 s12, s12
; CHECK-MVE-NEXT: vmov s12, r2 ; CHECK-MVE-NEXT: vmovx.f16 s12, s4
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[0]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s14, r2 ; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmovx.f16 s14, s8
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q0[1] ; CHECK-MVE-NEXT: mov.w r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12
; CHECK-MVE-NEXT: vmov.u16 r3, q1[1]
; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov s12, r2
; CHECK-MVE-NEXT: movs r2, #0
; CHECK-MVE-NEXT: vcmpe.f16 s12, s12
; CHECK-MVE-NEXT: vmov s12, r3
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r2, #1 ; CHECK-MVE-NEXT: movvs r2, #1
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vmov.u16 r3, q2[1]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r2, #1 ; CHECK-MVE-NEXT: movne r2, #1
; CHECK-MVE-NEXT: vmov s14, r3
; CHECK-MVE-NEXT: cmp r2, #0 ; CHECK-MVE-NEXT: cmp r2, #0
; CHECK-MVE-NEXT: vseleq.f16 s12, s14, s12 ; CHECK-MVE-NEXT: vmov r1, s12
; CHECK-MVE-NEXT: vseleq.f16 s12, s8, s4
; CHECK-MVE-NEXT: vmov r2, s12 ; CHECK-MVE-NEXT: vmov r2, s12
; CHECK-MVE-NEXT: vmov.16 q3[0], r1 ; CHECK-MVE-NEXT: vcmpe.f16 s1, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[2] ; CHECK-MVE-NEXT: vmov.16 q3[0], r2
; CHECK-MVE-NEXT: vmov.16 q3[1], r2
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov.u16 r2, q1[2]
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov.16 q3[1], r1
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmov.u16 r2, q2[2]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s9, s5
; CHECK-MVE-NEXT: vmov.u16 r2, q1[3] ; CHECK-MVE-NEXT: vmovx.f16 s18, s9
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[2], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[3]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[2], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[3]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s5
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[4] ; CHECK-MVE-NEXT: vcmpe.f16 s2, s2
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmovx.f16 s18, s10
; CHECK-MVE-NEXT: vmov.16 q3[3], r1 ; CHECK-MVE-NEXT: vmov.16 q3[3], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[4] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[4]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[5] ; CHECK-MVE-NEXT: vseleq.f16 s16, s10, s6
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vmovx.f16 s0, s3
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vmov.16 q3[4], r1 ; CHECK-MVE-NEXT: vmovx.f16 s16, s2
; CHECK-MVE-NEXT: vmov.u16 r1, q0[5]
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16 ; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2 ; CHECK-MVE-NEXT: vmov.16 q3[4], r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[5]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2 ; CHECK-MVE-NEXT: vmovx.f16 s16, s6
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q1[6] ; CHECK-MVE-NEXT: vcmpe.f16 s3, s3
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmov.16 q3[5], r1 ; CHECK-MVE-NEXT: vmov.16 q3[5], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[6] ; CHECK-MVE-NEXT: mov.w r1, #0
; CHECK-MVE-NEXT: vmov s16, r1
; CHECK-MVE-NEXT: movs r1, #0
; CHECK-MVE-NEXT: vcmpe.f16 s16, s16
; CHECK-MVE-NEXT: vmov s16, r2
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r1, #1 ; CHECK-MVE-NEXT: movvs r1, #1
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vmov.u16 r2, q2[6]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r1, #1 ; CHECK-MVE-NEXT: movne r1, #1
; CHECK-MVE-NEXT: vmov s18, r2
; CHECK-MVE-NEXT: cmp r1, #0 ; CHECK-MVE-NEXT: cmp r1, #0
; CHECK-MVE-NEXT: vseleq.f16 s16, s18, s16 ; CHECK-MVE-NEXT: vseleq.f16 s16, s11, s7
; CHECK-MVE-NEXT: vmov r1, s16 ; CHECK-MVE-NEXT: movs r0, #0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov.u16 r1, q0[7]
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmov.u16 r1, q1[7]
; CHECK-MVE-NEXT: vcmpe.f16 s0, s0
; CHECK-MVE-NEXT: vmov s0, r1
; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr ; CHECK-MVE-NEXT: vmrs APSR_nzcv, fpscr
; CHECK-MVE-NEXT: it vs ; CHECK-MVE-NEXT: it vs
; CHECK-MVE-NEXT: movvs r0, #1 ; CHECK-MVE-NEXT: movvs r0, #1
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov.u16 r1, q2[7]
; CHECK-MVE-NEXT: it ne ; CHECK-MVE-NEXT: it ne
; CHECK-MVE-NEXT: movne r0, #1 ; CHECK-MVE-NEXT: movne r0, #1
; CHECK-MVE-NEXT: vmov s2, r1 ; CHECK-MVE-NEXT: vmovx.f16 s0, s7
; CHECK-MVE-NEXT: vmovx.f16 s2, s11
; CHECK-MVE-NEXT: cmp r0, #0 ; CHECK-MVE-NEXT: cmp r0, #0
; CHECK-MVE-NEXT: vmov r1, s16
; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0 ; CHECK-MVE-NEXT: vseleq.f16 s0, s2, s0
; CHECK-MVE-NEXT: vmov.16 q3[6], r1
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q3[7], r0 ; CHECK-MVE-NEXT: vmov.16 q3[7], r0
; CHECK-MVE-NEXT: vmov q0, q3 ; CHECK-MVE-NEXT: vmov q0, q3
; CHECK-MVE-NEXT: vpop {d8, d9} ; CHECK-MVE-NEXT: vpop {d8, d9}
; CHECK-MVE-NEXT: bx lr ; CHECK-MVE-NEXT: bx lr
; ;
; CHECK-MVEFP-LABEL: vcmp_uno_v8f16: ; CHECK-MVEFP-LABEL: vcmp_uno_v8f16:
; CHECK-MVEFP: @ %bb.0: @ %entry ; CHECK-MVEFP: @ %bb.0: @ %entry
Show All 11 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-vcvt.ll

Show First 20 Lines • Show All 207 Lines • ▼ Show 20 Lines
entry: entry:
%out = uitofp <8 x i16> %src to <8 x half> %out = uitofp <8 x i16> %src to <8 x half>
ret <8 x half> %out ret <8 x half> %out
} }
define arm_aapcs_vfpcc <8 x i16> @foo_int16_half(<8 x half> %src) { define arm_aapcs_vfpcc <8 x i16> @foo_int16_half(<8 x half> %src) {
; CHECK-MVE-LABEL: foo_int16_half: ; CHECK-MVE-LABEL: foo_int16_half:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7] ; CHECK-MVE-NEXT: vmovx.f16 s4, s3
; CHECK-MVE-NEXT: vmov s4, r0 ; CHECK-MVE-NEXT: vmovx.f16 s6, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s10, s1
; CHECK-MVE-NEXT: vmov s6, r0 ; CHECK-MVE-NEXT: vmovx.f16 s14, s0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[1]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov s5, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4 ; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4
; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6 ; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6
; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s8 ; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s3
; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10 ; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10
; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s12 ; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s2
; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s14 ; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s14
; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s5 ; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s1
; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0 ; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q0[0], r0 ; CHECK-MVE-NEXT: vmov.16 q0[0], r0
; CHECK-MVE-NEXT: vmov r0, s14 ; CHECK-MVE-NEXT: vmov r0, s14
; CHECK-MVE-NEXT: vmov.16 q0[1], r0 ; CHECK-MVE-NEXT: vmov.16 q0[1], r0
; CHECK-MVE-NEXT: vmov r0, s5 ; CHECK-MVE-NEXT: vmov r0, s5
; CHECK-MVE-NEXT: vmov.16 q0[2], r0 ; CHECK-MVE-NEXT: vmov.16 q0[2], r0
; CHECK-MVE-NEXT: vmov r0, s10 ; CHECK-MVE-NEXT: vmov r0, s10
Show All 15 Lines
entry: entry:
%out = fptosi <8 x half> %src to <8 x i16> %out = fptosi <8 x half> %src to <8 x i16>
ret <8 x i16> %out ret <8 x i16> %out
} }
define arm_aapcs_vfpcc <8 x i16> @foo_uint16_half(<8 x half> %src) { define arm_aapcs_vfpcc <8 x i16> @foo_uint16_half(<8 x half> %src) {
; CHECK-MVE-LABEL: foo_uint16_half: ; CHECK-MVE-LABEL: foo_uint16_half:
; CHECK-MVE: @ %bb.0: @ %entry ; CHECK-MVE: @ %bb.0: @ %entry
; CHECK-MVE-NEXT: vmov.u16 r0, q0[7] ; CHECK-MVE-NEXT: vmovx.f16 s4, s3
; CHECK-MVE-NEXT: vmov s4, r0 ; CHECK-MVE-NEXT: vmovx.f16 s6, s2
; CHECK-MVE-NEXT: vmov.u16 r0, q0[5] ; CHECK-MVE-NEXT: vmovx.f16 s10, s1
; CHECK-MVE-NEXT: vmov s6, r0 ; CHECK-MVE-NEXT: vmovx.f16 s14, s0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[6]
; CHECK-MVE-NEXT: vmov s8, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[3]
; CHECK-MVE-NEXT: vmov s10, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[4]
; CHECK-MVE-NEXT: vmov s12, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[1]
; CHECK-MVE-NEXT: vmov s14, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[2]
; CHECK-MVE-NEXT: vmov s5, r0
; CHECK-MVE-NEXT: vmov.u16 r0, q0[0]
; CHECK-MVE-NEXT: vmov s0, r0
; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4 ; CHECK-MVE-NEXT: vcvt.s32.f16 s4, s4
; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6 ; CHECK-MVE-NEXT: vcvt.s32.f16 s6, s6
; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s8 ; CHECK-MVE-NEXT: vcvt.s32.f16 s8, s3
; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10 ; CHECK-MVE-NEXT: vcvt.s32.f16 s10, s10
; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s12 ; CHECK-MVE-NEXT: vcvt.s32.f16 s12, s2
; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s14 ; CHECK-MVE-NEXT: vcvt.s32.f16 s14, s14
; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s5 ; CHECK-MVE-NEXT: vcvt.s32.f16 s5, s1
; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0 ; CHECK-MVE-NEXT: vcvt.s32.f16 s0, s0
; CHECK-MVE-NEXT: vmov r0, s0 ; CHECK-MVE-NEXT: vmov r0, s0
; CHECK-MVE-NEXT: vmov.16 q0[0], r0 ; CHECK-MVE-NEXT: vmov.16 q0[0], r0
; CHECK-MVE-NEXT: vmov r0, s14 ; CHECK-MVE-NEXT: vmov r0, s14
; CHECK-MVE-NEXT: vmov.16 q0[1], r0 ; CHECK-MVE-NEXT: vmov.16 q0[1], r0
; CHECK-MVE-NEXT: vmov r0, s5 ; CHECK-MVE-NEXT: vmov r0, s5
; CHECK-MVE-NEXT: vmov.16 q0[2], r0 ; CHECK-MVE-NEXT: vmov.16 q0[2], r0
; CHECK-MVE-NEXT: vmov r0, s10 ; CHECK-MVE-NEXT: vmov r0, s10
▲ Show 20 Lines • Show All 123 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/Thumb2/mve-vfma.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s
define arm_aapcs_vfpcc <4 x float> @fma_v4f32(<4 x float> %dst, <4 x float> %s1, <4 x float> %s2) { define arm_aapcs_vfpcc <4 x float> @fma_v4f32(<4 x float> %dst, <4 x float> %s1, <4 x float> %s2) {
; CHECK-LABEL: fma_v4f32: ; CHECK-LABEL: fma_v4f32:
; CHECK: @ %bb.0: @ %entry ; CHECK: @ %bb.0: @ %entry
; CHECK-NEXT: vfma.f32 q0, q1, q2 ; CHECK-NEXT: vfma.f32 q0, q1, q2
; CHECK-NEXT: bx lr ; CHECK-NEXT: bx lr
entry: entry:
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