ClampScalar G_SHL, G_ASHR and G_LSHR to s32 for MIPS32
Details
Diff Detail
Event Timeline
| lib/CodeGen/GlobalISel/LegalizerHelper.cpp | ||
|---|---|---|
| 2993 | This looks like it was copied incorrectly from the DAG version. Can you commit this part separately? | |
| 3001 | This now differs from the DAG version? | |
| 3014–3016 | As far as I can tell this is ultimately still the same as the DAG version? | |
| 3020 | Shouldn't need a new MachineInstrBuilder | |
| lib/CodeGen/GlobalISel/LegalizerHelper.cpp | ||
|---|---|---|
| 3020 | Oh, I thought this was a MachineIRBuilder. This can still be simplified to just a Register | |
| lib/CodeGen/GlobalISel/LegalizerHelper.cpp | ||
|---|---|---|
| 3001 | Oh, now I see it, didn't look into DAG version, I was guided by the test. | |
| lib/CodeGen/GlobalISel/LegalizerHelper.cpp | ||
|---|---|---|
| 2993 | The whole change in LegalizerHelper.cpp and tests including merge of G_ASHR and G_LSHR into same case? OrLHS for G_ASHR also had typo, it used buildAShr instead of buildShl. | |
| 3001 | MIPS has custom legalize for shifts in SDAG so that is target optimization since shift for Amt and AmtExcess is effectively the same thing since only low 5 bits are considered for shift amount. Will return AmtExcess here. | |
| 3014–3016 | yes | |
This looks like it was copied incorrectly from the DAG version. Can you commit this part separately?