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[ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32
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Authored by samtebbs on Aug 21 2019, 2:57 AM.

Details

Summary

This patch fixes shifts by a 128/256 bit shift amount. It also fixes
codegen for shifts of 32 by delegating to LLVM's default optimisation
instead of emitting a long shift.

Tests that used to generate long shifts of 32 are updated to check for the
more optimised codegen.

Diff Detail

Event Timeline

samtebbs created this revision.Aug 21 2019, 2:57 AM
dmgreen added inline comments.Aug 21 2019, 6:12 AM
llvm/lib/Target/ARM/ARMISelLowering.cpp
5942

You can format these long lines

samtebbs updated this revision to Diff 216396.Aug 21 2019, 7:30 AM
samtebbs marked an inline comment as done.
dmgreen accepted this revision.Aug 22 2019, 1:03 AM

It looks like there's an unrelated change in here, but other than that looks good to me.

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
1381 ↗(On Diff #216396)

This one looks unrelated

This revision is now accepted and ready to land.Aug 22 2019, 1:03 AM
This revision was automatically updated to reflect the committed changes.