[ARM] MVE sext costs

[dmgreen]

Summary

This adds some sext costs for MVE, taken from the approximate length of assembly sequences that we generate.

[ostannard]

llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

346

I think this could do with a comment explaining where the numbers come from. If it's based on the current assembly we generate, are we already generating the optimal sequences, or would these numbers need to change as our code-gen improves?

[dmgreen]

llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

346

I will add a comment, that sounds like a good idea.

These all came from the codegen tests, mostly in Codegen/Thumb2/mve-sext.ll. I believe the normal code is optimal (I'd be interested if anyone knows of a way to do a v4i8->v4i32 in one instruction. From what I understand you have to use 2).
v2i64's cost more, but "high cost" is not a bad idea for them as we don't have a lot of v2i64 instructions. I don't think that over-estimating there is such a bad thing. The sext are linearised, so cost a lot. The zeroextends are VAND with a constant, which can either come from a constant pool or a VMOV (which we don't generate yet, but soon will hopefully)

[dmgreen]

Comment and a few extra tests.

[ostannard]

LGTM

llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp

int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
 
   if (SrcTy.isInteger() && ST->hasNEON()) {
     if (const auto *Entry = ConvertCostTableLookup(NEONIntegerConversionTbl,
                                                    ISD, DstTy.getSimpleVT(),
                                                    SrcTy.getSimpleVT()))
       return Entry->Cost;
   }
 
+  static const TypeConversionCostTblEntry MVEVectorConversionTbl[] = {
+    { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
+    { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
+    { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
+    { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
+    { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i8, 10 },
+    { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i8, 2 },
+    { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
+    { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
+    { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i16, 10 },
+    { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i16, 2 },
+    { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 8 },
+    { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 2 },
+  };
+
+  if (SrcTy.isVector() && ST->hasMVEIntegerOps()) {
+    if (const auto *Entry = ConvertCostTableLookup(MVEVectorConversionTbl,
+                                                   ISD, DstTy.getSimpleVT(),
+                                                   SrcTy.getSimpleVT()))
+      return Entry->Cost * ST->getMVEVectorCostFactor();
+  }
+
   // Scalar integer conversion costs.
   static const TypeConversionCostTblEntry ARMIntegerConversionTbl[] = {
     // i16 -> i64 requires two dependent operations.
     { ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 2 },
 
     // Truncates on i64 are assumed to be free.
     { ISD::TRUNCATE,    MVT::i32, MVT::i64, 0 },
     { ISD::TRUNCATE,    MVT::i16, MVT::i64, 0 },

llvm/test/Analysis/CostModel/ARM/cast.ll

 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r62 = sitofp i32 undef to float
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r63 = uitofp i32 undef to float
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %r64 = sitofp i32 undef to double
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %r65 = uitofp i32 undef to double
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r66 = sitofp i64 undef to float
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r67 = uitofp i64 undef to float
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %r68 = sitofp i64 undef to double
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %r69 = uitofp i64 undef to double
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %r70 = sext <8 x i8> undef to <8 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %r71 = sext <16 x i8> undef to <16 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %r72 = zext <8 x i8> undef to <8 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %r73 = zext <16 x i8> undef to <16 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %rext_0 = sext <8 x i8> undef to <8 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %rext_1 = zext <8 x i8> undef to <8 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %rext_2 = sext <8 x i16> undef to <8 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %rext_3 = zext <8 x i16> undef to <8 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %rext_4 = sext <4 x i16> undef to <4 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %rext_5 = zext <4 x i16> undef to <4 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %r70 = sext <8 x i8> undef to <8 x i32>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %r71 = sext <16 x i8> undef to <16 x i32>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %r72 = zext <8 x i8> undef to <8 x i32>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %r73 = zext <16 x i8> undef to <16 x i32>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 330 for instruction: %rext_0 = sext <8 x i8> undef to <8 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %rext_1 = zext <8 x i8> undef to <8 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 330 for instruction: %rext_2 = sext <8 x i16> undef to <8 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 74 for instruction: %rext_3 = zext <8 x i16> undef to <8 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 82 for instruction: %rext_4 = sext <4 x i16> undef to <4 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 18 for instruction: %rext_5 = zext <4 x i16> undef to <4 x i64>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %r74 = trunc <8 x i32> undef to <8 x i8>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %r75 = trunc <16 x i32> undef to <16 x i8>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r80 = fptrunc double undef to float
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %r81 = fptrunc <2 x double> undef to <2 x float>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 10 for instruction: %r82 = fptrunc <4 x double> undef to <4 x float>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 42 for instruction: %r83 = fptrunc <8 x double> undef to <8 x float>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 85 for instruction: %r84 = fptrunc <16 x double> undef to <16 x float>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r85 = fpext float undef to double

 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %r8 = sext i16 %loadi16 to i64
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r9 = zext i16 %loadi16 to i64
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r10 = sext i32 %loadi32 to i64
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %r11 = zext i32 %loadi32 to i64
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v0 = sext <8 x i8> %loadv8i8 to <8 x i16>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v1 = zext <8 x i8> %loadv8i8 to <8 x i16>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v2 = sext <4 x i8> %loadv4i8 to <4 x i32>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v3 = zext <4 x i8> %loadv4i8 to <4 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v4 = sext <2 x i8> %loadv2i8 to <2 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v5 = zext <2 x i8> %loadv2i8 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v4 = sext <2 x i8> %loadv2i8 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v5 = zext <2 x i8> %loadv2i8 to <2 x i64>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v6 = sext <4 x i16> %loadv4i16 to <4 x i32>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %v7 = zext <4 x i16> %loadv4i16 to <4 x i32>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v8 = sext <2 x i16> %loadv2i16 to <2 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v9 = zext <2 x i16> %loadv2i16 to <2 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v10 = sext <2 x i32> %loadv2i32 to <2 x i64>
-; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %v11 = zext <2 x i32> %loadv2i32 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 20 for instruction: %v8 = sext <2 x i16> %loadv2i16 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v9 = zext <2 x i16> %loadv2i16 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %v10 = sext <2 x i32> %loadv2i32 to <2 x i64>
+; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %v11 = zext <2 x i32> %loadv2i32 to <2 x i64>
 ; CHECK-MVE-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
 ;
 
   %loadi8 = load i8, i8* undef
   %loadi16 = load i16, i16* undef
   %loadi32 = load i32, i32* undef
   %loadv2i8 = load <2 x i8>, <2 x i8>* undef
   %loadv4i8 = load <4 x i8>, <4 x i8>* undef