[MC][AArch64] Restrict use of signed relocation operators on MOV[NZK]

[peter.smith]

Summary

In D64466 we permitted all of the relocation specifiers on any of MOV[NZK]. I think that this was the right thing to do for the unsigned relocation specifiers such as :abs_g*[_nc]:, however some research on how linker's such as ld.bfd and ld.gold handle the signed relocation specifiers makes me think that we should keep the restrictions on the signed specifiers such as :tprel_g*[_nc]:

This change adds back the distinction between movk and movnz, and permits the signed checking relocation specifiers on movz and non-checking on movk. The unsigned relocation specifiers can still be allowed on both. I've added tests for the signed relocation specifiers.

When the result of the operation is positive it doesn't matter whether the
sequence:

movz x0, #:abs_g3:foo
movk x0, #:abs_g2_nc:foo
movk x0, #:abs_g1_nc:foo
movk x0, #:abs_g0_nc:foo

or

movz x0, #:abs_g0_nc:foo
movk x0, #:abs_g1_nc:foo
movk x0, #:abs_g2_nc:foo
movk x0, #:abs_g3:foo

is used as the movz never needs to be transformed into a movn so all the relocations apply correctly on all AArch64 linkers.

When the result of the operation is signed a linker must transform the movz into a movn if the result is negative, and a movn to a movz if the result is positive.
For example:

movz x0, #:prel_g3:foo    // Linker transforms to movn if result negative
movk x0, #:prel_g2_nc:foo
movk x0, #:prel_g1_nc:foo
movk x0, #:prel_g0_nc:foo

The way the ABI is written with the checking forms only permitted on mov[nz] and the non-checking form on movk a linker doesn't need to
disassemble the binary to know that if the result of a checking relocation is negative, it needs to output a movn, and a movz otherwise. The ld.bfd and gold linkers have taken advantage of this and for the signed movw relocations such as R_AARCH64_TLSLE_TPREL_G2 it will write a movz if the result is positive and a movn otherwise, so if this relocation is applied to a movk (which the linker is not expecting) it will overwrite it with the wrong instruction. Similarly if R_AARCH64_TLSLE_TPREL_G0_NC is
applied to a mov[nz] (which the linker is not expecting) it will never change the instruction as it is expecting a movk.

It is true that if a linker disassembles the instruction to find out if it is a mov[zn] or movk and alter its behaviour dependent on the instruction then it doesn't matter whether the checked or non-checked relocation is applied (LLD will do this). However given that the signed case will break on ld.bfd and ld.gold I think we should be conservative in permitting the signed relocation specifiers.

[peter.smith]

I will also need to fix up the LLD test/ELF/aarch64-reloc.s as this is the only place where the signed relocations are used with _nc on mov[nz] and the checked on movk. A simple change that works is:

 .section .R_AARCH64_MOVW_PREL,"ax",@progbits
    movz x1, #:prel_g0:.+1
-   movz x1, #:prel_g0_nc:.-1
-   movk x1, #:prel_g0:.+1
+   movn x1, #:prel_g0:.-1
+   movk x1, #:prel_g0_nc:.+1
    movk x1, #:prel_g0_nc:.-1
    movz x2, #:prel_g1:.+0x20000
-   movz x2, #:prel_g1_nc:.-0x20000
-   movk x2, #:prel_g1:.+0x20000
+   movn x2, #:prel_g1:.-0x20000
+   movk x2, #:prel_g1_nc:.+0x20000
    movk x2, #:prel_g1_nc:.-0x20000
    movz x3, #:prel_g2:.+0x300000000
-   movz x3, #:prel_g2_nc:.-0x300000000
-   movk x3, #:prel_g2:.+0x300000000
+   movn x3, #:prel_g2:.-0x300000000
+   movk x3, #:prel_g2_nc:.+0x300000000
    movk x3, #:prel_g2_nc:.-0x300000000
    movz x3, #:prel_g2:.+0x300000000
    movz x4, #:prel_g3:.+0x4000000000000
    movz x4, #:prel_g3:.-0x4000000000000
-   movk x4, #:prel_g3:.+0x4000000000000
-   movk x4, #:prel_g3:.-0x4000000000000
 
 # CHECK: Disassembly of section .R_AARCH64_MOVW_PREL:
 # CHECK-EMPTY:
@@ -253,5 +251,3 @@ movz1:
 ## 1125899906842624 = 0x4000000000000
 # CHECK-NEXT: 2100d0: 84 00 e0 d2  mov x4, #1125899906842624
 # CHECK-NEXT: 2100d4: 84 ff ff d2  mov x4, #-1125899906842624
-# CHECK-NEXT: 2100d8: 84 00 e0 f2  movk        x4, #4, lsl #48
-# CHECK-NEXT: 2100dc: 84 ff ff f2  movk        x4, #65532, lsl #48

This doesn't test the LLD specific parts that can handle those cases, I can write a YAML test for that separately.

[pcc]

MHO: The assembler is a low enough level component that the user can be presumed to know what they're doing, regardless of linker limitations. So I would prefer not to do this. If we do anything about this, we should document the limitations of the GNU linkers somewhere.

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

965

We produce MOVK with PREL_G3 when the tagged-globals target feature is enabled, so we should allow this combination at least.

[peter.smith]

In D65857#1619366, @pcc wrote:

MHO: The assembler is a low enough level component that the user can be presumed to know what they're doing, regardless of linker limitations. So I would prefer not to do this. If we do anything about this, we should document the limitations of the GNU linkers somewhere.

It is a tricky balance, we don't want to rule out a reasonable use case, but ideally we want to detect problems as soon as possible. I think what I have here may be overly strict as if you happen to know that the result of a signed operation is positive then this can work, or if you happen to know you are linking with LLD.

One possible compromise is some kind of strict mode, something like --strict-movw-relocs that people could enable to restrict the relocations to a GNU compatible subset for those that need it. The command line option could also act as a kind of documentation that is a bit more visible. Any thoughts?

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

965

I hadn't realised that this was actively being used. Are you doing something like:

movz x0, :prel_g0_nc: foo
movk x0, :prel_g1_nc: foo
movk x0, :prel_g2_nc: foo
movk x0, :prel_g3: foo

This will work in BFD and gold if the result is positive as bit 30 is already 1 in a MOVK so orring with 1 won't change it, however if the result is negative then bfd/gold will clear bit 30, which will result in an OPC of 0 1 which is MOV <register> , this will likely result in a silent failure. Similarly as VK_PREL_G* is not present in fixMOVZ it won't get altered to a MOVN so the non-checking g0 won't alter it.

If you are happy with those restrictions, for example the offset from code to data in LD.bfd with the default linker script is always going to be positive, or are willing to only support the feature on LLD, then we should support it. I'm a bit nervous about fixMOVZ though.

[pcc]

In D65857#1620933, @peter.smith wrote:

In D65857#1619366, @pcc wrote:

MHO: The assembler is a low enough level component that the user can be presumed to know what they're doing, regardless of linker limitations. So I would prefer not to do this. If we do anything about this, we should document the limitations of the GNU linkers somewhere.

It is a tricky balance, we don't want to rule out a reasonable use case, but ideally we want to detect problems as soon as possible. I think what I have here may be overly strict as if you happen to know that the result of a signed operation is positive then this can work, or if you happen to know you are linking with LLD.

One possible compromise is some kind of strict mode, something like --strict-movw-relocs that people could enable to restrict the relocations to a GNU compatible subset for those that need it. The command line option could also act as a kind of documentation that is a bit more visible. Any thoughts?

Sure, that would be fine with me.

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

965

What I am doing is (see D65364 for more information):

adrp x0, :pg_hi21_nc:global
movk x0, #:prel_g3:global+4294967296
add x0, x0, :lo12:global

The second instruction is taking the pointer tag (i.e. a TBI pointer tag with bits 56-63 potentially set) from the address of global and combining it into x0. Note that the tagged-globals feature is only activated when passing -fsanitize=hwaddress.

It's possible for this offset to be "negative" in the sense that the pointer tag may be >= 0x80. From reading the ld.bfd source code it does appear that the linker will mangle the instruction in this case. On Android we currently require the use of lld to be able to use HWASAN since we use old versions of the GNU linkers that don't support the PREL relocations and are unlikely to upgrade them, so I think we are safe to use all 8 bits of the tag space. We may need to restrict the tag entropy to 7 bits on other operating systems in order to work around the GNU linker issue.

I'm a bit nervous about fixMOVZ though.

It looks like fixMOVZ is only called for actual MOVZ instructions, unless I'm missing something.
http://llvm-cs.pcc.me.uk/gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc#9526

[peter.smith]

Thanks for getting back to me, I'll look into making a strict mode. I'll also mention the use case you've identified with movk to my colleague from our GCC team, it is a pity that we don't have a R_AARCH64_PREL_G3_NC for the movk as although not ideal, as it is skipping an overflow check, it would permit GNU ld to be extended whilst retaining the property that you don't need to disassemble the binary to know how to evaluate a relocation.

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

965

For the movz case I was worried about:

movz x0, :prel_g0_nc: foo
movk x0, :prel_g1_nc: foo
movk x0, :prel_g2_nc: foo
movk x0, :prel_g3: foo

which wouldn't work on BFD if the offset were always positive and fixMOVZ turned movz into movn, but as you aren't using movz then it doesn't matter.

[pcc]

In D65857#1621377, @peter.smith wrote:

Thanks for getting back to me, I'll look into making a strict mode. I'll also mention the use case you've identified with movk to my colleague from our GCC team, it is a pity that we don't have a R_AARCH64_PREL_G3_NC for the movk as although not ideal, as it is skipping an overflow check, it would permit GNU ld to be extended whilst retaining the property that you don't need to disassemble the binary to know how to evaluate a relocation.

Did you ever get a chance to mention this to the GCC team? I've heard that binutils is still relocating MOVK into an illegal instruction.

[vitalybuka]

FYI @kstoimenov

lib/Target/AArch64/AArch64InstrFormats.td

 class PCRelLabel<int N> : BranchTarget<N> {
   let Name = "PCRelLabel" # N;
 }
 
 def BranchTarget14Operand : BranchTarget<14>;
 def BranchTarget26Operand : BranchTarget<26>;
 def PCRelLabel19Operand   : PCRelLabel<19>;
 
-def MovWSymbolG3AsmOperand : AsmOperandClass {
-  let Name = "MovWSymbolG3";
+def MovZSymbolG3AsmOperand : AsmOperandClass {
+  let Name = "MovZSymbolG3";
   let RenderMethod = "addImmOperands";
 }
 
-def movw_symbol_g3 : Operand<i32> {
-  let ParserMatchClass = MovWSymbolG3AsmOperand;
+def movz_symbol_g3 : Operand<i32> {
+  let ParserMatchClass = MovZSymbolG3AsmOperand;
 }
 
-def MovWSymbolG2AsmOperand : AsmOperandClass {
-  let Name = "MovWSymbolG2";
+def MovZSymbolG2AsmOperand : AsmOperandClass {
+  let Name = "MovZSymbolG2";
   let RenderMethod = "addImmOperands";
 }
 
-def movw_symbol_g2 : Operand<i32> {
-  let ParserMatchClass = MovWSymbolG2AsmOperand;
+def movz_symbol_g2 : Operand<i32> {
+  let ParserMatchClass = MovZSymbolG2AsmOperand;
 }
 
-def MovWSymbolG1AsmOperand : AsmOperandClass {
-  let Name = "MovWSymbolG1";
+def MovZSymbolG1AsmOperand : AsmOperandClass {
+  let Name = "MovZSymbolG1";
   let RenderMethod = "addImmOperands";
 }
 
-def movw_symbol_g1 : Operand<i32> {
-  let ParserMatchClass = MovWSymbolG1AsmOperand;
+def movz_symbol_g1 : Operand<i32> {
+  let ParserMatchClass = MovZSymbolG1AsmOperand;
 }
 
-def MovWSymbolG0AsmOperand : AsmOperandClass {
-  let Name = "MovWSymbolG0";
+def MovZSymbolG0AsmOperand : AsmOperandClass {
+  let Name = "MovZSymbolG0";
   let RenderMethod = "addImmOperands";
 }
 
-def movw_symbol_g0 : Operand<i32> {
-  let ParserMatchClass = MovWSymbolG0AsmOperand;
+def movz_symbol_g0 : Operand<i32> {
+  let ParserMatchClass = MovZSymbolG0AsmOperand;
+}
+
+def MovKSymbolG3AsmOperand : AsmOperandClass {
+  let Name = "MovKSymbolG3";
+  let RenderMethod = "addImmOperands";
+}
+
+def movk_symbol_g3 : Operand<i32> {
+  let ParserMatchClass = MovKSymbolG3AsmOperand;
+}
+
+def MovKSymbolG2AsmOperand : AsmOperandClass {
+  let Name = "MovKSymbolG2";
+  let RenderMethod = "addImmOperands";
+}
+
+def movk_symbol_g2 : Operand<i32> {
+  let ParserMatchClass = MovKSymbolG2AsmOperand;
+}
+
+def MovKSymbolG1AsmOperand : AsmOperandClass {
+  let Name = "MovKSymbolG1";
+  let RenderMethod = "addImmOperands";
+}
+
+def movk_symbol_g1 : Operand<i32> {
+  let ParserMatchClass = MovKSymbolG1AsmOperand;
+}
+
+def MovKSymbolG0AsmOperand : AsmOperandClass {
+  let Name = "MovKSymbolG0";
+  let RenderMethod = "addImmOperands";
+}
+
+def movk_symbol_g0 : Operand<i32> {
+  let ParserMatchClass = MovKSymbolG0AsmOperand;
 }
 
 class fixedpoint_i32<ValueType FloatVT>
   : Operand<FloatVT>,
     ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> {
   let EncoderMethod = "getFixedPointScaleOpValue";
   let DecoderMethod = "DecodeFixedPointScaleImm32";
   let ParserMatchClass = Imm1_32Operand;

lib/Target/AArch64/AArch64InstrInfo.td

 def : InstAlias<"movk $dst, $imm", (MOVKWi GPR32:$dst, i32_imm0_65535:$imm, 0), 0>;
 def : InstAlias<"movk $dst, $imm", (MOVKXi GPR64:$dst, i32_imm0_65535:$imm, 0), 0>;
 def : InstAlias<"movn $dst, $imm", (MOVNWi GPR32:$dst, i32_imm0_65535:$imm, 0)>;
 def : InstAlias<"movn $dst, $imm", (MOVNXi GPR64:$dst, i32_imm0_65535:$imm, 0)>;
 def : InstAlias<"movz $dst, $imm", (MOVZWi GPR32:$dst, i32_imm0_65535:$imm, 0)>;
 def : InstAlias<"movz $dst, $imm", (MOVZXi GPR64:$dst, i32_imm0_65535:$imm, 0)>;
 
 // Next, we have various ELF relocations with the ":XYZ_g0:sym" syntax.
-def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g3:$sym, 48)>;
-def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g2:$sym, 32)>;
-def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g1:$sym, 16)>;
-def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movw_symbol_g0:$sym, 0)>;
-
-def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g3:$sym, 48)>;
-def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g2:$sym, 32)>;
-def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g1:$sym, 16)>;
-def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movw_symbol_g0:$sym, 0)>;
-
-def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g3:$sym, 48), 0>;
-def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g2:$sym, 32), 0>;
-def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g1:$sym, 16), 0>;
-def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movw_symbol_g0:$sym, 0), 0>;
+def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movz_symbol_g3:$sym, 48)>;
+def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movz_symbol_g2:$sym, 32)>;
+def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movz_symbol_g1:$sym, 16)>;
+def : InstAlias<"movz $Rd, $sym", (MOVZXi GPR64:$Rd, movz_symbol_g0:$sym, 0)>;
+
+def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movz_symbol_g3:$sym, 48)>;
+def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movz_symbol_g2:$sym, 32)>;
+def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movz_symbol_g1:$sym, 16)>;
+def : InstAlias<"movn $Rd, $sym", (MOVNXi GPR64:$Rd, movz_symbol_g0:$sym, 0)>;
+
+def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movk_symbol_g3:$sym, 48), 0>;
+def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movk_symbol_g2:$sym, 32), 0>;
+def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movk_symbol_g1:$sym, 16), 0>;
+def : InstAlias<"movk $Rd, $sym", (MOVKXi GPR64:$Rd, movk_symbol_g0:$sym, 0), 0>;
 
-def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movw_symbol_g1:$sym, 16)>;
-def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movw_symbol_g0:$sym, 0)>;
+def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movz_symbol_g1:$sym, 16)>;
+def : InstAlias<"movz $Rd, $sym", (MOVZWi GPR32:$Rd, movz_symbol_g0:$sym, 0)>;
 
-def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movw_symbol_g1:$sym, 16)>;
-def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movw_symbol_g0:$sym, 0)>;
+def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movz_symbol_g1:$sym, 16)>;
+def : InstAlias<"movn $Rd, $sym", (MOVNWi GPR32:$Rd, movz_symbol_g0:$sym, 0)>;
 
-def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movw_symbol_g1:$sym, 16), 0>;
-def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movw_symbol_g0:$sym, 0), 0>;
+def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movk_symbol_g1:$sym, 16), 0>;
+def : InstAlias<"movk $Rd, $sym", (MOVKWi GPR32:$Rd, movk_symbol_g0:$sym, 0), 0>;
 
 // Final group of aliases covers true "mov $Rd, $imm" cases.
 multiclass movw_mov_alias<string basename,Instruction INST, RegisterClass GPR,
                           int width, int shift> {
   def _asmoperand : AsmOperandClass {
     let Name = basename # width # "_lsl" # shift # "MovAlias";
     let PredicateMethod = "is" # basename # "MovAlias<" # width # ", "
                                # shift # ">";

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

isMovWSymbol(ArrayRef<AArch64MCExpr::VariantKind> AllowedModifiers) const {
     for (unsigned i = 0; i != AllowedModifiers.size(); ++i) {
       if (ELFRefKind == AllowedModifiers[i])
         return true;
     }
 
     return false;
   }
 
-  bool isMovWSymbolG3() const {
+  bool isMovZSymbolG3() const {
     return isMovWSymbol({AArch64MCExpr::VK_ABS_G3, AArch64MCExpr::VK_PREL_G3});
   }
 
-  bool isMovWSymbolG2() const {
-    return isMovWSymbol(
-        {AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S,
+  bool isMovZSymbolG2() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_S,
                          AArch64MCExpr::VK_ABS_G2_NC, AArch64MCExpr::VK_PREL_G2,
-         AArch64MCExpr::VK_PREL_G2_NC, AArch64MCExpr::VK_TPREL_G2,
+                         AArch64MCExpr::VK_TPREL_G2,
                          AArch64MCExpr::VK_DTPREL_G2});
   }
 
-  bool isMovWSymbolG1() const {
-    return isMovWSymbol(
-        {AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S,
+  bool isMovZSymbolG1() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_S,
                          AArch64MCExpr::VK_ABS_G1_NC, AArch64MCExpr::VK_PREL_G1,
-         AArch64MCExpr::VK_PREL_G1_NC, AArch64MCExpr::VK_GOTTPREL_G1,
-         AArch64MCExpr::VK_TPREL_G1, AArch64MCExpr::VK_TPREL_G1_NC,
-         AArch64MCExpr::VK_DTPREL_G1, AArch64MCExpr::VK_DTPREL_G1_NC});
+                         AArch64MCExpr::VK_GOTTPREL_G1,
+                         AArch64MCExpr::VK_TPREL_G1,
+                         AArch64MCExpr::VK_DTPREL_G1});
   }
 
-  bool isMovWSymbolG0() const {
-    return isMovWSymbol(
-        {AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S,
+  bool isMovZSymbolG0() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_S,
                          AArch64MCExpr::VK_ABS_G0_NC, AArch64MCExpr::VK_PREL_G0,
+                         AArch64MCExpr::VK_TPREL_G0,
+                         AArch64MCExpr::VK_DTPREL_G0});
+  }
+
+  bool isMovKSymbolG3() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G3});
+  }
+
+  bool isMovKSymbolG2() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G2, AArch64MCExpr::VK_ABS_G2_NC,
+                         AArch64MCExpr::VK_PREL_G2_NC});
+  }
+
+  bool isMovKSymbolG1() const {
+    return isMovWSymbol({AArch64MCExpr::VK_ABS_G1, AArch64MCExpr::VK_ABS_G1_NC,
+                         AArch64MCExpr::VK_PREL_G1_NC,
+                         AArch64MCExpr::VK_TPREL_G1_NC,
+                         AArch64MCExpr::VK_DTPREL_G1_NC});
+  }
+
+  bool isMovKSymbolG0() const {
+    return isMovWSymbol(
+        {AArch64MCExpr::VK_ABS_G0, AArch64MCExpr::VK_ABS_G0_NC,
          AArch64MCExpr::VK_PREL_G0_NC, AArch64MCExpr::VK_GOTTPREL_G0_NC,
-         AArch64MCExpr::VK_TPREL_G0, AArch64MCExpr::VK_TPREL_G0_NC,
-         AArch64MCExpr::VK_DTPREL_G0, AArch64MCExpr::VK_DTPREL_G0_NC});
+         AArch64MCExpr::VK_TPREL_G0_NC, AArch64MCExpr::VK_DTPREL_G0_NC});
   }
 
   template<int RegWidth, int Shift>
   bool isMOVZMovAlias() const {
     if (!isImm()) return false;
 
     const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
     if (!CE) return false;

test/MC/AArch64/basic-a64-diagnostics.s

 // CHECK-ERROR-NEXT:         movz w20, #:abs_g3:sym
 // CHECK-ERROR-NEXT:                   ^
 // CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
 // CHECK-ERROR-NEXT:         movk w21, #:abs_g3:sym
 // CHECK-ERROR-NEXT:                   ^
 
         movk x19, #:abs_g0_s:sym
         movk w23, #:abs_g0_s:sym
-
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:abs_g0_s:sym
+// CHECK-ERROR-NEXT:                   ^
+// CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk w23, #:abs_g0_s:sym
+// CHECK-ERROR-NEXT:                   ^
         movk x19, #:abs_g1_s:sym
         movk w23, #:abs_g1_s:sym
-
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:abs_g1_s:sym
+// CHECK-ERROR-NEXT:                   ^
+// CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk w23, #:abs_g1_s:sym
+// CHECK-ERROR-NEXT:                   ^
         movz w2, #:abs_g2_s:sym
         movn w29, #:abs_g2_s:sym
         movk x19, #:abs_g2_s:sym
         movk w23, #:abs_g2_s:sym
 // CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
 // CHECK-ERROR-NEXT:         movz w2, #:abs_g2_s:sym
-// CHECK-ERROR-NEXT:                    ^
+// CHECK-ERROR-NEXT:                  ^
 // CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
 // CHECK-ERROR-NEXT:         movn w29, #:abs_g2_s:sym
 // CHECK-ERROR-NEXT:                   ^
 // CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:abs_g2_s:sym
+// CHECK-ERROR-NEXT:                   ^
+// CHECK-ERROR-NEXT: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
 // CHECK-ERROR-NEXT:         movk w23, #:abs_g2_s:sym
 // CHECK-ERROR-NEXT:                   ^
 
+        movz x2, #:prel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:prel_g0_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:prel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:prel_g0_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:prel_g0:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:prel_g0:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:prel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:prel_g1_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:prel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:prel_g1_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:prel_g1:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:prel_g1:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:prel_g2_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:prel_g2_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:prel_g2_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:prel_g2_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:prel_g2:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:prel_g2:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movk x19, #:prel_g3:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:prel_g3:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:tprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:tprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:tprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:tprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:tprel_g0:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:tprel_g0:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:tprel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:tprel_g1_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:tprel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:tprel_g1_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:tprel_g1:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:tprel_g1:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movk x19, #:tprel_g2:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:tprel_g2:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:dtprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:dtprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:dtprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:dtprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:dtprel_g0:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:dtprel_g0:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:dtprel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:dtprel_g1_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:dtprel_g1_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:dtprel_g1_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+        movk x19, #:dtprel_g1:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:dtprel_g1:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movk x19, #:dtprel_g2:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:dtprel_g2:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movz x2, #:gottprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movz x2, #:gottprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                  ^
+        movn w29, #:gottprel_g0_nc:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movn w29, #:gottprel_g0_nc:sym
+// CHECK-ERROR-NEXT:                   ^
+
+        movk x19, #:gottprel_g1:sym
+// CHECK-ERROR: error: {{expected relocated symbol or|immediate must be an}} integer in range [0, 65535]
+// CHECK-ERROR-NEXT:         movk x19, #:gottprel_g1:sym
+// CHECK-ERROR-NEXT:                   ^
+
 //------------------------------------------------------------------------------
 // PC-relative addressing
 //------------------------------------------------------------------------------
 
         adr sp, loc             // expects xzr
         adr x0, :got:loc        // bad relocation type
         adr x1, :lo12:loc
         adrp x3, #20            // Immediate unaligned