[RISCV] Implement benchmark::cycleclock::Now for riscv64-linux

[rogfer01]

Summary

We have been cross-compiling LLVM using riscv64-unknown-linux-gnu-gcc and we found that this function has to be implemented for a successful build.

[lebedev.ri]

Thank you for working on this.

This isn't proper solution.
That was recently fixed in https://github.com/google/benchmark/pull/833 by @lenary,
and was cherry-picked to test-suite copy of benchmark in D64237.
Please apply the same diff as in D64237 to llvm/utils/benchmark/ and libcxx/utils/google-benchmark/

[rogfer01]

ChangeLog:

• Cherrypick D64237 to other existing copies of cycleclock.h

[rogfer01]

Thanks a lot for the guidance @lebedev.ri. I wasn't aware of @lenary change and the other copies.

libcxx/utils/google-benchmark/README.LLVM

9 ↗

(On Diff #211323)

I couldn't tell exactly on what version this copy is based, hope this wording is fine.

[lebedev.ri]

LG, thank you!

[lenary]

Looks good. Small nit below, but beyond that all is fine.

libcxx/utils/google-benchmark/README.LLVM

9 ↗

(On Diff #211323)

It seems to be based on https://github.com/google/benchmark/commit/4528c76b718acc9b57956f63069c699ae21edcab - might be worth noting this in the readme. (This commit is between v1.4.1 and v1.5.0).

[rogfer01]

ChangeLog

• State on top of which commit of libcxx's copy we are cherry-picking.

[rogfer01]

Thanks @lenary !

[aurel32]

Disclaimer: I know nothing about LLVM procedures, so please ignore if it is not something acceptable

This commit is one of the only missing to get LLVM 9 building on a RISC-V 64 GNU/Linux system. Therefore would it be possible to backport it to the 9 branch?

[lebedev.ri]

In D65142#1613446, @aurel32 wrote:

Disclaimer: I know nothing about LLVM procedures, so please ignore if it is not something acceptable

This commit is one of the only missing to get LLVM 9 building on a RISC-V 64 GNU/Linux system. Therefore would it be possible to backport it to the 9 branch?

Best to file an issue and put it as a blocker for https://bugs.llvm.org/show_bug.cgi?id=42474

[hans]

In D65142#1613449, @lebedev.ri wrote:

In D65142#1613446, @aurel32 wrote:

Disclaimer: I know nothing about LLVM procedures, so please ignore if it is not something acceptable

This commit is one of the only missing to get LLVM 9 building on a RISC-V 64 GNU/Linux system. Therefore would it be possible to backport it to the 9 branch?

Best to file an issue and put it as a blocker for https://bugs.llvm.org/show_bug.cgi?id=42474

I've merged this as r367810 (llvm) and r367813 (libcxx).

[aurel32]

In D65142#1614319, @hans wrote:

I've merged this as r367810 (llvm) and r367813 (libcxx).

Thanks!

libcxx/trunk/utils/google-benchmark/README.LLVM

 LLVM notes
 ----------
 
 This directory contains the Google Benchmark source code with some unnecessary
 files removed. Note that this directory is under a different license than
 libc++.
+
+Changes:
+* https://github.com/google/benchmark/commit/4abdfbb802d1b514703223f5f852ce4a507d32d2
+  is applied on top of
+  https://github.com/google/benchmark/commit/4528c76b718acc9b57956f63069c699ae21edcab
+  to add RISC-V timer support.

libcxx/trunk/utils/google-benchmark/src/cycleclock.h

#elif defined(__mips__)
   struct timeval tv;
   gettimeofday(&tv, nullptr);
   return static_cast<int64_t>(tv.tv_sec) * 1000000 + tv.tv_usec;
 #elif defined(__s390__)  // Covers both s390 and s390x.
   // Return the CPU clock.
   uint64_t tsc;
   asm("stck %0" : "=Q"(tsc) : : "cc");
   return tsc;
+#elif defined(__riscv) // RISC-V
+  // Use RDCYCLE (and RDCYCLEH on riscv32)
+#if __riscv_xlen == 32
+  uint64_t cycles_low, cycles_hi0, cycles_hi1;
+  asm("rdcycleh %0" : "=r"(cycles_hi0));
+  asm("rdcycle %0" : "=r"(cycles_lo));
+  asm("rdcycleh %0" : "=r"(cycles_hi1));
+  // This matches the PowerPC overflow detection, above
+  cycles_lo &= -static_cast<int64_t>(cycles_hi0 == cycles_hi1);
+  return (cycles_hi1 << 32) | cycles_lo;
+#else
+  uint64_t cycles;
+  asm("rdcycle %0" : "=r"(cycles));
+  return cycles;
+#endif
 #else
 // The soft failover to a generic implementation is automatic only for ARM.
 // For other platforms the developer is expected to make an attempt to create
 // a fast implementation and use generic version if nothing better is available.
 #error You need to define CycleTimer for your OS and CPU
 #endif
 }
 }  // end namespace cycleclock
 }  // end namespace benchmark
 
 #endif  // BENCHMARK_CYCLECLOCK_H_

llvm/trunk/utils/benchmark/README.LLVM

 * https://github.com/google/benchmark/commit/52613079824ac58d06c070aa9fbbb186a5859e2c
   is applied to fix cross compilation with MinGW headers
 * https://github.com/google/benchmark/commit/439d6b1c2a6da5cb6adc4c4dfc555af235722396
   is applied to fix building with MinGW headers for ARM
 * https://github.com/google/benchmark/commit/a9b31c51b1ee7ec7b31438c647123c2cbac5d956
   is applied to disable exceptions in Microsoft STL when exceptions are disabled
 * Disabled CMake get_git_version as it is meaningless for this in-tree build,
   and hardcoded a null version
+* https://github.com/google/benchmark/commit/4abdfbb802d1b514703223f5f852ce4a507d32d2
+  is applied on top of v1.4.1 to add RISC-V timer support.

llvm/trunk/utils/benchmark/src/cycleclock.h

#elif defined(__mips__)
   struct timeval tv;
   gettimeofday(&tv, nullptr);
   return static_cast<int64_t>(tv.tv_sec) * 1000000 + tv.tv_usec;
 #elif defined(__s390__) // Covers both s390 and s390x.
   // Return the CPU clock.
   uint64_t tsc;
   asm("stck %0" : "=Q" (tsc) : : "cc");
   return tsc;
+#elif defined(__riscv) // RISC-V
+  // Use RDCYCLE (and RDCYCLEH on riscv32)
+#if __riscv_xlen == 32
+  uint64_t cycles_low, cycles_hi0, cycles_hi1;
+  asm("rdcycleh %0" : "=r"(cycles_hi0));
+  asm("rdcycle %0" : "=r"(cycles_lo));
+  asm("rdcycleh %0" : "=r"(cycles_hi1));
+  // This matches the PowerPC overflow detection, above
+  cycles_lo &= -static_cast<int64_t>(cycles_hi0 == cycles_hi1);
+  return (cycles_hi1 << 32) | cycles_lo;
+#else
+  uint64_t cycles;
+  asm("rdcycle %0" : "=r"(cycles));
+  return cycles;
+#endif
 #else
 // The soft failover to a generic implementation is automatic only for ARM.
 // For other platforms the developer is expected to make an attempt to create
 // a fast implementation and use generic version if nothing better is available.
 #error You need to define CycleTimer for your OS and CPU
 #endif
 }
 }  // end namespace cycleclock
 }  // end namespace benchmark
 
 #endif  // BENCHMARK_CYCLECLOCK_H_