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Differential D63427

AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer
ClosedPublic

Authored by nhaehnle on Jun 17 2019, 6:07 AM.

Details

Reviewers
arsenm
rampitec
t-tye
Commits
rGae4fcb97dde0: AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer
rL363602: AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer
Summary

The purpose of the padding is to guard against stale code being
fetched into the instruction cache by the lowest level prefetching.
We're generating relocatable ELF here, and so the padding should
arguably be added by the linker. This is in fact what Mesa does.

This also fixes multi-part shaders for Mesa.

Change-Id: I6bfede58f20e9f337762ccf39ef9e0e263e69e82

Diff Detail

Repository
rL LLVM

Event Timeline

nhaehnle created this revision.Jun 17 2019, 6:07 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 17 2019, 6:07 AM
Herald added subscribers: tpr, dstuttard, yaxunl and 3 others. · View Herald Transcript
Harbormaster completed remote builds in B33476: Diff 205057.Jun 17 2019, 6:09 AM
rampitec accepted this revision.Jun 17 2019, 8:52 AM

LGTM

This revision is now accepted and ready to land.Jun 17 2019, 8:52 AM
rampitec added inline comments.Jun 17 2019, 9:05 AM
lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
346 ↗(On Diff #205057)

Just a note, rocm will probably need this as well, although that is not yet known. If we move it into the linker then no.

Closed by commit rL363602: AMDGPU/GFX10: Don't generate s_code_end padding in the asm-printer (authored by nha). · Explain WhyJun 17 2019, 12:25 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
AMDGPU/
8 lines
test/
CodeGen/
AMDGPU/
104 lines

Diff 205149

llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Show First 20 Lines • Show All 303 Lines • ▼ Show 20 Lines if (AMDGPU::isGroupSegment(GV))
return; return;
AsmPrinter::EmitGlobalVariable(GV); AsmPrinter::EmitGlobalVariable(GV);
} }
bool AMDGPUAsmPrinter::doFinalization(Module &M) { bool AMDGPUAsmPrinter::doFinalization(Module &M) {
CallGraphResourceInfo.clear(); CallGraphResourceInfo.clear();
if (AMDGPU::isGFX10(*getGlobalSTI())) { // Pad with s_code_end to help tools and guard against instruction prefetch
// causing stale data in caches. Arguably this should be done by the linker,
// which is why this isn't done for Mesa.
const MCSubtargetInfo &STI = *getGlobalSTI();
if (AMDGPU::isGFX10(STI) &&
(STI.getTargetTriple().getOS() == Triple::AMDHSA ||
STI.getTargetTriple().getOS() == Triple::AMDPAL)) {
OutStreamer->SwitchSection(getObjFileLowering().getTextSection()); OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
getTargetStreamer()->EmitCodeEnd(); getTargetStreamer()->EmitCodeEnd();
} }
return AsmPrinter::doFinalization(M); return AsmPrinter::doFinalization(M);
} }
// Print comments that apply to both callable functions and entry points. // Print comments that apply to both callable functions and entry points.
▲ Show 20 Lines • Show All 878 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/AMDGPU/s_code_end.ll

; RUN: llc -march=amdgcn -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10,GFX10-ASM %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
; RUN: llc -march=amdgcn -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump -arch=amdgcn -mcpu=gfx1010 -disassemble - | FileCheck -check-prefixes=GCN,GCN-OBJ,GFX10,GFX10-OBJ %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump -arch=amdgcn -mcpu=gfx1010 -disassemble - | FileCheck -check-prefixes=GCN,GCN-OBJ,GFX10END,GFX10END-OBJ %s
; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10END,GFX10END-ASM %s
; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -asm-verbose=0 < %s | FileCheck -check-prefixes=GCN,GCN-ASM,GFX10NOEND,GFX10NOEND-ASM %s
; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 -filetype=obj < %s | llvm-objdump -arch=amdgcn -mcpu=gfx1010 -disassemble - | FileCheck -check-prefixes=GCN,GCN-OBJ,GFX10NOEND,GFX10NOEND-OBJ %s
; GCN: a_kernel1: ; GCN: a_kernel1:
; GCN-NEXT: s_endpgm ; GCN: s_endpgm
; GCN-ASM-NEXT: [[END_LABEL1:\.Lfunc_end.*]]: ; GCN-ASM: [[END_LABEL1:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_kernel1, [[END_LABEL1]]-a_kernel1 ; GCN-ASM-NEXT: .size a_kernel1, [[END_LABEL1]]-a_kernel1
; GCN-ASM: .section .AMDGPU.config
; GCN-OBJ-NEXT: s_nop 0 ; GCN-OBJ-NEXT: s_nop 0
define amdgpu_kernel void @a_kernel1() { define amdgpu_kernel void @a_kernel1() {
ret void ret void
} }
; GCN: a_kernel2: ; GCN: a_kernel2:
; GCN-NEXT: s_endpgm ; GCN: s_endpgm
; GCN-ASM-NEXT: [[END_LABEL2:\.Lfunc_end.*]]: ; GCN-ASM: [[END_LABEL2:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_kernel2, [[END_LABEL2]]-a_kernel2 ; GCN-ASM-NEXT: .size a_kernel2, [[END_LABEL2]]-a_kernel2
; GCN-ASM: .section .AMDGPU.config
; GCN-OBJ-NEXT: {{^$}} ; GCN-OBJ: {{^$}}
define amdgpu_kernel void @a_kernel2() { define amdgpu_kernel void @a_kernel2() {
ret void ret void
} }
; GCN-ASM: .text ; GCN-ASM: .globl a_function
; GCN-ASM-NEXT: .globl a_function
; GCN-ASM-NEXT: .p2align 2 ; GCN-ASM-NEXT: .p2align 2
; GCN-ASM-NEXT: .type a_function,@function ; GCN-ASM-NEXT: .type a_function,@function
; GCN-NEXT: a_function: ; GCN-NEXT: a_function:
; GCN: s_setpc_b64 ; GCN: s_setpc_b64
; GCN-ASM-NEXT: [[END_LABEL3:\.Lfunc_end.*]]: ; GCN-ASM-NEXT: [[END_LABEL3:\.Lfunc_end.*]]:
; GCN-ASM-NEXT: .size a_function, [[END_LABEL3]]-a_function ; GCN-ASM-NEXT: .size a_function, [[END_LABEL3]]-a_function
; GFX10-ASM: .p2alignl 6, 3214868480 ; GFX10END-ASM: .p2alignl 6, 3214868480
; GFX10-ASM-NEXT: .fill 32, 4, 3214868480 ; GFX10END-ASM-NEXT: .fill 32, 4, 3214868480
; GFX10NOEND-NOT: .fill
; GFX10-OBJ-NEXT: s_code_end
; GFX10NOEND-OBJ-NOT: s_code_end
; GFX10-OBJ: s_code_end // 000000000140: ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ: s_code_end // 000000000140:
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10-OBJ-NEXT: s_code_end ; GFX10END-OBJ-NEXT: s_code_end
; GFX10END-OBJ-NEXT: s_code_end
; GFX10END-OBJ-NEXT: s_code_end
define void @a_function() { define void @a_function() {
ret void ret void
} }