[llvm-objdump] Use %08 instead of %016 to print leading addresses for 32-bit binaries

[grimar]

LGTM

lld/test/ELF/arm-thunk-multipass-plt.s

needsplt:
         .space (1024 * 1024)
 
         .section .text.06, "ax", %progbits
         .space (1024 * 1024)
 
         .section .text.07, "ax", %progbits
         .space (1024 * 1024)
 // 0x70000c + 8 + 0x60002c = 0xd00040 = preemptible@plt
-// CHECK: 000000000070000c __ARMV5PILongThunk_preemptible:
+// CHECK: 0070000c __ARMV5PILongThunk_preemptible:
 // CHECK-NEXT:   70000c:        0b 00 18 ea     b       #6291500
 
         .section .text.08, "ax", %progbits
         .space (1024 * 1024) - 4
 
         .section .text.10, "ax", %progbits
         .balign 2
         bl preemptible
preemptible2:
 
 
         .section .text.11, "ax", %progbits
         .space (5 * 1024 * 1024)
 
 
 // CHECK-PLT: Disassembly of section .plt:
 // CHECK-PLT-EMPTY:
-// CHECK-PLT-NEXT: 0000000000d00020 $a:
+// CHECK-PLT-NEXT: 00d00020 $a:
 // CHECK-PLT-NEXT:   d00020:    04 e0 2d e5     str     lr, [sp, #-4]!
 // CHECK-PLT-NEXT:   d00024:    00 e6 8f e2     add     lr, pc, #0, #12
 // CHECK-PLT-NEXT:   d00028:    01 ea 8e e2     add     lr, lr, #4096
 // CHECK-PLT-NEXT:   d0002c:    dc ff be e5     ldr     pc, [lr, #4060]!
-// CHECK-PLT: 0000000000d00030 $d:
+// CHECK-PLT: 00d00030 $d:
 // CHECK-PLT-NEXT:   d00030:    d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d00034:    d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d00038:    d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d0003c:    d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-PLT: 0000000000d00040 $a:
+// CHECK-PLT: 00d00040 $a:
 // CHECK-PLT-NEXT:   d00040:    00 c6 8f e2     add     r12, pc, #0, #12
 // CHECK-PLT-NEXT:   d00044:    01 ca 8c e2     add     r12, r12, #4096
 // CHECK-PLT-NEXT:   d00048:    c4 ff bc e5     ldr     pc, [r12, #4036]!
-// CHECK-PLT: 0000000000d0004c $d:
+// CHECK-PLT: 00d0004c $d:
 // CHECK-PLT-NEXT:   d0004c:    d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-PLT: 0000000000d00050 $a:
+// CHECK-PLT: 00d00050 $a:
 // CHECK-PLT-NEXT:   d00050:    00 c6 8f e2     add     r12, pc, #0, #12
 // CHECK-PLT-NEXT:   d00054:    01 ca 8c e2     add     r12, r12, #4096
 // CHECK-PLT-NEXT:   d00058:    b8 ff bc e5     ldr     pc, [r12, #4024]!
-// CHECK-PLT: 0000000000d0005c $d:
+// CHECK-PLT: 00d0005c $d:
 // CHECK-PLT-NEXT:   d0005c:    d4 d4 d4 d4     .word   0xd4d4d4d4

lld/test/ELF/arm-tls-gd32.s

 // SEC: Dynamic Relocations {
 // SEC-NEXT: 0x205C R_ARM_TLS_DTPMOD32 -
 // SEC-NEXT: 0x204C R_ARM_TLS_DTPMOD32 x
 // SEC-NEXT: 0x2050 R_ARM_TLS_DTPOFF32 x
 // SEC-NEXT: 0x2054 R_ARM_TLS_DTPMOD32 y
 // SEC-NEXT: 0x2058 R_ARM_TLS_DTPOFF32 y
 
 
-// CHECK-LABEL: 0000000000001000 func:
+// CHECK-LABEL: 00001000 func:
 // CHECK-NEXT:    1000:      00 f0 20 e3     nop
 // CHECK-NEXT:    1004:      00 f0 20 e3     nop
 // CHECK-NEXT:    1008:      00 f0 20 e3     nop
 
 // (0x204c - 0x100c) + (0x100c - 0x1000 - 8) = 0x1044
 // CHECK:    100c:  44 10 00 00
 // (0x2054 - 0x1010) + (0x1010 - 0x1004 - 8) = 0x1048
 // CHECK-NEXT:    1010: 48 10 00 00
 // (0x205c - 0x1014) + (0x1014 - 0x1008 - 8) = 0x104c
 // CHECK-NEXT:    1014: 4c 10 00 00
 

lld/test/ELF/gnu-ifunc-noplt-i386.s

 // CHECK-NEXT:   Section (5) .rel.plt {
 // CHECK-NEXT:     0x40300C R_386_JUMP_SLOT bar2
 // CHECK-NEXT:     0x403010 R_386_JUMP_SLOT zed2
 // CHECK-NEXT:   }
 
 // Check that ifunc call sites still require relocation
 // DISASM: Disassembly of section .text:
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401000 foo:
+// DISASM-NEXT: 00401000 foo:
 // DISASM-NEXT:   401000:       retl
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401001 bar:
+// DISASM-NEXT: 00401001 bar:
 // DISASM-NEXT:   401001:       retl
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401002 _start:
+// DISASM-NEXT: 00401002 _start:
 // DISASM-NEXT:   401002:       calll -4 <_start+0x1>
 // DISASM-NEXT:   401007:       calll -4 <_start+0x6>
 // DISASM-NEXT:   40100c:       calll 31 <bar2@plt>
 // DISASM-NEXT:   401011:       calll 42 <zed2@plt>
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401020 .plt:
+// DISASM-NEXT: 00401020 .plt:
 // DISASM-NEXT:   401020:       pushl 4206596
 // DISASM-NEXT:   401026:       jmpl  *4206600
 // DISASM-NEXT:   40102c:       nop
 // DISASM-NEXT:   40102d:       nop
 // DISASM-NEXT:   40102e:       nop
 // DISASM-NEXT:   40102f:       nop
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401030 bar2@plt:
+// DISASM-NEXT: 00401030 bar2@plt:
 // DISASM-NEXT:   401030:       jmpl  *4206604
 // DISASM-NEXT:   401036:       pushl $0
 // DISASM-NEXT:   40103b:       jmp -32 <.plt>
 // DISASM-EMPTY:
-// DISASM-NEXT: 0000000000401040 zed2@plt:
+// DISASM-NEXT: 00401040 zed2@plt:
 // DISASM-NEXT:   401040:       jmpl  *4206608
 // DISASM-NEXT:   401046:       pushl $8
 // DISASM-NEXT:   40104b:       jmp -48 <.plt>
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:

lld/test/ELF/ppc32-call-stub-nopic.s

 # CHECK-NEXT:    mtctr 11
 # CHECK-NEXT:    bctr
 # CHECK-EMPTY:
 
 ## In Secure PLT ABI, .plt stores function pointers to first instructions of .glink
 # HEX: 0x10030000 10010040 10010044
 
 ## These instructions are referenced by .plt entries.
-# CHECK: 0000000010010040 .glink:
+# CHECK: 10010040 .glink:
 # CHECK-NEXT: b .+8
 # CHECK-NEXT: b .+4
 
 ## PLTresolve
 ## Operands of lis & lwz: .got+4 = 0x10020070+4 = 65536*4098+116
 ## Operands of addis & addi: -.glink = -0x10010040 = 65536*-4097-48
 # CHECK-NEXT: lis 12, 4098
 # CHECK-NEXT: addis 11, 11, -4097

lld/test/ELF/ppc32-call-stub-pic.s

 ## .got2 may have different addresses in different object files,
 ## so the call stub cannot be shared.
 # CHECK-NEXT:  00008000.got2.plt_pic32.f:
 
 ## In Secure PLT ABI, .plt stores function pointers to first instructions of .glink
 # HEX: 0x0003fff8 00010090 00010094 00010098
 
 ## These instructions are referenced by .plt entries.
-# CHECK: 0000000000010090 .glink:
+# CHECK: 00010090 .glink:
 # CHECK-NEXT: b .+12
 # CHECK-NEXT: b .+8
 # CHECK-NEXT: b .+4
 
 ## PLTresolve
 ## Operand of addi: 0x100a8-.glink = 24
 # CHECK-NEXT: addis 11, 11, 0
 # CHECK-NEXT: mflr 0

llvm/test/MC/COFF/cv-loc-unreachable-2.s

 # RUN: llvm-mc %s -triple=i686-pc-win32 -filetype=obj -o %t.obj
 # RUN: llvm-objdump -d %t.obj | FileCheck %s --check-prefix=ASM
 # RUN: llvm-pdbutil dump -il -symbols %t.obj | FileCheck %s --check-prefix=CODEVIEW
 
 # Based on the other cv-loc-unreachable-2.s, but with other code in the same
 # section afterwards. We had negative label difference assertions when .cv_loc
 # bound tightly to the next instruction.
 
-# ASM:      0000000000000000 _callit:
+# ASM:      00000000 _callit:
 #   begin inline {
 # ASM-NEXT:        0: e8 00 00 00 00                calll   0 <_callit+0x5>
 # ASM-NEXT:        5: 85 c0                         testl   %eax, %eax
 # ASM-NEXT:        7: 75 01                         jne     1 <_callit+0xa>
 #   } end inline
 # ASM-NEXT:        9: c3                            retl
 #   begin inline {
 # ASM-NEXT:        a: 6a 20                         pushl   $32

llvm/test/MC/COFF/cv-loc-unreachable.s

 #     exit(32);
 #   }
 # }
 # void callit() {
 #   do_exit();
 # }
 
 
-# ASM:      0000000000000000 _callit:
+# ASM:      00000000 _callit:
 #   begin inline {
 # ASM-NEXT:        0: e8 00 00 00 00                calll   0 <_callit+0x5>
 # ASM-NEXT:        5: 85 c0                         testl   %eax, %eax
 # ASM-NEXT:        7: 75 01                         jne     1 <_callit+0xa>
 #   } end inline
 # ASM-NEXT:        9: c3                            retl
 #   begin inline {
 # ASM-NEXT:        a: 6a 20                         pushl   $32

llvm/test/tools/llvm-objdump/PowerPC/branch-offset.s

 # RUN: llvm-mc -triple=powerpc64le-unknown-linux -filetype=obj %s -o %t.o
 # RUN: llvm-objdump -d %t.o | FileCheck %s
 
 # RUN: llvm-mc -triple=powerpc64-unknown-linux -filetype=obj %s -o %t.o
 # RUN: llvm-objdump -d %t.o | FileCheck %s
 
 # RUN: llvm-mc -triple=powerpc-unknown-linux -filetype=obj %s -o %t.o
 # RUN: llvm-objdump -d %t.o | FileCheck %s
 
-# CHECK: 0000000000000000 callee_back:
+# CHECK: {{0*}}00000000 callee_back:
 # CHECK: 18: {{.*}} bl .-24
 # CHECK: 20: {{.*}} bl .+16
-# CHECK: 0000000000000030 callee_forward:
+# CHECK: {{0*}}00000030 callee_forward:
 
         .text
         .global caller
         .type caller,@function
         .type callee_forward,@function
         .type callee_back,@function
 
         .p2align 4

llvm/test/tools/llvm-objdump/X86/print-symbol-addr.s

-// RUN: llvm-mc %s -filetype=obj -triple=x86_64-pc-linux -o %t.o
+# RUN: llvm-mc %s -filetype=obj -triple=i386 -o %t.32.o
+# RUN: llvm-mc %s -filetype=obj -triple=x86_64 -o %t.64.o
 
-// Check we print the address of `foo` and `bar`.
-// RUN: llvm-objdump -d %t.o | FileCheck %s
-// CHECK:      0000000000000000 foo:
-// CHECK-NEXT:   0: {{.*}}  nop
-// CHECK-NEXT:   1: {{.*}}  nop
-// CHECK:      0000000000000002 bar:
-// CHECK-NEXT:   2: {{.*}}  nop
+## Check we print the address of `foo` and `bar`.
+# RUN: llvm-objdump -d %t.32.o | FileCheck --check-prefixes=ADDR32,ADDR %s
+# RUN: llvm-objdump -d %t.64.o | FileCheck --check-prefixes=ADDR64,ADDR %s
+# ADDR32:    00000000 foo:
+# ADDR64:    0000000000000000 foo:
+# ADDR-NEXT:   0: {{.*}}  nop
+# ADDR-NEXT:   1: {{.*}}  nop
+# ADDR32:    00000002 bar:
+# ADDR64:    0000000000000002 bar:
+# ADDR-NEXT:   2: {{.*}}  nop
 
-// Check we do not print the addresses with -no-leading-addr.
-// RUN: llvm-objdump -d --no-leading-addr %t.o | FileCheck %s --check-prefix=NOADDR
-// NOADDR:      {{^}}foo:
-// NOADDR-NEXT:   {{.*}} nop
-// NOADDR-NEXT:   {{.*}} nop
-// NOADDR:      {{^}}bar:
-// NOADDR-NEXT:   {{.*}} nop
+## Check we do not print the addresses with --no-leading-addr.
+# RUN: llvm-objdump -d --no-leading-addr %t.32.o | FileCheck %s --check-prefix=NOADDR
+# RUN: llvm-objdump -d --no-leading-addr %t.64.o | FileCheck %s --check-prefix=NOADDR
+# NOADDR:      {{^}}foo:
+# NOADDR-NEXT:   {{.*}} nop
+# NOADDR-NEXT:   {{.*}} nop
+# NOADDR:      {{^}}bar:
+# NOADDR-NEXT:   {{.*}} nop
 
 .text
 .globl  foo
 .type   foo, @function
 foo:
  nop
  nop
 
 bar:
  nop

llvm/tools/llvm-objdump/llvm-objdump.cpp

return (Obj->isELF() &&
           (Obj->getArch() == Triple::aarch64 ||
            Obj->getArch() == Triple::aarch64_be ||
            Obj->getArch() == Triple::arm || Obj->getArch() == Triple::armeb ||
            Obj->getArch() == Triple::thumb ||
            Obj->getArch() == Triple::thumbeb));
 }
 
 static void printRelocation(const RelocationRef &Rel, uint64_t Address,
-                            uint8_t AddrSize) {
-  StringRef Fmt =
-      AddrSize > 4 ? "\t\t%016" PRIx64 ":  " : "\t\t\t%08" PRIx64 ":  ";
+                            bool Is64Bits) {
+  StringRef Fmt = Is64Bits ? "\t\t%016" PRIx64 ":  " : "\t\t\t%08" PRIx64 ":  ";
   SmallString<16> Name;
   SmallString<32> Val;
   Rel.getTypeName(Name);
   error(getRelocationValueString(Rel, Val));
   outs() << format(Fmt.data(), Address) << Name << "\t" << Val << "\n";
 }
 
 class PrettyPrinter {
void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef<uint8_t> Bytes,
 
     // Hexagon's packets require relocations to be inline rather than
     // clustered at the end of the packet.
     std::vector<RelocationRef>::const_iterator RelCur = Rels->begin();
     std::vector<RelocationRef>::const_iterator RelEnd = Rels->end();
     auto PrintReloc = [&]() -> void {
       while ((RelCur != RelEnd) && (RelCur->getOffset() <= Address.Address)) {
         if (RelCur->getOffset() == Address.Address) {
-          printRelocation(*RelCur, Address.Address, 4);
+          printRelocation(*RelCur, Address.Address, false);
           return;
         }
         ++RelCur;
       }
     };
 
     while (!HeadTail.first.empty()) {
       OS << Separator;

 static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
                               MCContext &Ctx, MCDisassembler *DisAsm,
                               const MCInstrAnalysis *MIA, MCInstPrinter *IP,
                               const MCSubtargetInfo *STI, PrettyPrinter &PIP,
                               SourcePrinter &SP, bool InlineRelocs) {
   std::map<SectionRef, std::vector<RelocationRef>> RelocMap;
   if (InlineRelocs)
     RelocMap = getRelocsMap(*Obj);
+  bool Is64Bits = Obj->getBytesInAddress() > 4;
 
   // Create a mapping from virtual address to symbol name.  This is used to
   // pretty print the symbols while disassembling.
   std::map<SectionRef, SectionSymbolsTy> AllSymbols;
   SectionSymbolsTy AbsoluteSymbols;
   const StringRef FileName = Obj->getFileName();
   for (const SymbolRef &Symbol : Obj->symbols()) {
     uint64_t Address = unwrapOrError(Symbol.getAddress(), FileName);
for (unsigned SI = 0, SE = Symbols.size(); SI != SE; ++SI) {
           while (End > Limit &&
             *reinterpret_cast<const support::ulittle32_t*>(&Bytes[End - 4]) == 0)
             End -= 4;
         }
       }
 
       outs() << '\n';
       if (!NoLeadingAddr)
-        outs() << format("%016" PRIx64 " ",
+        outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ",
                          SectionAddr + Start + VMAAdjustment);
 
       StringRef SymbolName = std::get<1>(Symbols[SI]);
       if (Demangle)
         outs() << demangle(SymbolName) << ":\n";
       else
         outs() << SymbolName << ":\n";
 
#endif
             if (RelCur->getSymbol() != Obj->symbol_end()) {
               Expected<section_iterator> SymSI =
                   RelCur->getSymbol()->getSection();
               if (SymSI && *SymSI != Obj->section_end() &&
                   shouldAdjustVA(**SymSI))
                 Offset += AdjustVMA;
             }
 
-            printRelocation(*RelCur, SectionAddr + Offset,
-                            Obj->getBytesInAddress());
+            printRelocation(*RelCur, SectionAddr + Offset, Is64Bits);
             ++RelCur;
           }
         }
 
         Index += Size;
       }
     }
   }