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[PATCH 2/2] [AArch64][AsmParser] error on unexpected SVE predicate type suffix
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Authored by c-rhodes on Jun 6 2019, 1:33 AM.

Details

Summary

This patch fixes a bug in the assembler that permitted a type suffix on
predicate registers when not expected. For instance, the following was
previously valid:

faddv h0, p0.q, z1.h

This bug was present in all SVE instructions containing predicates with
no type suffix and no predication form qualifier, i.e. /z or /m. The
latter instructions are already caught with an appropiate error message
by the assembler, e.g.:

	    .text
    <stdin>:1:13: error: not expecting size suffix
    cmpne p1.s, p0.b/z, z2.s, 0
		^

A similar issue for SVE vector registers was fixed in:

https://reviews.llvm.org/D59636

Diff Detail

Event Timeline

c-rhodes created this revision.Jun 6 2019, 1:33 AM
SjoerdMeijer accepted this revision.Jun 6 2019, 1:46 AM

Looks like a good fix to me.

lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
1085

nit: this can now be on the same line?

This revision is now accepted and ready to land.Jun 6 2019, 1:46 AM
c-rhodes added inline comments.Jun 6 2019, 1:51 AM
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
1085

Good spot, I'll fix before merging. thx!

This revision was automatically updated to reflect the committed changes.