[WebAssembly] Implement tail calls and unify tablegen call classes

[tlively]

Summary

Implements direct and indirect tail calls enabled by the 'tail-call'
feature. Updates existing call tests and adds new tests including
a binary encoding test.

[aheejin]

Nice!

• Does the LLVM guarantee tail calls to be placed in the positions in which they can be really tail calls? Can this property change when we move code around in our backend, so tail calls cannot be executed as tail calls anymore?
• It seems we need to update the Tail call optimization section in the Code Generator doc too.

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

788 ↗

(On Diff #203009)

• Why do we need MVT::Glue?
• Wouldn't it be better we handle this with the normal call instruction generation flow, rather than treating it as a special case?

llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td

26 ↗

(On Diff #203009)

• Do vt and rt have to be separate?
• If they are the same, prefix looks always vt + ., so maybe we don't need prefix anymore?

71 ↗

(On Diff #203009)

Probably not related to this CL, but I wonder maybe we should also merge this into a unified CALL instruction when we have calls that return multiple values.

82 ↗

(On Diff #203009)

• Why is the name return call (or ret_call) and not tail call?
• Are there no tail calls that return values?

82 ↗

(On Diff #203009)

Oh I checked the spec and it says return_call. Nevermind the first thing

llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

102 ↗

(On Diff #203009)

Nit: stray indentations

llvm/test/CodeGen/WebAssembly/tailcall.ll

2 ↗

(On Diff #203009)

It looks like we don't support tail calls in fastisel yet, right?

• Do we have a plan to support tail calls in fast isel too? Then putting TODO somewhere in the fastisel code would be good.
• If FAST version here is the same as non-tail version, do we need to check that explicitly in FileCheck before we have the actual fastisel support? The same for call.ll.

14 ↗

(On Diff #203009)

How is this musttail supported in fastisel, while we have no support yet? Does that fall back to the normal isel?

30 ↗

(On Diff #203009)

Maybe I'm missing something, but can this return_call return a value, while it does not have typed versions?

46 ↗

(On Diff #203009)

Nit: Stray space after return_call_indirect, and double spaces between args. The same for other functions below too.

82 ↗

(On Diff #203009)

How about adding a test for notail too for coverage?

[dschuff]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

651 ↗

(On Diff #203009)

Probably should update this error message (e.g. "tail calls aren't enabled")

[tlively]

• Fix formatting and error message, add documentation and notail tests

[tlively]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

788 ↗

(On Diff #203009)

I initially tried to handle this as part of the existing logic, but kept running into assertion failures in the SelectionDAGBuilder. Eventually I just cargo culted what AArch64 was doing for its tail call lowering (including the MVT::Glue) and everything worked. According to MachineValueType.h Glue "glues nodes together during pre-RA sched" so maybe it's for gluing the call to a subsequent return node? I'm not entirely sure. I'll try playing around with this a bit more to see if I can get rid of the glue.

llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td

26 ↗

(On Diff #203009)

yes, for simd. vt is v16i8, v4i32, etc. but rt is always V128.

prefix is actually rt in lowercase, but there is no tablegen for lowercasing a string :(. We could actually clean a lot of SIMD tablegen code up if we could properly manipulate strings, but I'm not sure that would be a welcome tablegen feature.

71 ↗

(On Diff #203009)

Yes, something like that is going to need to happen. It will probably be rather tricky, given the rigidity of the SelectionDAG type system.

82 ↗

(On Diff #203009)

In wasm, return_call is not just a call that happens to be in a tail position, but actually a return and a call rolled into a single action. So a return_call can be moved by optimizations in any way that a return could be moved.

Since the instruction performs a return, it is impossible for it to produce a value that is consumed in the current context, which is why it is not modeled as returning a value. In Binaryen this is clearer because return_call would have type unreachable.

llvm/test/CodeGen/WebAssembly/tailcall.ll

14 ↗

(On Diff #203009)

Yes, musttail causes fastisel to fall back to normal isel. I tried adding fastisel support for tail call but it didn't work out. Maybe I was missing some glue...

30 ↗

(On Diff #203009)

It returns a value to the caller of the current function but does not return a value to the current function itself.

46 ↗

(On Diff #203009)

The space is not stray, unfortunately. There is a FIXME comment in the instruction printer to remove the leading comma.

I have fixed the double spaces.

[aheejin]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

788 ↗

(On Diff #203009)

I see. It sounds requiring MVT::Glue actually makes sense in that case. But I still wonder why can't we handle this in the existing logic? Aren't the opcode and MVT::Glue only different things from the normal workflow? And don't we need InTyList as well, as in the normal flow?

llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td

82 ↗

(On Diff #203009)

Hmm, I see. Then I think we'd need isReturn = 1 for these instructions.

llvm/test/CodeGen/WebAssembly/tailcall.ll

2 ↗

(On Diff #203009)

ping

14 ↗

(On Diff #203009)

Then how about putting a TODO comment in WebAssemblyFastISel.cpp or somewhere?

[tlively]

• Add TODO in FastISel, add isReturn attribute, integrate into existing logic flow

[tlively]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

788 ↗

(On Diff #203009)

I integrated the IsTailCall path into the existing logic flow. I think this makes the code more complicated, but perhaps it is less surprising now.

llvm/test/CodeGen/WebAssembly/tailcall.ll

2 ↗

(On Diff #203009)

I suppose we should probably support tail calls in FastISel. I started doing that but ran into issues so I gave up. Probably worth another shot in a separate PR. I've added a TODO.

FastISel is not the same as DAG ISel because it lowers optional tail calls to normal calls while DAG ISel lowers them to tail calls. Since there is a difference I thought it worth a test.

[dschuff]

llvm/docs/CodeGenerator.rst

2107 ↗

(On Diff #203470)

Shouldn't we have the same restrictions on PIC code?
Also, while it seems like va_arg and byval should work, if we're going to promise to optimize those too, we should have some tests.

[aheejin]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

790 ↗

(On Diff #203470)

• Sorry, but why should we clear InTys here? I understand that we don't need output types, but should input types different from normal calls?
• InTys.push_back(MVT::Other); is common for both if and else, so we can hoist it (If we don't need to clear InTys)

[tlively]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

790 ↗

(On Diff #203470)

The terminology here is super confusing, but everything named In* refers to values coming back into the current frame once the call finishes, i.e. the return values. return_call has no return values except for the chain and glue, so InTys gets cleared.

We would need to duplicate the condition for the clear and the glue push if we hoisted the other push, so I don't think it's worth it.

[aheejin]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

790 ↗

(On Diff #203470)

Oh I see.... I thought InTys is the input parameters, and that was one of the reasons I suggested merging into the existing workflow. Yeah, the benefits of merging look a bit less clear then. If you think the previous code is more clear I think it's good to revert to it. Sorry for my confusion.

[tlively]

llvm/docs/CodeGenerator.rst

2107 ↗

(On Diff #203470)

I'm not totally clear on the details of our PIC code, but any direct or indirect call could be lowered to a tail call, so I'm not sure why there should be a restriction.

I'll add tests for byval, varargs, etc.

[sbc100]

llvm/docs/CodeGenerator.rst

2107 ↗

(On Diff #203470)

IIRC PIC shouldn't effect direct calls. It effects indirect calls since function addresses aren't statically known.

[tlively]

• Restore previous logic, add tests for strange ABIs and prototype mismatches

[aheejin]

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

795 ↗

(On Diff #203651)

Now we have reverted to the previous logic, we don't need RET_CALL here

llvm/test/CodeGen/WebAssembly/tailcall.ll

120 ↗

(On Diff #203651)

Not sure what this tests..? The function name is mismatched_prototypes but the prototypes here match. And the comment says musttail requires ... but this is not a musttail but a tail. The same for other methods below.

[tlively]

llvm/test/CodeGen/WebAssembly/tailcall.ll

120 ↗

(On Diff #203651)

The prototypes of the caller and callee do not match. Using musttail here would be an LLVM validation error, but we can still test with tail, and similar for the following tests. I'll clarify the comments.

[aheejin]

llvm/test/CodeGen/WebAssembly/tailcall.ll

120 ↗

(On Diff #203651)

Sorry, but don't they match..?
Declaration:

declare i32 @baz(i32, i32, i32)

Call:

tail call i32 @baz(i32 0, i32 42, i32 6)

[tlively]

• Address comments

[aheejin]

LGTM!

llvm/test/CodeGen/WebAssembly/tailcall.ll

120 ↗

(On Diff #203651)

Talked offline and turned out I didn't correctly understand what the comment meant

llvm/trunk/docs/CodeGenerator.rst

 programs can be built by dragonegg.
 
 .. _tail call section:
 
 Tail call optimization
 ----------------------
 
 Tail call optimization, callee reusing the stack of the caller, is currently
-supported on x86/x86-64 and PowerPC. It is performed if:
+supported on x86/x86-64, PowerPC, and WebAssembly. It is performed on x86/x86-64
+and PowerPC if:
 
 * Caller and callee have the calling convention ``fastcc``, ``cc 10`` (GHC
   calling convention) or ``cc 11`` (HiPE calling convention).
 
 * The call is a tail call - in tail position (ret immediately follows call and
   ret uses value of call or is void).
 
 * Option ``-tailcallopt`` is enabled.

 
 * No variable argument lists are used.
 
 * No byval parameters are used.
 
 * On ppc32/64 GOT/PIC only module-local calls (visibility = hidden or protected)
   are supported.
 
+On WebAssembly, tail calls are lowered to ``return_call`` and
+``return_call_indirect`` instructions whenever the 'tail-call' target attribute
+is enabled.
+
 Example:
 
 Call as ``llc -tailcallopt test.ll``.
 
 .. code-block:: llvm
 
   declare fastcc i32 @tailcallee(i32 inreg %a1, i32 inreg %a2, i32 %a3, i32 %a4)
 

llvm/trunk/lib/Target/WebAssembly/WebAssemblyCallIndirectFixup.cpp

FunctionPass *llvm::createWebAssemblyCallIndirectFixup() {
   return new WebAssemblyCallIndirectFixup();
 }
 
 static unsigned getNonPseudoCallIndirectOpcode(const MachineInstr &MI) {
   switch (MI.getOpcode()) {
     using namespace WebAssembly;
   case PCALL_INDIRECT_VOID:
     return CALL_INDIRECT_VOID;
-  case PCALL_INDIRECT_I32:
-    return CALL_INDIRECT_I32;
-  case PCALL_INDIRECT_I64:
-    return CALL_INDIRECT_I64;
-  case PCALL_INDIRECT_F32:
-    return CALL_INDIRECT_F32;
-  case PCALL_INDIRECT_F64:
-    return CALL_INDIRECT_F64;
+  case PCALL_INDIRECT_i32:
+    return CALL_INDIRECT_i32;
+  case PCALL_INDIRECT_i64:
+    return CALL_INDIRECT_i64;
+  case PCALL_INDIRECT_f32:
+    return CALL_INDIRECT_f32;
+  case PCALL_INDIRECT_f64:
+    return CALL_INDIRECT_f64;
   case PCALL_INDIRECT_v16i8:
     return CALL_INDIRECT_v16i8;
   case PCALL_INDIRECT_v8i16:
     return CALL_INDIRECT_v8i16;
   case PCALL_INDIRECT_v4i32:
     return CALL_INDIRECT_v4i32;
   case PCALL_INDIRECT_v2i64:
     return CALL_INDIRECT_v2i64;
   case PCALL_INDIRECT_v4f32:
     return CALL_INDIRECT_v4f32;
   case PCALL_INDIRECT_v2f64:
     return CALL_INDIRECT_v2f64;
+  case PCALL_INDIRECT_ExceptRef:
+    return CALL_INDIRECT_ExceptRef;
+  case PRET_CALL_INDIRECT:
+    return RET_CALL_INDIRECT;
   default:
     return INSTRUCTION_LIST_END;
   }
 }
 
 static bool isPseudoCallIndirect(const MachineInstr &MI) {
   return getNonPseudoCallIndirectOpcode(MI) !=
          WebAssembly::INSTRUCTION_LIST_END;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyFastISel.cpp

bool WebAssemblyFastISel::fastLowerArguments() {
   }
 
   return true;
 }
 
 bool WebAssemblyFastISel::selectCall(const Instruction *I) {
   const auto *Call = cast<CallInst>(I);
 
+  // TODO: Support tail calls in FastISel
   if (Call->isMustTailCall() || Call->isInlineAsm() ||
       Call->getFunctionType()->isVarArg())
     return false;
 
   Function *Func = Call->getCalledFunction();
   if (Func && Func->isIntrinsic())
     return false;
 
if (!Subtarget->hasSIMD128() && Call->getType()->isVectorTy())
       return false;
 
     MVT::SimpleValueType RetTy = getSimpleType(Call->getType());
     switch (RetTy) {
     case MVT::i1:
     case MVT::i8:
     case MVT::i16:
     case MVT::i32:
-      Opc = IsDirect ? WebAssembly::CALL_I32 : WebAssembly::PCALL_INDIRECT_I32;
+      Opc = IsDirect ? WebAssembly::CALL_i32 : WebAssembly::PCALL_INDIRECT_i32;
       ResultReg = createResultReg(&WebAssembly::I32RegClass);
       break;
     case MVT::i64:
-      Opc = IsDirect ? WebAssembly::CALL_I64 : WebAssembly::PCALL_INDIRECT_I64;
+      Opc = IsDirect ? WebAssembly::CALL_i64 : WebAssembly::PCALL_INDIRECT_i64;
       ResultReg = createResultReg(&WebAssembly::I64RegClass);
       break;
     case MVT::f32:
-      Opc = IsDirect ? WebAssembly::CALL_F32 : WebAssembly::PCALL_INDIRECT_F32;
+      Opc = IsDirect ? WebAssembly::CALL_f32 : WebAssembly::PCALL_INDIRECT_f32;
       ResultReg = createResultReg(&WebAssembly::F32RegClass);
       break;
     case MVT::f64:
-      Opc = IsDirect ? WebAssembly::CALL_F64 : WebAssembly::PCALL_INDIRECT_F64;
+      Opc = IsDirect ? WebAssembly::CALL_f64 : WebAssembly::PCALL_INDIRECT_f64;
       ResultReg = createResultReg(&WebAssembly::F64RegClass);
       break;
     case MVT::v16i8:
       Opc = IsDirect ? WebAssembly::CALL_v16i8
                      : WebAssembly::PCALL_INDIRECT_v16i8;
       ResultReg = createResultReg(&WebAssembly::V128RegClass);
       break;
     case MVT::v8i16:
case MVT::v4f32:
       ResultReg = createResultReg(&WebAssembly::V128RegClass);
       break;
     case MVT::v2f64:
       Opc = IsDirect ? WebAssembly::CALL_v2f64
                      : WebAssembly::PCALL_INDIRECT_v2f64;
       ResultReg = createResultReg(&WebAssembly::V128RegClass);
       break;
     case MVT::ExceptRef:
-      Opc = IsDirect ? WebAssembly::CALL_EXCEPT_REF
-                     : WebAssembly::PCALL_INDIRECT_EXCEPT_REF;
+      Opc = IsDirect ? WebAssembly::CALL_ExceptRef
+                     : WebAssembly::PCALL_INDIRECT_ExceptRef;
       ResultReg = createResultReg(&WebAssembly::EXCEPT_REFRegClass);
       break;
     default:
       return false;
     }
   }
 
   SmallVector<unsigned, 8> Args;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyISD.def

 /// This file describes the various WebAssembly ISD node types.
 ///
 //===----------------------------------------------------------------------===//
 
 // NOTE: NO INCLUDE GUARD DESIRED!
 
 HANDLE_NODETYPE(CALL1)
 HANDLE_NODETYPE(CALL0)
+HANDLE_NODETYPE(RET_CALL)
 HANDLE_NODETYPE(RETURN)
 HANDLE_NODETYPE(ARGUMENT)
 // A wrapper node for TargetExternalSymbol, TargetGlobalAddress, and MCSymbol
 HANDLE_NODETYPE(Wrapper)
 // A special wapper used in PIC code for __memory_base/__table_base relcative
 // access.
 HANDLE_NODETYPE(WrapperPIC)
 HANDLE_NODETYPE(BR_IF)

llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

WebAssemblyTargetLowering::LowerCall(CallLoweringInfo &CLI,
   CallingConv::ID CallConv = CLI.CallConv;
   if (!callingConvSupported(CallConv))
     fail(DL, DAG,
          "WebAssembly doesn't support language-specific or target-specific "
          "calling conventions yet");
   if (CLI.IsPatchPoint)
     fail(DL, DAG, "WebAssembly doesn't support patch point yet");
 
-  // WebAssembly doesn't currently support explicit tail calls. If they are
-  // required, fail. Otherwise, just disable them.
+  // Fail if tail calls are required but not enabled
+  if (!Subtarget->hasTailCall()) {
     if ((CallConv == CallingConv::Fast && CLI.IsTailCall &&
          MF.getTarget().Options.GuaranteedTailCallOpt) ||
         (CLI.CS && CLI.CS.isMustTailCall()))
-    fail(DL, DAG, "WebAssembly doesn't support tail call yet");
+      fail(DL, DAG, "WebAssembly 'tail-call' feature not enabled");
     CLI.IsTailCall = false;
+  }
 
   SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
   if (Ins.size() > 1)
     fail(DL, DAG, "WebAssembly doesn't support more than 1 returned value yet");
 
   SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
   SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
   unsigned NumFixedArgs = 0;
if (In.Flags.isInConsecutiveRegs())
       fail(DL, DAG, "WebAssembly hasn't implemented cons regs return values");
     if (In.Flags.isInConsecutiveRegsLast())
       fail(DL, DAG,
            "WebAssembly hasn't implemented cons regs last return values");
     // Ignore In.getOrigAlign() because all our arguments are passed in
     // registers.
     InTys.push_back(In.VT);
   }
+
+  if (CLI.IsTailCall) {
+    // ret_calls do not return values to the current frame
+    SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
+    return DAG.getNode(WebAssemblyISD::RET_CALL, DL, NodeTys, Ops);
+  }
+
   InTys.push_back(MVT::Other);
   SDVTList InTyList = DAG.getVTList(InTys);
   SDValue Res =
       DAG.getNode(Ins.empty() ? WebAssemblyISD::CALL0 : WebAssemblyISD::CALL1,
                   DL, InTyList, Ops);
   if (Ins.empty()) {
     Chain = Res;
   } else {

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrCall.td

 // stack space to allocate or free, which is used for varargs lowering.
 let Uses = [SP32, SP64], Defs = [SP32, SP64], isCodeGenOnly = 1 in {
 defm ADJCALLSTACKDOWN : NRI<(outs), (ins i32imm:$amt, i32imm:$amt2),
                             [(WebAssemblycallseq_start timm:$amt, timm:$amt2)]>;
 defm ADJCALLSTACKUP : NRI<(outs), (ins i32imm:$amt, i32imm:$amt2),
                           [(WebAssemblycallseq_end timm:$amt, timm:$amt2)]>;
 } // Uses = [SP32, SP64], Defs = [SP32, SP64], isCodeGenOnly = 1
 
-multiclass CALL<WebAssemblyRegClass vt, string prefix> {
-  defm CALL_#vt : I<(outs vt:$dst), (ins function32_op:$callee, variable_ops),
-                    (outs), (ins function32_op:$callee),
-                    [(set vt:$dst, (WebAssemblycall1 (i32 imm:$callee)))],
-                    !strconcat(prefix, "call\t$dst, $callee"),
-                    !strconcat(prefix, "call\t$callee"),
-                    0x10>;
-
-  let isCodeGenOnly = 1 in
-  defm PCALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
-                              (outs), (ins I32:$callee),
-                              [(set vt:$dst, (WebAssemblycall1 I32:$callee))],
-                              "PSEUDO CALL INDIRECT\t$callee",
-                              "PSEUDO CALL INDIRECT\t$callee">;
-
-  defm CALL_INDIRECT_#vt : I<(outs vt:$dst),
-                             (ins TypeIndex:$type, i32imm:$flags, variable_ops),
-                             (outs), (ins TypeIndex:$type, i32imm:$flags),
-                             [],
-                             !strconcat(prefix, "call_indirect\t$dst"),
-                             !strconcat(prefix, "call_indirect\t$type"),
-                             0x11>;
-}
-
-multiclass SIMD_CALL<ValueType vt, string prefix> {
-
-  defm CALL_#vt : I<(outs V128:$dst), (ins function32_op:$callee, variable_ops),
-                    (outs), (ins function32_op:$callee),
-                    [(set (vt V128:$dst),
-                      (WebAssemblycall1 (i32 imm:$callee)))],
-                    !strconcat(prefix, "call\t$dst, $callee"),
-                    !strconcat(prefix, "call\t$callee"),
-                    0x10>,
-                  Requires<[HasSIMD128]>;
+multiclass CALL<ValueType vt, WebAssemblyRegClass rt, string prefix,
+                list<Predicate> preds = []> {
+  defm CALL_#vt :
+    I<(outs rt:$dst), (ins function32_op:$callee, variable_ops),
+      [(set (vt rt:$dst), (WebAssemblycall1 (i32 imm:$callee)))],
+    Requires<preds>;
 
   let isCodeGenOnly = 1 in
-  defm PCALL_INDIRECT_#vt : I<(outs V128:$dst),
-                              (ins I32:$callee, variable_ops),
-                              (outs), (ins I32:$callee),
-                              [(set (vt V128:$dst),
-                                    (WebAssemblycall1 I32:$callee))],
-                              "PSEUDO CALL INDIRECT\t$callee",
-                              "PSEUDO CALL INDIRECT\t$callee">,
-                              Requires<[HasSIMD128]>;
+  defm PCALL_INDIRECT_#vt :
+    I<(outs rt:$dst), (ins I32:$callee, variable_ops),
+      [(set (vt rt:$dst), (WebAssemblycall1 I32:$callee))],
+    Requires<preds>;
 
-  defm CALL_INDIRECT_#vt : I<(outs V128:$dst),
-                             (ins TypeIndex:$type, i32imm:$flags, variable_ops),
-                             (outs), (ins TypeIndex:$type, i32imm:$flags),
-                             [],
-                             !strconcat(prefix, "call_indirect\t$dst"),
-                             !strconcat(prefix, "call_indirect\t$type"),
-                             0x11>,
-                             Requires<[HasSIMD128]>;
+  defm CALL_INDIRECT_#vt :
+    I<(outs rt:$dst),
+    Requires<preds>;
 }
 
 let Uses = [SP32, SP64], isCall = 1 in {
-defm "" : CALL<I32, "i32.">;
-defm "" : CALL<I64, "i64.">;
-defm "" : CALL<F32, "f32.">;
-defm "" : CALL<F64, "f64.">;
-defm "" : CALL<EXCEPT_REF, "except_ref.">;
-defm "" : SIMD_CALL<v16i8, "v128.">;
-defm "" : SIMD_CALL<v8i16, "v128.">;
-defm "" : SIMD_CALL<v4i32, "v128.">;
-defm "" : SIMD_CALL<v2i64, "v128.">;
-defm "" : SIMD_CALL<v4f32, "v128.">;
-defm "" : SIMD_CALL<v2f64, "v128.">;
+defm "" : CALL<i32, I32, "i32.">;
+defm "" : CALL<i64, I64, "i64.">;
+defm "" : CALL<f32, F32, "f32.">;
+defm "" : CALL<f64, F64, "f64.">;
+defm "" : CALL<ExceptRef, EXCEPT_REF, "except_ref.", [HasExceptionHandling]>;
+defm "" : CALL<v16i8, V128, "v128.", [HasSIMD128]>;
+defm "" : CALL<v8i16, V128, "v128.", [HasSIMD128]>;
+defm "" : CALL<v4i32, V128, "v128.", [HasSIMD128]>;
+defm "" : CALL<v2i64, V128, "v128.", [HasSIMD128]>;
+defm "" : CALL<v4f32, V128, "v128.", [HasSIMD128]>;
+defm "" : CALL<v2f64, V128, "v128.", [HasSIMD128]>;
 
 let IsCanonical = 1 in {
-defm CALL_VOID : I<(outs), (ins function32_op:$callee, variable_ops),
-                   (outs), (ins function32_op:$callee),
-                   [(WebAssemblycall0 (i32 imm:$callee))],
-                   "call    \t$callee", "call\t$callee", 0x10>;
+defm CALL_VOID :
+  I<(outs), (ins function32_op:$callee, variable_ops),
 
+let isReturn = 1 in
+defm RET_CALL :
+  I<(outs), (ins function32_op:$callee, variable_ops),
+    (outs), (ins function32_op:$callee),
+    [(WebAssemblyretcall (i32 imm:$callee))],
+    "return_call    \t$callee", "return_call\t$callee", 0x12>,
+  Requires<[HasTailCall]>;
+
 let isCodeGenOnly = 1 in
-defm PCALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
-                             (outs), (ins I32:$callee),
-                             [(WebAssemblycall0 I32:$callee)],
-                             "PSEUDO CALL INDIRECT\t$callee",
-                             "PSEUDO CALL INDIRECT\t$callee">;
+defm PCALL_INDIRECT_VOID :
+  I<(outs), (ins I32:$callee, variable_ops),
 
-defm CALL_INDIRECT_VOID : I<(outs),
-                            (ins TypeIndex:$type, i32imm:$flags,
-                              variable_ops),
-                            (outs), (ins TypeIndex:$type, i32imm:$flags),
-                            [],
-                            "call_indirect\t", "call_indirect\t$type",
-                            0x11>;
+defm CALL_INDIRECT_VOID :
+  I<(outs), (ins TypeIndex:$type, i32imm:$flags, variable_ops),
+
+let isReturn = 1 in
+defm RET_CALL_INDIRECT :
+  I<(outs), (ins TypeIndex:$type, i32imm:$flags, variable_ops),
+    (outs), (ins TypeIndex:$type, i32imm:$flags),
+    [],
+    "return_call_indirect\t", "return_call_indirect\t$type",
+    0x13>,
+  Requires<[HasTailCall]>;
+
+let isCodeGenOnly = 1, isReturn = 1 in
+defm PRET_CALL_INDIRECT:
+    I<(outs), (ins I32:$callee, variable_ops),
+      (outs), (ins I32:$callee),
+      [(WebAssemblyretcall I32:$callee)],
+      "PSEUDO RET_CALL INDIRECT\t$callee",
+      "PSEUDO RET_CALL INDIRECT\t$callee">,
+    Requires<[HasTailCall]>;
+
 } // IsCanonical = 1
 } // Uses = [SP32,SP64], isCall = 1
 
 // Patterns for matching a direct call to a global address.
 def : Pat<(i32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_I32 tglobaladdr:$callee)>;
+          (CALL_i32 tglobaladdr:$callee)>;
 def : Pat<(i64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_I64 tglobaladdr:$callee)>;
+          (CALL_i64 tglobaladdr:$callee)>;
 def : Pat<(f32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_F32 tglobaladdr:$callee)>;
+          (CALL_f32 tglobaladdr:$callee)>;
 def : Pat<(f64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_F64 tglobaladdr:$callee)>;
+          (CALL_f64 tglobaladdr:$callee)>;
 def : Pat<(v16i8 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v16i8 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v8i16 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v8i16 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4i32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v4i32 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2i64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v2i64 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4f32 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v4f32 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
           (CALL_v2f64 tglobaladdr:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(ExceptRef
            (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee))),
-          (CALL_EXCEPT_REF tglobaladdr:$callee)>;
+          (CALL_ExceptRef tglobaladdr:$callee)>,
+      Requires<[HasExceptionHandling]>;
 def : Pat<(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee)),
           (CALL_VOID tglobaladdr:$callee)>;
+def : Pat<(WebAssemblyretcall (WebAssemblywrapper tglobaladdr:$callee)),
+          (RET_CALL tglobaladdr:$callee)>, Requires<[HasTailCall]>;
 
 // Patterns for matching a direct call to an external symbol.
 def : Pat<(i32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_I32 texternalsym:$callee)>;
+          (CALL_i32 texternalsym:$callee)>;
 def : Pat<(i64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_I64 texternalsym:$callee)>;
+          (CALL_i64 texternalsym:$callee)>;
 def : Pat<(f32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_F32 texternalsym:$callee)>;
+          (CALL_f32 texternalsym:$callee)>;
 def : Pat<(f64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_F64 texternalsym:$callee)>;
+          (CALL_f64 texternalsym:$callee)>;
 def : Pat<(v16i8 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v16i8 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v8i16 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v8i16 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4i32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v4i32 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2i64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v2i64 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v4f32 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v4f32 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(v2f64 (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
           (CALL_v2f64 texternalsym:$callee)>, Requires<[HasSIMD128]>;
 def : Pat<(ExceptRef
            (WebAssemblycall1 (WebAssemblywrapper texternalsym:$callee))),
-          (CALL_EXCEPT_REF texternalsym:$callee)>;
+          (CALL_ExceptRef texternalsym:$callee)>,
+      Requires<[HasExceptionHandling]>;
 def : Pat<(WebAssemblycall0 (WebAssemblywrapper texternalsym:$callee)),
           (CALL_VOID texternalsym:$callee)>;
+def : Pat<(WebAssemblyretcall (WebAssemblywrapper texternalsym:$callee)),
+          (RET_CALL texternalsym:$callee)>, Requires<[HasTailCall]>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

def WebAssemblycallseq_end :
     SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
            [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
 def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
                               SDT_WebAssemblyCall0,
                               [SDNPHasChain, SDNPVariadic]>;
 def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
                               SDT_WebAssemblyCall1,
                               [SDNPHasChain, SDNPVariadic]>;
+def WebAssemblyretcall : SDNode<"WebAssemblyISD::RET_CALL",
+                                SDT_WebAssemblyCall0,
+                                [SDNPHasChain, SDNPVariadic]>;
 def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE",
                                  SDT_WebAssemblyBrTable,
                                  [SDNPHasChain, SDNPVariadic]>;
 def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
                                  SDT_WebAssemblyArgument>;
 def WebAssemblyreturn   : SDNode<"WebAssemblyISD::RETURN",
                                  SDT_WebAssemblyReturn, [SDNPHasChain]>;
 def WebAssemblywrapper  : SDNode<"WebAssemblyISD::Wrapper",

llvm/trunk/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp

assert(MRI.tracksLiveness() &&
          "MemIntrinsicResults expects liveness tracking");
 
   for (auto &MBB : MF) {
     LLVM_DEBUG(dbgs() << "Basic Block: " << MBB.getName() << '\n');
     for (auto &MI : MBB)
       switch (MI.getOpcode()) {
       default:
         break;
-      case WebAssembly::CALL_I32:
-      case WebAssembly::CALL_I64:
+      case WebAssembly::CALL_i32:
+      case WebAssembly::CALL_i64:
         Changed |= optimizeCall(MBB, MI, MRI, MDT, LIS, TLI, LibInfo);
         break;
       }
   }
 
   return Changed;
 }

llvm/trunk/lib/Target/WebAssembly/WebAssemblyPeephole.cpp

bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
   auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
   bool Changed = false;
 
   for (auto &MBB : MF)
     for (auto &MI : MBB)
       switch (MI.getOpcode()) {
       default:
         break;
-      case WebAssembly::CALL_I32:
-      case WebAssembly::CALL_I64: {
+      case WebAssembly::CALL_i32:
+      case WebAssembly::CALL_i64: {
         MachineOperand &Op1 = MI.getOperand(1);
         if (Op1.isSymbol()) {
           StringRef Name(Op1.getSymbolName());
           if (Name == TLI.getLibcallName(RTLIB::MEMCPY) ||
               Name == TLI.getLibcallName(RTLIB::MEMMOVE) ||
               Name == TLI.getLibcallName(RTLIB::MEMSET)) {
             LibFunc Func;
             if (LibInfo.getLibFunc(Name, Func)) {

llvm/trunk/lib/Target/WebAssembly/WebAssemblyUtilities.cpp

bool WebAssembly::isChild(const MachineInstr &MI,
   return TargetRegisterInfo::isVirtualRegister(Reg) &&
          MFI.isVRegStackified(Reg);
 }
 
 bool WebAssembly::isCallDirect(const MachineInstr &MI) {
   switch (MI.getOpcode()) {
   case WebAssembly::CALL_VOID:
   case WebAssembly::CALL_VOID_S:
-  case WebAssembly::CALL_I32:
-  case WebAssembly::CALL_I32_S:
-  case WebAssembly::CALL_I64:
-  case WebAssembly::CALL_I64_S:
-  case WebAssembly::CALL_F32:
-  case WebAssembly::CALL_F32_S:
-  case WebAssembly::CALL_F64:
-  case WebAssembly::CALL_F64_S:
+  case WebAssembly::CALL_i32:
+  case WebAssembly::CALL_i32_S:
+  case WebAssembly::CALL_i64:
+  case WebAssembly::CALL_i64_S:
+  case WebAssembly::CALL_f32:
+  case WebAssembly::CALL_f32_S:
+  case WebAssembly::CALL_f64:
+  case WebAssembly::CALL_f64_S:
   case WebAssembly::CALL_v16i8:
   case WebAssembly::CALL_v16i8_S:
   case WebAssembly::CALL_v8i16:
   case WebAssembly::CALL_v8i16_S:
   case WebAssembly::CALL_v4i32:
   case WebAssembly::CALL_v4i32_S:
   case WebAssembly::CALL_v2i64:
   case WebAssembly::CALL_v2i64_S:
   case WebAssembly::CALL_v4f32:
   case WebAssembly::CALL_v4f32_S:
   case WebAssembly::CALL_v2f64:
   case WebAssembly::CALL_v2f64_S:
-  case WebAssembly::CALL_EXCEPT_REF:
-  case WebAssembly::CALL_EXCEPT_REF_S:
+  case WebAssembly::CALL_ExceptRef:
+  case WebAssembly::CALL_ExceptRef_S:
+  case WebAssembly::RET_CALL:
+  case WebAssembly::RET_CALL_S:
     return true;
   default:
     return false;
   }
 }
 
 bool WebAssembly::isCallIndirect(const MachineInstr &MI) {
   switch (MI.getOpcode()) {
   case WebAssembly::CALL_INDIRECT_VOID:
   case WebAssembly::CALL_INDIRECT_VOID_S:
-  case WebAssembly::CALL_INDIRECT_I32:
-  case WebAssembly::CALL_INDIRECT_I32_S:
-  case WebAssembly::CALL_INDIRECT_I64:
-  case WebAssembly::CALL_INDIRECT_I64_S:
-  case WebAssembly::CALL_INDIRECT_F32:
-  case WebAssembly::CALL_INDIRECT_F32_S:
-  case WebAssembly::CALL_INDIRECT_F64:
-  case WebAssembly::CALL_INDIRECT_F64_S:
+  case WebAssembly::CALL_INDIRECT_i32:
+  case WebAssembly::CALL_INDIRECT_i32_S:
+  case WebAssembly::CALL_INDIRECT_i64:
+  case WebAssembly::CALL_INDIRECT_i64_S:
+  case WebAssembly::CALL_INDIRECT_f32:
+  case WebAssembly::CALL_INDIRECT_f32_S:
+  case WebAssembly::CALL_INDIRECT_f64:
+  case WebAssembly::CALL_INDIRECT_f64_S:
   case WebAssembly::CALL_INDIRECT_v16i8:
   case WebAssembly::CALL_INDIRECT_v16i8_S:
   case WebAssembly::CALL_INDIRECT_v8i16:
   case WebAssembly::CALL_INDIRECT_v8i16_S:
   case WebAssembly::CALL_INDIRECT_v4i32:
   case WebAssembly::CALL_INDIRECT_v4i32_S:
   case WebAssembly::CALL_INDIRECT_v2i64:
   case WebAssembly::CALL_INDIRECT_v2i64_S:
   case WebAssembly::CALL_INDIRECT_v4f32:
   case WebAssembly::CALL_INDIRECT_v4f32_S:
   case WebAssembly::CALL_INDIRECT_v2f64:
   case WebAssembly::CALL_INDIRECT_v2f64_S:
-  case WebAssembly::CALL_INDIRECT_EXCEPT_REF:
-  case WebAssembly::CALL_INDIRECT_EXCEPT_REF_S:
+  case WebAssembly::CALL_INDIRECT_ExceptRef:
+  case WebAssembly::CALL_INDIRECT_ExceptRef_S:
+  case WebAssembly::RET_CALL_INDIRECT:
+  case WebAssembly::RET_CALL_INDIRECT_S:
     return true;
   default:
     return false;
   }
 }
 
 unsigned WebAssembly::getCalleeOpNo(const MachineInstr &MI) {
   switch (MI.getOpcode()) {
   case WebAssembly::CALL_VOID:
   case WebAssembly::CALL_VOID_S:
   case WebAssembly::CALL_INDIRECT_VOID:
   case WebAssembly::CALL_INDIRECT_VOID_S:
+  case WebAssembly::RET_CALL:
+  case WebAssembly::RET_CALL_S:
+  case WebAssembly::RET_CALL_INDIRECT:
+  case WebAssembly::RET_CALL_INDIRECT_S:
     return 0;
-  case WebAssembly::CALL_I32:
-  case WebAssembly::CALL_I32_S:
-  case WebAssembly::CALL_I64:
-  case WebAssembly::CALL_I64_S:
-  case WebAssembly::CALL_F32:
-  case WebAssembly::CALL_F32_S:
-  case WebAssembly::CALL_F64:
-  case WebAssembly::CALL_F64_S:
+  case WebAssembly::CALL_i32:
+  case WebAssembly::CALL_i32_S:
+  case WebAssembly::CALL_i64:
+  case WebAssembly::CALL_i64_S:
+  case WebAssembly::CALL_f32:
+  case WebAssembly::CALL_f32_S:
+  case WebAssembly::CALL_f64:
+  case WebAssembly::CALL_f64_S:
   case WebAssembly::CALL_v16i8:
   case WebAssembly::CALL_v16i8_S:
   case WebAssembly::CALL_v8i16:
   case WebAssembly::CALL_v8i16_S:
   case WebAssembly::CALL_v4i32:
   case WebAssembly::CALL_v4i32_S:
   case WebAssembly::CALL_v2i64:
   case WebAssembly::CALL_v2i64_S:
   case WebAssembly::CALL_v4f32:
   case WebAssembly::CALL_v4f32_S:
   case WebAssembly::CALL_v2f64:
   case WebAssembly::CALL_v2f64_S:
-  case WebAssembly::CALL_EXCEPT_REF:
-  case WebAssembly::CALL_EXCEPT_REF_S:
-  case WebAssembly::CALL_INDIRECT_I32:
-  case WebAssembly::CALL_INDIRECT_I32_S:
-  case WebAssembly::CALL_INDIRECT_I64:
-  case WebAssembly::CALL_INDIRECT_I64_S:
-  case WebAssembly::CALL_INDIRECT_F32:
-  case WebAssembly::CALL_INDIRECT_F32_S:
-  case WebAssembly::CALL_INDIRECT_F64:
-  case WebAssembly::CALL_INDIRECT_F64_S:
+  case WebAssembly::CALL_ExceptRef:
+  case WebAssembly::CALL_ExceptRef_S:
+  case WebAssembly::CALL_INDIRECT_i32:
+  case WebAssembly::CALL_INDIRECT_i32_S:
+  case WebAssembly::CALL_INDIRECT_i64:
+  case WebAssembly::CALL_INDIRECT_i64_S:
+  case WebAssembly::CALL_INDIRECT_f32:
+  case WebAssembly::CALL_INDIRECT_f32_S:
+  case WebAssembly::CALL_INDIRECT_f64:
+  case WebAssembly::CALL_INDIRECT_f64_S:
   case WebAssembly::CALL_INDIRECT_v16i8:
   case WebAssembly::CALL_INDIRECT_v16i8_S:
   case WebAssembly::CALL_INDIRECT_v8i16:
   case WebAssembly::CALL_INDIRECT_v8i16_S:
   case WebAssembly::CALL_INDIRECT_v4i32:
   case WebAssembly::CALL_INDIRECT_v4i32_S:
   case WebAssembly::CALL_INDIRECT_v2i64:
   case WebAssembly::CALL_INDIRECT_v2i64_S:
   case WebAssembly::CALL_INDIRECT_v4f32:
   case WebAssembly::CALL_INDIRECT_v4f32_S:
   case WebAssembly::CALL_INDIRECT_v2f64:
   case WebAssembly::CALL_INDIRECT_v2f64_S:
-  case WebAssembly::CALL_INDIRECT_EXCEPT_REF:
-  case WebAssembly::CALL_INDIRECT_EXCEPT_REF_S:
+  case WebAssembly::CALL_INDIRECT_ExceptRef:
+  case WebAssembly::CALL_INDIRECT_ExceptRef_S:
     return 1;
   default:
     llvm_unreachable("Not a call instruction");
   }
 }
 
 bool WebAssembly::isMarker(const MachineInstr &MI) {
   switch (MI.getOpcode()) {

llvm/trunk/test/CodeGen/WebAssembly/call.ll

-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128 | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128 | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128 | FileCheck --check-prefixes=CHECK,NO-TAIL,SLOW-NO-TAIL %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128 | FileCheck --check-prefixes=CHECK,NO-TAIL,FAST,FAST-NO-TAIL %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128,+tail-call | FileCheck --check-prefixes=CHECK,TAIL,SLOW-TAIL %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128,+tail-call | FileCheck --check-prefixes=CHECK,TAIL,FAST-TAIL %s
 
 ; Test that basic call operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @i32_nullary()
 declare i32 @i32_unary(i32)

 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_arg_2(i32 (i32, i32)* %callee, i32 %arg, i32 %arg2) {
   call i32 %callee(i32 %arg, i32 %arg2)
   ret void
 }
 
 ; CHECK-LABEL: tail_call_void_nullary:
 ; CHECK-NEXT: .functype tail_call_void_nullary () -> (){{$}}
-; CHECK-NEXT: {{^}} call void_nullary{{$}}
-; CHECK-NEXT: return{{$}}
+; NO-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; NO-TAIL-NEXT: return{{$}}
+; SLOW-TAIL-NEXT: {{^}} return_call void_nullary{{$}}
+; FAST-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; FAST-TAIL-NEXT: return{{$}}
 define void @tail_call_void_nullary() {
   tail call void @void_nullary()
   ret void
 }
 
 ; CHECK-LABEL: fastcc_tail_call_void_nullary:
 ; CHECK-NEXT: .functype fastcc_tail_call_void_nullary () -> (){{$}}
-; CHECK-NEXT: {{^}} call void_nullary{{$}}
-; CHECK-NEXT: return{{$}}
+; NO-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; NO-TAIL-NEXT: return{{$}}
+; SLOW-TAIL-NEXT: {{^}} return_call void_nullary{{$}}
+; FAST-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; FAST-TAIL-NEXT: return{{$}}
 define void @fastcc_tail_call_void_nullary() {
   tail call fastcc void @void_nullary()
   ret void
 }
 
 ; CHECK-LABEL: coldcc_tail_call_void_nullary:
 ; CHECK-NEXT: .functype coldcc_tail_call_void_nullary () -> (){{$}}
-; CHECK-NEXT: {{^}} call void_nullary{{$}}
-; CHECK-NEXT: return{{$}}
+; NO-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; NO-TAIL-NEXT: return{{$}}
+; SLOW-TAIL-NEXT: {{^}} return_call void_nullary{{$}}
+; FAST-TAIL-NEXT: {{^}} call void_nullary{{$}}
+; FAST-TAIL-NEXT: return{{$}}
 define void @coldcc_tail_call_void_nullary() {
   tail call coldcc void @void_nullary()
   ret void
 }
 
 ; CHECK-LABEL: call_constexpr:
 ; CHECK-NEXT: .functype call_constexpr () -> (){{$}}
 ; CHECK-NEXT: i32.const $push[[L0:[0-9]+]]=, 2{{$}}

llvm/trunk/test/CodeGen/WebAssembly/tailcall.ll

-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+tail-call | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
 
 ; Test that the tail-call attribute is accepted
-; TODO(tlively): implement tail call
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
+%fn = type <{i32 (%fn, i32, i32)*}>
+declare i1 @foo(i1)
+declare i1 @bar(i1)
+
+; CHECK-LABEL: recursive_notail_nullary:
+; CHECK: {{^}} call recursive_notail_nullary{{$}}
+; CHECK-NEXT: return
+define void @recursive_notail_nullary() {
+  notail call void @recursive_notail_nullary()
+  ret void
+}
+
+; CHECK-LABEL: recursive_musttail_nullary:
+; CHECK: return_call recursive_musttail_nullary{{$}}
+define void @recursive_musttail_nullary() {
+  musttail call void @recursive_musttail_nullary()
+  ret void
+}
+
+; CHECK-LABEL: recursive_tail_nullary:
+; SLOW: return_call recursive_tail_nullary{{$}}
+; FAST: {{^}} call recursive_tail_nullary{{$}}
+; FAST-NEXT: return{{$}}
+define void @recursive_tail_nullary() {
+  tail call void @recursive_tail_nullary()
+  ret void
+}
+
+; CHECK-LABEL: recursive_notail:
+; CHECK: i32.call $push[[L:[0-9]+]]=, recursive_notail, $0, $1{{$}}
+; CHECK-NEXT: return $pop[[L]]{{$}}
+define i32 @recursive_notail(i32 %x, i32 %y) {
+  %v = notail call i32 @recursive_notail(i32 %x, i32 %y)
+  ret i32 %v
+}
+
+; CHECK-LABEL: recursive_musttail:
+; CHECK: return_call recursive_musttail, $0, $1{{$}}
+define i32 @recursive_musttail(i32 %x, i32 %y) {
+  %v = musttail call i32 @recursive_musttail(i32 %x, i32 %y)
+  ret i32 %v
+}
+
 ; CHECK-LABEL: recursive_tail:
-; CHECK:      i32.call $push[[L0:[0-9]+]]=, recursive_tail{{$}}
-; CHECK-NEXT: return $pop[[L0]]{{$}}
-define i32 @recursive_tail() {
-  %v = tail call i32 @recursive_tail()
+; SLOW: return_call recursive_tail, $0, $1{{$}}
+; FAST: i32.call $push[[L:[0-9]+]]=, recursive_tail, $0, $1{{$}}
+; FAST-NEXT: return $pop[[L]]{{$}}
+define i32 @recursive_tail(i32 %x, i32 %y) {
+  %v = tail call i32 @recursive_tail(i32 %x, i32 %y)
+  ret i32 %v
+}
+
+; CHECK-LABEL: indirect_notail:
+; CHECK: i32.call_indirect $push[[L:[0-9]+]]=, $0, $1, $2, $0{{$}}
+; CHECK-NEXT: return $pop[[L]]{{$}}
+define i32 @indirect_notail(%fn %f, i32 %x, i32 %y) {
+  %p = extractvalue %fn %f, 0
+  %v = notail call i32 %p(%fn %f, i32 %x, i32 %y)
+  ret i32 %v
+}
+
+; CHECK-LABEL: indirect_musttail:
+; CHECK: return_call_indirect , $0, $1, $2, $0{{$}}
+define i32 @indirect_musttail(%fn %f, i32 %x, i32 %y) {
+  %p = extractvalue %fn %f, 0
+  %v = musttail call i32 %p(%fn %f, i32 %x, i32 %y)
+  ret i32 %v
+}
+
+; CHECK-LABEL: indirect_tail:
+; CHECK: return_call_indirect , $0, $1, $2, $0{{$}}
+define i32 @indirect_tail(%fn %f, i32 %x, i32 %y) {
+  %p = extractvalue %fn %f, 0
+  %v = tail call i32 %p(%fn %f, i32 %x, i32 %y)
+  ret i32 %v
+}
+
+; CHECK-LABEL: choice_notail:
+; CHECK: i32.call_indirect $push[[L:[0-9]+]]=, $0, $pop{{[0-9]+}}{{$}}
+; CHECK-NEXT: return $pop[[L]]{{$}}
+define i1 @choice_notail(i1 %x) {
+  %p = select i1 %x, i1 (i1)* @foo, i1 (i1)* @bar
+  %v = notail call i1 %p(i1 %x)
+  ret i1 %v
+}
+
+; CHECK-LABEL: choice_musttail:
+; CHECK: return_call_indirect , $0, $pop{{[0-9]+}}{{$}}
+define i1 @choice_musttail(i1 %x) {
+  %p = select i1 %x, i1 (i1)* @foo, i1 (i1)* @bar
+  %v = musttail call i1 %p(i1 %x)
+  ret i1 %v
+}
+
+; CHECK-LABEL: choice_tail:
+; SLOW: return_call_indirect , $0, $pop{{[0-9]+}}{{$}}
+; FAST: i32.call_indirect $push[[L:[0-9]+]]=, $0, $pop{{[0-9]+}}{{$}}
+; FAST: return $pop[[L]]{{$}}
+define i1 @choice_tail(i1 %x) {
+  %p = select i1 %x, i1 (i1)* @foo, i1 (i1)* @bar
+  %v = tail call i1 %p(i1 %x)
+  ret i1 %v
+}
+
+; It is an LLVM validation error for a 'musttail' callee to have a different
+; prototype than its caller, so the following tests can only be done with
+; 'tail'.
+
+; CHECK-LABEL: mismatched_prototypes:
+; SLOW: return_call baz, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; FAST: i32.call $push[[L:[0-9]+]]=, baz, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}{{$}}
+; FAST: return $pop[[L]]{{$}}
+declare i32 @baz(i32, i32, i32)
+define i32 @mismatched_prototypes() {
+  %v = tail call i32 @baz(i32 0, i32 42, i32 6)
+  ret i32 %v
+}
+
+; CHECK-LABEL: mismatched_byval:
+; CHECK: i32.store
+; CHECK: return_call quux, $pop{{[0-9]+}}{{$}}
+declare i32 @quux(i32* byval)
+define i32 @mismatched_byval(i32* %x) {
+  %v = tail call i32 @quux(i32* byval %x)
+  ret i32 %v
+}
+
+; CHECK-LABEL: varargs:
+; CHECK: i32.store
+; CHECK: return_call var, $1{{$}}
+declare i32 @var(...)
+define i32 @varargs(i32 %x) {
+  %v = tail call i32 (...) @var(i32 %x)
   ret i32 %v
 }
 
 ; CHECK-LABEL: .section .custom_section.target_features
 ; CHECK-NEXT: .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 9
 ; CHECK-NEXT: .ascii "tail-call"

llvm/trunk/test/DebugInfo/WebAssembly/dbg-value-move-reg-stackify.mir

 # RUN: llc < %s -run-pass=wasm-reg-stackify -x=mir 2>&1 | FileCheck %s
 
 # CHECK: body:
 # CHECK: %1:i32 = I32_WRAP_I64 %0,
 # CHECK-NEXT: DBG_VALUE %1,
-# CHECK-NEXT: %1:i32 = CALL_I32 @bar,
+# CHECK-NEXT: %1:i32 = CALL_i32 @bar,
 # CHECK-NEXT: DBG_VALUE %1,
-# CHECK-NEXT: %[[NEWREG:.*]]:i32 = CALL_I32 @bar,
+# CHECK-NEXT: %[[NEWREG:.*]]:i32 = CALL_i32 @bar,
 # CHECK-NEXT: DBG_VALUE %[[NEWREG]],
 # CHECK-NEXT: CALL_VOID @foo, %[[NEWREG]],
 
 --- |
   target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   declare void @foo(i32)
liveins:
   - { reg: '$arguments' }
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $arguments
     %0:i64 = ARGUMENT_i64 0, implicit $arguments
     %1:i32 = I32_WRAP_I64 %0:i64, implicit-def dead $arguments
     DBG_VALUE %1:i32, $noreg, !10, !DIExpression(), debug-location !13; <unknown>:357:12 line no:357
-    %1:i32 = CALL_I32 @bar, implicit-def dead $arguments, implicit $sp32, implicit $sp64
+    %1:i32 = CALL_i32 @bar, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DBG_VALUE %1:i32, $noreg, !11, !DIExpression(), debug-location !14; <unknown>:357:12 line no:357
-    %1:i32 = CALL_I32 @bar, implicit-def dead $arguments, implicit $sp32, implicit $sp64
+    %1:i32 = CALL_i32 @bar, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DBG_VALUE %1:i32, $noreg, !12, !DIExpression(), debug-location !15; <unknown>:357:12 line no:357
     CALL_VOID @foo, %1:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     RETURN_VOID implicit-def dead $arguments
 
 ...

llvm/trunk/test/MC/WebAssembly/tail-call-encodings.s

+# RUN: llvm-mc -show-encoding -triple=wasm32-unkown-unknown -mattr=+tail-call < %s | FileCheck %s
+
+bar1:
+    .functype bar1 () -> ()
+    end_function
+
+foo1:
+    .functype foo1 () -> ()
+
+    # CHECK: return_call bar1  # encoding: [0x12,
+    # CHECK-NEXT: fixup A - offset: 1, value: bar1, kind: fixup_uleb128_i32
+    return_call bar1
+
+    end_function
+
+foo2:
+    .functype foo2 () -> ()
+
+    # CHECK: return_call_indirect 0 # encoding: [0x13,0x00,0x00]
+    return_call_indirect 0
+
+    end_function