[ARM] Select fp16 fma

[dmgreen]

Summary

This adds a pattern for fma, similar to the float and double patterns.

[SjoerdMeijer]

Looks good to me.

We have test for vfma in fp16-instructions.ll matchin a mul and add, but this one here is for matching intrinsics. Perhaps this test file should be called fp16-intrinsics.ll.

llvm/trunk/lib/Target/ARM/ARMInstrVFP.td

 // Match @llvm.fma.* intrinsics
 // (fma x, y, z) -> (vfms z, x, y)
 def : Pat<(f64 (fma DPR:$Dn, DPR:$Dm, DPR:$Ddin)),
           (VFMAD DPR:$Ddin, DPR:$Dn, DPR:$Dm)>,
       Requires<[HasVFP4,HasDPVFP]>;
 def : Pat<(f32 (fma SPR:$Sn, SPR:$Sm, SPR:$Sdin)),
           (VFMAS SPR:$Sdin, SPR:$Sn, SPR:$Sm)>,
       Requires<[HasVFP4]>;
+def : Pat<(f16 (fma HPR:$Sn, HPR:$Sm, HPR:$Sdin)),
+          (VFMAH HPR:$Sdin, HPR:$Sn, HPR:$Sm)>,
+      Requires<[HasFullFP16]>;
 
 def VFMSD : ADbI<0b11101, 0b10, 1, 0,
                  (outs DPR:$Dd), (ins DPR:$Ddin, DPR:$Dn, DPR:$Dm),
                  IIC_fpFMAC64, "vfms", ".f64\t$Dd, $Dn, $Dm",
                  [(set DPR:$Dd, (fadd_mlx (fneg (fmul_su DPR:$Dn,DPR:$Dm)),
                                           (f64 DPR:$Ddin)))]>,
               RegConstraint<"$Ddin = $Dd">,
               Requires<[HasVFP4,HasDPVFP,UseFusedMAC]>,

llvm/trunk/test/CodeGen/ARM/fp16-fullfp16.ll

 ; CHECK-NEXT:    vstr.16 s0, [r4]
 ; CHECK-NEXT:    pop {r4, pc}
   %a = load half, half* %p, align 2
   %r = call half @llvm.log2.f16(half %a)
   store half %r, half* %p
   ret void
 }
 
-; FIXME
-;define void @test_fma(half* %p, half* %q, half* %r) {
-;  %a = load half, half* %p, align 2
-;  %b = load half, half* %q, align 2
-;  %c = load half, half* %r, align 2
-;  %v = call half @llvm.fma.f16(half %a, half %b, half %c)
-;  store half %v, half* %p
-;  ret void
-;}
+define void @test_fma(half* %p, half* %q, half* %r) {
+; CHECK-LABEL: test_fma:
+; CHECK:         vldr.16 s0, [r1]
+; CHECK-NEXT:    vldr.16 s2, [r0]
+; CHECK-NEXT:    vldr.16 s4, [r2]
+; CHECK-NEXT:    vfma.f16 s4, s2, s0
+; CHECK-NEXT:    vstr.16 s4, [r0]
+; CHECK-NEXT:    bx lr
+  %a = load half, half* %p, align 2
+  %b = load half, half* %q, align 2
+  %c = load half, half* %r, align 2
+  %v = call half @llvm.fma.f16(half %a, half %b, half %c)
+  store half %v, half* %p
+  ret void
+}
 
 define void @test_fabs(half* %p) {
 ; CHECK-LABEL: test_fabs:
 ; CHECK:         vldr.16 s0, [r0]
 ; CHECK-NEXT:    vabs.f16 s0, s0
 ; CHECK-NEXT:    vstr.16 s0, [r0]
 ; CHECK-NEXT:    bx lr
   %a = load half, half* %p, align 2