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dnsampaio (Diogo N. Sampaio)
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User Since
Sep 22 2017, 3:13 PM (63 w, 3 d)

Recent Activity

Thu, Dec 6

dnsampaio committed rL348493: [NFC][AArch64] Split out backend features.
[NFC][AArch64] Split out backend features
Thu, Dec 6, 7:43 AM
dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Trying to fix a windows bot failing test, dividing the test into multiple files and using full line matching.

Thu, Dec 6, 7:19 AM
dnsampaio added a comment to rL348121: [NFC][AArch64] Split out backend features.

@dnsampaio This broke the buildbots: http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/14363

Are you looking at this or should I revert?

@dnsampaio Reverted at rL348249

Thu, Dec 6, 2:27 AM

Mon, Dec 3

dnsampaio committed rL348121: [NFC][AArch64] Split out backend features.
[NFC][AArch64] Split out backend features
Mon, Dec 3, 3:11 AM
dnsampaio closed D54633: [NFC][AArch64] Split out backend features.
Mon, Dec 3, 3:11 AM

Wed, Nov 28

dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Fixed one comment.

Wed, Nov 28, 3:30 AM

Tue, Nov 27

dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

NIT in the v8.4a trace tests.

Tue, Nov 27, 10:16 AM
dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Fix the tlb-rmi feature argument and test file.

Tue, Nov 27, 10:13 AM
dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Removed the register (system operand) constraint, and associated test case.
Fixed PAN, RCPC dependencies and instructions that depend on PA, not PAN.
Changed some names to be more meaningful.
Removed the prefix "has" from the features flags.
Fixed tests

Tue, Nov 27, 10:03 AM
dnsampaio added inline comments to D54633: [NFC][AArch64] Split out backend features.
Tue, Nov 27, 10:03 AM

Mon, Nov 26

dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Fixed:
the features implications/dependencies.
the name of the JavaScript conversion feature.
some test files.

Mon, Nov 26, 9:02 AM

Fri, Nov 23

dnsampaio added a comment to D54633: [NFC][AArch64] Split out backend features.

Hi @olista01 and @bryanpkc. Thanks for the reviews.

Have you discussed these feature names with the GCC devs? I know we can change the user-facing names used by clang in in TargetParser, but it's easier for us if they match.

Indeed I did not. As you said, they are not visible to the user. I'll check with the gcc devs how they have these features split and named though.

For the feature registers (ISAR6 and MMFR2), maybe we should just make these registers always available? These registers are all defined to read as all-zeroes in older architectures, which means no features described by that register are implemented. If we continue like this then we will have to add an extra feature to pretty much every new architectural feature for the ID register.

Indeed it seems the case for the ID_ISAR6_EL1 exist, so I'll just remove the constraints over it.
However, the ID_AA64MMFR2_EL1 register was added in v8.2. So I believe we should check as to warn the user if he might get undefined behavior by accessing it when not present.

Fri, Nov 23, 4:34 AM

Mon, Nov 19

dnsampaio updated the diff for D54633: [NFC][AArch64] Split out backend features.

Added FeatureRASv8_4 implies RAS.
NIT fix.

Mon, Nov 19, 3:47 AM
dnsampaio added inline comments to D54633: [NFC][AArch64] Split out backend features.
Mon, Nov 19, 3:30 AM

Fri, Nov 16

dnsampaio created D54633: [NFC][AArch64] Split out backend features.
Fri, Nov 16, 8:41 AM

Nov 7 2018

dnsampaio committed rC346303: [NFC][Clang][Aarch64] Add missing test file.
[NFC][Clang][Aarch64] Add missing test file
Nov 7 2018, 3:44 AM
dnsampaio committed rL346303: [NFC][Clang][Aarch64] Add missing test file.
[NFC][Clang][Aarch64] Add missing test file
Nov 7 2018, 3:44 AM
dnsampaio closed D54148: [NFC][Clang][Aarch64] Add missing test file.
Nov 7 2018, 3:44 AM

Nov 6 2018

dnsampaio created D54148: [NFC][Clang][Aarch64] Add missing test file.
Nov 6 2018, 6:00 AM
dnsampaio added a comment to D54146: [NFC] Add missing test file.

Ups, it was ment to be a clang patch, not a llvm one. Sry

Nov 6 2018, 3:55 AM
dnsampaio created D54146: [NFC] Add missing test file.
Nov 6 2018, 3:54 AM

Oct 30 2018

dnsampaio committed rL345601: [FIX][AArch64] Add support for UDF instruction.
[FIX][AArch64] Add support for UDF instruction
Oct 30 2018, 7:02 AM
dnsampaio committed rLLD345592: [FIX][AArch64] lld test change.
[FIX][AArch64] lld test change
Oct 30 2018, 5:23 AM
dnsampaio committed rL345592: [FIX][AArch64] lld test change.
[FIX][AArch64] lld test change
Oct 30 2018, 5:23 AM
dnsampaio committed rL345587: [FIX][AArch64] Add support for UDF instruction.
[FIX][AArch64] Add support for UDF instruction
Oct 30 2018, 4:41 AM
dnsampaio committed rL345581: [AArch64] Add support for UDF instruction.
[AArch64] Add support for UDF instruction
Oct 30 2018, 4:09 AM
dnsampaio closed D53319: Add support for AArch64 UDF instruction.
Oct 30 2018, 4:09 AM
dnsampaio updated the diff for D53319: Add support for AArch64 UDF instruction.

Added blank lines at end of test files.

Oct 30 2018, 3:35 AM

Oct 29 2018

dnsampaio updated the diff for D53319: Add support for AArch64 UDF instruction.

Re-inserted the missing tests. Small refactoring as to look alike neighbor code.

Oct 29 2018, 4:25 AM

Oct 23 2018

dnsampaio updated the diff for D53319: Add support for AArch64 UDF instruction.

Refactoring.

Oct 23 2018, 3:45 AM

Oct 19 2018

dnsampaio added a comment to D53319: Add support for AArch64 UDF instruction.

Ping.

Oct 19 2018, 9:07 AM

Oct 16 2018

dnsampaio updated the diff for D53319: Add support for AArch64 UDF instruction.

No custom decoding is required

Oct 16 2018, 10:57 AM
dnsampaio added inline comments to D53319: Add support for AArch64 UDF instruction.
Oct 16 2018, 10:22 AM
dnsampaio updated the diff for D53319: Add support for AArch64 UDF instruction.

Fixed the tests as to check boundaries, and one value in the middle.
Changed tests ordering as they generated empty lines not treated by FileCheck.

Oct 16 2018, 4:50 AM
dnsampaio added a comment to D53319: Add support for AArch64 UDF instruction.

To send patch....

Oct 16 2018, 4:29 AM
dnsampaio created D53319: Add support for AArch64 UDF instruction.
Oct 16 2018, 3:18 AM

Oct 11 2018

dnsampaio committed rL344248: [AARCH64][FIX] Emit data symbol for constant pool data.
[AARCH64][FIX] Emit data symbol for constant pool data
Oct 11 2018, 7:13 AM
dnsampaio closed D53132: [AARCH64][FIX] Emit data symbol for constant pool data.
Oct 11 2018, 7:13 AM
dnsampaio updated the diff for D53132: [AARCH64][FIX] Emit data symbol for constant pool data.

Removed processor and specific triple target from test.

Oct 11 2018, 6:27 AM
dnsampaio added a reviewer for D53132: [AARCH64][FIX] Emit data symbol for constant pool data: pbarrio.
Oct 11 2018, 4:34 AM
dnsampaio created D53132: [AARCH64][FIX] Emit data symbol for constant pool data.
Oct 11 2018, 4:26 AM

Oct 2 2018

dnsampaio committed rLLD343604: [NFC][BUG-FIX][ARM] Add missing data symbol.
[NFC][BUG-FIX][ARM] Add missing data symbol
Oct 2 2018, 9:55 AM
dnsampaio committed rL343604: [NFC][BUG-FIX][ARM] Add missing data symbol.
[NFC][BUG-FIX][ARM] Add missing data symbol
Oct 2 2018, 9:54 AM
dnsampaio committed rL343594: [ARM] Emmit data symbol for constant pool data.
[ARM] Emmit data symbol for constant pool data
Oct 2 2018, 7:59 AM
dnsampaio closed D52737: [ARM] Emmit data symbol for constant pool data.
Oct 2 2018, 7:59 AM
dnsampaio updated the diff for D52737: [ARM] Emmit data symbol for constant pool data.

Updated test to use llvm-mc instead of clang.

Oct 2 2018, 3:39 AM
dnsampaio updated the diff for D52737: [ARM] Emmit data symbol for constant pool data.

Simplified tests. Using the standard function for emitting data symbols, if required.

Oct 2 2018, 2:54 AM
dnsampaio added inline comments to D52737: [ARM] Emmit data symbol for constant pool data.
Oct 2 2018, 2:53 AM

Oct 1 2018

dnsampaio created D52737: [ARM] Emmit data symbol for constant pool data.
Oct 1 2018, 11:26 AM

Sep 12 2018

dnsampaio committed rL342061: [ARM] Tighten f64<->f16 conversion requirements.
[ARM] Tighten f64<->f16 conversion requirements
Sep 12 2018, 9:26 AM
dnsampaio closed D51631: [ARM] Tighten f64<->f16 conversion requirements.
Sep 12 2018, 9:26 AM

Sep 7 2018

dnsampaio added a comment to D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.

Correct. The protected name is double underscore as both suffix and prefix.

Sep 7 2018, 2:47 AM
dnsampaio committed rC341644: Replaces __inline by __inline__ / C89 compatible.
Replaces __inline by __inline__ / C89 compatible
Sep 7 2018, 2:41 AM
dnsampaio committed rL341644: Replaces __inline by __inline__ / C89 compatible.
Replaces __inline by __inline__ / C89 compatible
Sep 7 2018, 2:41 AM

Sep 6 2018

dnsampaio committed rL341548: Fix march triple used test from rL341475.
Fix march triple used test from rL341475
Sep 6 2018, 7:14 AM
dnsampaio committed rC341548: Fix march triple used test from rL341475.
Fix march triple used test from rL341475
Sep 6 2018, 7:14 AM
dnsampaio updated the diff for D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Sep 6 2018, 6:10 AM
dnsampaio updated the diff for D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.

Fix test march triple.

Sep 6 2018, 5:59 AM
dnsampaio added inline comments to D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Sep 6 2018, 3:05 AM

Sep 5 2018

dnsampaio committed rC341475: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89
Sep 5 2018, 7:57 AM
dnsampaio committed rL341475: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89
Sep 5 2018, 7:57 AM
dnsampaio closed D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Sep 5 2018, 7:57 AM
dnsampaio created D51683: Fix arm_neon.h and arm_fp16.h generation for compiling with std=c89.
Sep 5 2018, 7:09 AM

Aug 14 2018

dnsampaio updated the diff for D50704: [Inline-cost] Teach cost function to account for accumulative code-size growth.

Fixed comment explaining the elaborated growth cost-function.

Aug 14 2018, 9:50 AM
dnsampaio added inline comments to D50704: [Inline-cost] Teach cost function to account for accumulative code-size growth.
Aug 14 2018, 9:43 AM
dnsampaio updated the diff for D50704: [Inline-cost] Teach cost function to account for accumulative code-size growth.

Using FileCheck in test file.

Aug 14 2018, 8:50 AM
dnsampaio created D50704: [Inline-cost] Teach cost function to account for accumulative code-size growth.
Aug 14 2018, 6:57 AM
dnsampaio added inline comments to D50432: [DAGCombiner] Reduce load widths of shifted masks.
Aug 14 2018, 2:14 AM
dnsampaio added inline comments to D50432: [DAGCombiner] Reduce load widths of shifted masks.
Aug 14 2018, 2:14 AM

Aug 13 2018

dnsampaio updated the summary of D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Aug 13 2018, 7:30 AM

Aug 8 2018

dnsampaio added inline comments to D50433: A New Divergence Analysis for LLVM.
Aug 8 2018, 6:48 AM

Aug 7 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Added missing test-file

Aug 7 2018, 9:51 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Moving this pattern matching to AggressiveInstCombine following a suggestion of @lebedev.ri . Now it searches for minimal required patterns as desired by @spatel.

Aug 7 2018, 9:50 AM

Aug 3 2018

dnsampaio added a comment to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

So all expensive operations have been eliminated, I do not see why it wouldn't fit in InstCombne. We detect a pattern and we reduce it.

Because the pattern that we are matching is larger than it needs to be (as the comment in the test file clearly shows - there is no 'or' in the minimal pattern). This problem of trying to make everything fit in instcombine has been discussed several times on llvm-dev in the last ~year. Eg:
http://lists.llvm.org/pipermail/llvm-dev/2017-September/117151.html

I agree that it won't handle all cases. But one will need to come with a more generic thinking as to create a new pass that handles this. Something like an abstract known bits, that tells that two values hold the same bits coming from a given instruction, or some simplification by demanded bits from the same values. It is feasible, but it is not my intention to do it so now.

Did you look at (new)-GVN to see if it fits in there?

I must confess that I did not quite understand all the work-flow of newGVN, but from what I did see, it mostly wouldn't fit. It seems to behave like InstCombine, expecting to replace the current instruction being visited. And it would require to create one value as to detect if there is a leader of that value and then reuse it. It is not that complicated, but quite awkward IMO.

If this is in instcombine (in addition to missing the pattern when there is no 'or'), I think you have to limit the transform based on uses as Roman mentioned in an earlier comment.

Aug 3 2018, 3:01 AM

Aug 2 2018

dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Aug 2 2018, 3:38 AM

Jul 30 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Added test that the inner and must be replaced by the new shift operation.
Converted the function to bool, as it does not require to create the Or operation after the replaceAll.

Jul 30 2018, 5:07 AM
dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 30 2018, 5:03 AM
dnsampaio added a comment to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

As we are replacing all the uses of the DeadAnd, it is not required to create and replace the visiting Or operation. Replace all uses does the job already.

Jul 30 2018, 4:58 AM
dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 30 2018, 2:23 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Replaces all uses of the innermost and with the new shift.

Jul 30 2018, 2:23 AM

Jul 25 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 25 2018, 8:15 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Relaxed conditions for which the transformation is applied.
Added more tests for ashr.

Jul 25 2018, 4:53 AM

Jul 24 2018

dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 24 2018, 9:19 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Removed unused arguments.
Early exit.

Jul 24 2018, 9:16 AM
dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 24 2018, 9:14 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

All required values are obtained during the pattern matching.

Jul 24 2018, 8:37 AM
dnsampaio added inline comments to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 24 2018, 8:36 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Moved to a separated function. Placed function call after knowing more about the operands.
Added ashr case, that was being wrongly treated as lshr.
Added comments, including one that argues that this function would be useless if and instructions are move before any type of shift operations.
Using m_c_Or, and passing operands as arguments.

Jul 24 2018, 4:55 AM
dnsampaio added a comment to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Did most fixes. Just don't how to capture non-leaf nodes of the pattern being matched. Using other match operations would actually be more complicated than just passing the operands as arguments to the new function, now that I already know they are AND operations due the function call placement.

Jul 24 2018, 4:50 AM

Jul 20 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
Jul 20 2018, 6:16 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Detect desired pattern from the binary operation using the results.

Jul 20 2018, 6:09 AM
dnsampaio added a comment to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.
  1. Please always upload all patches with the full context (-U99999)

Sorry, I thought that it being an entire function it wouldn't matter. Lesson learned.

Jul 20 2018, 1:53 AM

Jul 17 2018

dnsampaio updated the diff for D48278: [SelectionDAG] Fold redundant masking operations of shifted value.

Added context.

Jul 17 2018, 12:11 AM

Jul 16 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Using hasNUses() instead of numUses() ==

Jul 16 2018, 3:28 AM

Jul 14 2018

dnsampaio added inline comments to D48278: [SelectionDAG] Fold redundant masking operations of shifted value.
Jul 14 2018, 2:24 PM
dnsampaio updated the diff for D48278: [SelectionDAG] Fold redundant masking operations of shifted value.

Replaced num_uses by !hasNUsesOfValue as requested.

Jul 14 2018, 2:23 PM

Jul 13 2018

dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Moved test to correct folder

Jul 13 2018, 7:18 AM
dnsampaio updated the diff for D48278: [SelectionDAG] Fold redundant masking operations of shifted value.

Only accepts instructions with 2 uses (AND / SHIFT operations). So that looping through the uses is not expensive, and we avoid it in most cases.
Removed recursive bit value computations(computeKnownBits).

Jul 13 2018, 6:59 AM
dnsampaio added a comment to D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Fixed execution costs. See below.

Jul 13 2018, 1:34 AM
dnsampaio updated the diff for D49229: [AggressiveInstCombine] Fold redundant masking operations of shifted value.

Constrain to allow the transformation to happen only when the masked value has only 2 users (an AND and a SHIFT).
Removed value tracking operations.

Jul 13 2018, 1:11 AM