- User Since
- Sep 22 2017, 3:13 PM (63 w, 3 d)
Thu, Dec 6
Trying to fix a windows bot failing test, dividing the test into multiple files and using full line matching.
Mon, Dec 3
Wed, Nov 28
Fixed one comment.
Tue, Nov 27
NIT in the v8.4a trace tests.
Fix the tlb-rmi feature argument and test file.
Removed the register (system operand) constraint, and associated test case.
Fixed PAN, RCPC dependencies and instructions that depend on PA, not PAN.
Changed some names to be more meaningful.
Removed the prefix "has" from the features flags.
Mon, Nov 26
the features implications/dependencies.
some test files.
Fri, Nov 23
Indeed I did not. As you said, they are not visible to the user. I'll check with the gcc devs how they have these features split and named though.
For the feature registers (ISAR6 and MMFR2), maybe we should just make these registers always available? These registers are all defined to read as all-zeroes in older architectures, which means no features described by that register are implemented. If we continue like this then we will have to add an extra feature to pretty much every new architectural feature for the ID register.
Indeed it seems the case for the ID_ISAR6_EL1 exist, so I'll just remove the constraints over it.
However, the ID_AA64MMFR2_EL1 register was added in v8.2. So I believe we should check as to warn the user if he might get undefined behavior by accessing it when not present.
Mon, Nov 19
Added FeatureRASv8_4 implies RAS.
Fri, Nov 16
Nov 7 2018
Nov 6 2018
Ups, it was ment to be a clang patch, not a llvm one. Sry
Oct 30 2018
Added blank lines at end of test files.
Oct 29 2018
Re-inserted the missing tests. Small refactoring as to look alike neighbor code.
Oct 23 2018
Oct 19 2018
Oct 16 2018
No custom decoding is required
Fixed the tests as to check boundaries, and one value in the middle.
Changed tests ordering as they generated empty lines not treated by FileCheck.
To send patch....
Oct 11 2018
Removed processor and specific triple target from test.
Oct 2 2018
Updated test to use llvm-mc instead of clang.
Simplified tests. Using the standard function for emitting data symbols, if required.
Oct 1 2018
Sep 12 2018
Sep 7 2018
Sep 6 2018
Fix test march triple.
Sep 5 2018
Aug 14 2018
Fixed comment explaining the elaborated growth cost-function.
Using FileCheck in test file.
Aug 13 2018
Aug 8 2018
Aug 7 2018
Added missing test-file
Aug 3 2018
I agree that it won't handle all cases. But one will need to come with a more generic thinking as to create a new pass that handles this. Something like an abstract known bits, that tells that two values hold the same bits coming from a given instruction, or some simplification by demanded bits from the same values. It is feasible, but it is not my intention to do it so now.
Did you look at (new)-GVN to see if it fits in there?
I must confess that I did not quite understand all the work-flow of newGVN, but from what I did see, it mostly wouldn't fit. It seems to behave like InstCombine, expecting to replace the current instruction being visited. And it would require to create one value as to detect if there is a leader of that value and then reuse it. It is not that complicated, but quite awkward IMO.
If this is in instcombine (in addition to missing the pattern when there is no 'or'), I think you have to limit the transform based on uses as Roman mentioned in an earlier comment.
Aug 2 2018
Jul 30 2018
Added test that the inner and must be replaced by the new shift operation.
Converted the function to bool, as it does not require to create the Or operation after the replaceAll.
As we are replacing all the uses of the DeadAnd, it is not required to create and replace the visiting Or operation. Replace all uses does the job already.
Replaces all uses of the innermost and with the new shift.
Jul 25 2018
Relaxed conditions for which the transformation is applied.
Added more tests for ashr.
Jul 24 2018
Removed unused arguments.
All required values are obtained during the pattern matching.
Moved to a separated function. Placed function call after knowing more about the operands.
Added ashr case, that was being wrongly treated as lshr.
Added comments, including one that argues that this function would be useless if and instructions are move before any type of shift operations.
Using m_c_Or, and passing operands as arguments.
Did most fixes. Just don't how to capture non-leaf nodes of the pattern being matched. Using other match operations would actually be more complicated than just passing the operands as arguments to the new function, now that I already know they are AND operations due the function call placement.
Jul 20 2018
Detect desired pattern from the binary operation using the results.
Sorry, I thought that it being an entire function it wouldn't matter. Lesson learned.
Jul 17 2018
Jul 16 2018
Using hasNUses() instead of numUses() ==
Jul 14 2018
Replaced num_uses by !hasNUsesOfValue as requested.
Jul 13 2018
Moved test to correct folder
Only accepts instructions with 2 uses (AND / SHIFT operations). So that looping through the uses is not expensive, and we avoid it in most cases.
Removed recursive bit value computations(computeKnownBits).
Fixed execution costs. See below.
Constrain to allow the transformation to happen only when the masked value has only 2 users (an AND and a SHIFT).
Removed value tracking operations.