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[PowerPC] P9 Scheduling Model: dispatching rule fixes
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Authored by jsji on May 13 2019, 1:56 PM.

Details

Summary

This is to address some of the problems in existing P9 resource modeling,
especially about the dispatching rules.

Instead of using a hypothetical DISPATCHER , we try to use the number of actual dispatch slots,
and define SchedWriteRes to model dispatch rules,
then update instruction classes according to dispatch rules.

All the dispatch rules and instruction classes update are made according
to POWER9 User Manual.

SPEC2017 benchmark test on P9 machines shows some improvement in 525.x264_r and 502.gcc_r,
no big degradation for others.

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Repository
rL LLVM

Event Timeline

jsji created this revision.May 13 2019, 1:56 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 13 2019, 1:56 PM
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jsji added a subscriber: llvm-commits.
jsji added a comment.May 23 2019, 9:31 AM

Ping.. Anyone has comments and feedback? Thanks.

steven.zhang accepted this revision.May 23 2019, 10:49 PM

LGTM. But please hold on for some days if someone else might have comments.

This revision is now accepted and ready to land.May 23 2019, 10:49 PM
jsji updated this revision to Diff 202942.Jun 4 2019, 7:59 AM

Rebased to ToT.

This revision was automatically updated to reflect the committed changes.