[OpenMP][AArch64] Fix compile with LLVM trunk.

[efriedma]

Summary

The code is currently using the ambiguous instruction "sub sp, sp, w9, lsl #4". The ARM instruction manual says this isn't valid, and it's not clear whether it's supposed to mean uxtw or uxtx. LLVM used to accept this and treat it as uxtx, but now it rejects the construct.

It doesn't matter which form of extension we use here, since the high bits of the operand are zero anyway, so I arbitrarily choose uxtw, to preserve the register name.

See https://reviews.llvm.org/D60840 for the LLVM patch.

This is my first patch to the OpenMP runtime; not sure if I'm selecting appropriate reviewers.

[efriedma]

Ping

[jdoerfert]

I'd say as an ARM expert, and a person that knows what we used to do for this ill-formed input, you are perfectly qualified to fix this.

[fhahn]

The change in the AArch64 assembly looks good to me.

[Hahnfeld]

Please subscribe to openmp-commits for future patches to the OpenMP runtime such that your revisions from Phabricator and more importantly commit emails get through.

[efriedma]

Sorry, I didn't realize that's how the moderation works; subscribed now.

[Hahnfeld]

In D61770#1519342, @efriedma wrote:

Sorry, I didn't realize that's how the moderation works; subscribed now.

No worries, they'll get through eventually as they did for this patch, but that might take some time.

openmp/runtime/src/z_Linux_asm.S

// mark_begin;
   stp x29, x30, [sp, #-16]!
 # if OMPT_SUPPORT
   stp x19, x20, [sp, #-16]!
 # endif
   mov x29, sp
 
   orr w9, wzr, #1
   add w9, w9, w3, lsr #1
-  sub sp, sp, w9, lsl #4
+  sub sp, sp, w9, uxtw #4
   mov x11, sp
 
   mov x8, x0
   str w1, [x29, #-__gtid]
   str w2, [x29, #-__tid]
   mov w9, w3
   mov x10, x4
 # if OMPT_SUPPORT