This prevents "Cannot encode high byte register in REX-prefixed instruction"
from happening on instructions that require REX encoding when AH & co
get selected.
On the down side, these 4 registers can no longer be selected
automatically, but this avoids having to expose all the X86 encoding
complexity.
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Details
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- rG LLVM Github Monorepo
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Buildable 29630 Build 29629: arc lint + arc unit
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Would be a good idea to add a test for some opcode that used to fail with that error?
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The issue is that such a test would have failed in a non-deterministic manner, which is why I've only added a unit test. But now that this should not longer fail, let's add one.
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Thanks Craig,
This is the x86_64 target (the only one we support at the moment) so we're good on the first part :)
For the rest, TBH I'm not well versed in the subtleties of X86 encoding, so got these registers from the list here.
As Guillaume mentioned if there is a register class I can use I'll be happy to.
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I should have phrased my question better. SIL/DIL/BPL/SPL are only available in x86_64. So if that's all you support then you are ok.