[PowerPC] Look through copies for compare elimination

[nemanjai]

Summary

We currently miss the opportunities for optmizing comparisons in the peephole optimizer if the input is the result of a COPY since we look for record-form versions of the producing instruction.

This patch simply lets the optimization peek through copies.

[jsji]

Might miss some opportunity related to parameters instead. Please have a look. Thanks.

lib/Target/PowerPC/PPCInstrInfo.cpp

1669

This will have some problem with parameter/return COPY: We will get HW reg instead, wrong MI, then mess up the search scope in line 1802 later.
See test/CodeGen/PowerPC/optcmp.ll for an example.

[nemanjai]

Updated to not look through copies if that leads to a physical register since that will never produce a defining MI.

[nemanjai]

In D59633#1446706, @jsji wrote:

Might miss some opportunity related to parameters instead. Please have a look. Thanks.

Thank you so much for catching this. This was just a dumb oversight on my part. I originally had something along these lines and changed it because getUniqueVRegDef() won't assert on physical registers. However, I unfortunately changed it after I ran my usual bootstrap tests with lit and test-suite and just prior to posting.

[jsji]

LGTM.

[stefanp]

Have a couple of minor nits about the test case but that is all.
LGTM.

test/CodeGen/PowerPC/eliminate-compare-of-copy.ll

8

I usually add a CHECK: blr at the end so that I know where the end of the function is. In a way it is just like adding the CHECK-LABEL at the start.

15

nit:
Cleanup: I don't think that you need the #0, #1 or #2.

[nemanjai]

test/CodeGen/PowerPC/eliminate-compare-of-copy.ll

8

Will add on the commit. Thanks.

15

Fair enough, I'll remove them.

[amyk]

This looks good to me.

lib/Target/PowerPC/PPCInstrInfo.cpp

bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg,
   int OpC = CmpInstr.getOpcode();
   unsigned CRReg = CmpInstr.getOperand(0).getReg();
 
   // FP record forms set CR1 based on the exception status bits, not a
   // comparison with zero.
   if (OpC == PPC::FCMPUS || OpC == PPC::FCMPUD)
     return false;
 
+  const TargetRegisterInfo *TRI = &getRegisterInfo();
   // The record forms set the condition register based on a signed comparison
   // with zero (so says the ISA manual). This is not as straightforward as it
   // seems, however, because this is always a 64-bit comparison on PPC64, even
   // for instructions that are 32-bit in nature (like slw for example).
   // So, on PPC32, for unsigned comparisons, we can use the record forms only
   // for equality checks (as those don't depend on the sign). On PPC64,
   // we are restricted to equality for unsigned 64-bit comparisons and for
   // signed 32-bit comparisons the applicability is more restricted.
   bool isPPC64 = Subtarget.isPPC64();
   bool is32BitSignedCompare   = OpC ==  PPC::CMPWI || OpC == PPC::CMPW;
   bool is32BitUnsignedCompare = OpC == PPC::CMPLWI || OpC == PPC::CMPLW;
   bool is64BitUnsignedCompare = OpC == PPC::CMPLDI || OpC == PPC::CMPLD;
 
   // Get the unique definition of SrcReg.
+  SrcReg = TRI->lookThruCopyLike(SrcReg, MRI);
   MachineInstr *MI = MRI->getUniqueVRegDef(SrcReg);
   if (!MI) return false;
 
   bool equalityOnly = false;
   bool noSub = false;
   if (isPPC64) {
     if (is32BitSignedCompare) {
       // We can perform this optimization only if MI is sign-extending.
else if (Value != 0) {
     else
       return false;
 
     PredsToUpdate.push_back(std::make_pair(&(UseMI->getOperand(0)),
                                             NewPred));
   }
 
   // Search for Sub.
-  const TargetRegisterInfo *TRI = &getRegisterInfo();
   --I;
 
   // Get ready to iterate backward from CmpInstr.
   MachineBasicBlock::iterator E = MI, B = CmpInstr.getParent()->begin();
 
   for (; I != E && !noSub; --I) {
     const MachineInstr &Instr = *I;
     unsigned IOpC = Instr.getOpcode();

test/CodeGen/PowerPC/eliminate-compare-of-copy.ll

+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:   -mcpu=pwr8 -ppc-asm-full-reg-names < %s | FileCheck %s
+
+define dso_local signext i32 @func(i32 zeroext %x, i32 zeroext %y) local_unnamed_addr #0 {
+; CHECK-LABEL: func
+; CHECK: or. {{r[0-9]+}}, r4, r3
+; CHECK-NOT: cmplwi
+entry:
+  %or = or i32 %y, %x
+  %tobool = icmp eq i32 %or, 0
+  br i1 %tobool, label %if.else, label %if.then
+
+if.then:                                          ; preds = %entry
+  %call = tail call signext i32 bitcast (i32 (...)* @f1 to i32 ()*)() #2
+  br label %return
+
+if.else:                                          ; preds = %entry
+  %call1 = tail call signext i32 bitcast (i32 (...)* @f2 to i32 ()*)() #2
+  br label %return
+
+return:                                           ; preds = %if.else, %if.then
+  %retval.0 = phi i32 [ %call, %if.then ], [ %call1, %if.else ]
+  ret i32 %retval.0
+}
+
+declare signext i32 @f1(...) local_unnamed_addr #1
+
+declare signext i32 @f2(...) local_unnamed_addr #1