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[PowerPC] Fix a conversion is not considered when the ISD::BR_CC node making the instruction selection
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Authored by HLJ2009 on Nov 21 2018, 9:29 PM.

Details

Summary

Now llc produces the same code for the following ir code.

define i64 @testi64slt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
entry:
  %cmp1 = icmp eq i64 %c3, %c4
  %cmp3tmp = icmp eq i64 %c1, %c2
  %cmp3 = icmp slt i1 %cmp3tmp, %cmp1
  br i1 %cmp3, label %iftrue, label %iffalse
iftrue:
  ret i64 %a1
iffalse:
  ret i64 %a2
}
define i64 @testi64ult(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 {
entry:
  %cmp1 = icmp eq i64 %c3, %c4
  %cmp3tmp = icmp eq i64 %c1, %c2
  %cmp3 = icmp ult i1 %cmp3tmp, %cmp1
  br i1 %cmp3, label %iftrue, label %iffalse
iftrue:
  ret i64 %a1
iffalse:
  ret i64 %a2
}

But from the semantics of ir, these are not equivalent. Because a signed comparison of i1
values produces the opposite result to an unsigned one if the condition code includes
less-than or greater-than. This is so because 1 is the most negative signed i1 number and
the most positive unsigned i1 number. The CR-logical operations used for such comparisons
are non-commutative so for signed comparisons vs. unsigned ones, the input operands just
need to be swapped.

Diff Detail

Repository
rL LLVM

Event Timeline

HLJ2009 created this revision.Nov 21 2018, 9:29 PM
HLJ2009 updated this revision to Diff 175382.Nov 26 2018, 7:02 PM

Test cases have been modified to make code changes

HLJ2009 updated this revision to Diff 175608.Nov 27 2018, 5:50 PM

Using the suggestion to modify the code. Thanks to Steven and Nemanjai.

This revision is now accepted and ready to land.Nov 27 2018, 7:08 PM
This revision was automatically updated to reflect the committed changes.