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AMDGPU/GlobalISel: Move SMRD selection logic to TableGen
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Authored by tstellar on Oct 4 2018, 7:52 PM.

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tstellar created this revision.Oct 4 2018, 7:52 PM
arsenm added inline comments.Oct 4 2018, 8:12 PM
lib/Target/AMDGPU/AMDGPUGISel.td
156

Typo leaglizing

157–158

I think turning everything into i32 vectors in SelectionDAG was a mistake, but I don't think GlobalISel will have the same issues with it. Floating point loads don't need to be explicitly handled anymore?

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
234–248 ↗(On Diff #168431)

Why is this target specific?

tstellar updated this revision to Diff 179011.Dec 19 2018, 8:36 PM
tstellar marked 2 inline comments as done.

Remove custom legalization logic for loads of pointer types.

tstellar marked an inline comment as done.Dec 19 2018, 8:37 PM
tstellar added inline comments.
lib/Target/AMDGPU/AMDGPUGISel.td
157–158

Right, loads are select based on type width only.

tstellar updated this revision to Diff 179012.Dec 19 2018, 8:39 PM

Remove unnecessary #include

arsenm added inline comments.Dec 19 2018, 9:28 PM
lib/Target/AMDGPU/SMInstructions.td
689–690

This isn't necessary since the verifier enforces there is always one MMO for g_load

tstellar updated this revision to Diff 183001.Jan 22 2019, 5:14 PM

Add TableGen patterns for loads of pointer types.

arsenm added inline comments.Jan 22 2019, 5:21 PM
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
645

_XM0

test/CodeGen/AMDGPU/GlobalISel/inst-select-load-smrd.mir
90

Pointer

149

address space missing from all the MMOs

tstellar updated this revision to Diff 183112.Jan 23 2019, 9:15 AM
tstellar marked 3 inline comments as done.

Address review comments.

arsenm accepted this revision.Jan 23 2019, 10:34 AM

LGTM

This revision is now accepted and ready to land.Jan 23 2019, 10:34 AM
This revision was automatically updated to reflect the committed changes.
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