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Differential D49803

[MIPS GlobalISel] Select global address
ClosedPublic

Authored by Petar.Avramovic on Jul 25 2018, 8:25 AM.

Details

Reviewers
atanasyan
petarj
dsanders
Commits
rG64c10ba8e23d: [MIPS GlobalISel] Select global address
rL338499: [MIPS GlobalISel] Select global address
Summary

Select G_GLOBAL_VALUE for position dependent code.

Diff Detail

Repository
rL LLVM

Event Timeline

Petar.Avramovic created this revision.Jul 25 2018, 8:25 AM
Herald added subscribers: arichardson, kristof.beyls, rovka, sdardis. · View Herald TranscriptJul 25 2018, 8:25 AM
atanasyan accepted this revision.Jul 31 2018, 6:41 AM

LGTM with a nit.

lib/Target/Mips/MipsInstructionSelector.cpp
170 ↗(On Diff #157281)

I suggest to use an early-return:

if (MF.getTarget().isPositionIndependent())
  return false;
This revision is now accepted and ready to land.Jul 31 2018, 6:41 AM
Petar.Avramovic updated this revision to Diff 158290.Jul 31 2018, 8:45 AM

Addressed review comments.

Petar.Avramovic marked an inline comment as done.Jul 31 2018, 8:46 AM
Closed by commit rL338499: [MIPS GlobalISel] Select global address (authored by petarj). · Explain WhyAug 1 2018, 2:04 AM
This revision was automatically updated to reflect the committed changes.
Herald added subscribers: llvm-commits, jrtc27. · View Herald TranscriptAug 1 2018, 2:04 AM

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
Mips/
27 lines
3 lines
1 line
test/
CodeGen/
Mips/
GlobalISel/
instruction-select/
46 lines
irtranslator/
26 lines
legalizer/
43 lines
llvm-ir/
34 lines
regbankselect/
44 lines

Diff 158481

llvm/trunk/lib/Target/Mips/MipsInstructionSelector.cpp

Show First 20 Lines • Show All 160 Lines • ▼ Show 20 Lines case G_CONSTANT: {
if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI)) if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))
return false; return false;
if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI))
return false; return false;
I.eraseFromParent(); I.eraseFromParent();
return true; return true;
} }
case G_GLOBAL_VALUE: {
if (MF.getTarget().isPositionIndependent())
return false;
const llvm::GlobalValue *GVal = I.getOperand(1).getGlobal();
unsigned LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass);
MachineInstr *LUi, *ADDiu;
LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
.addDef(LUiReg)
.addGlobalAddress(GVal);
LUi->getOperand(1).setTargetFlags(MipsII::MO_ABS_HI);
ADDiu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
.addDef(I.getOperand(0).getReg())
.addUse(LUiReg)
.addGlobalAddress(GVal);
ADDiu->getOperand(2).setTargetFlags(MipsII::MO_ABS_LO);
if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI))
return false;
if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI))
return false;
I.eraseFromParent();
return true;
}
default: default:
return false; return false;
} }
I.eraseFromParent(); I.eraseFromParent();
return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
} }
namespace llvm { namespace llvm {
InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &TM, InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &TM,
MipsSubtarget &Subtarget, MipsSubtarget &Subtarget,
MipsRegisterBankInfo &RBI) { MipsRegisterBankInfo &RBI) {
return new MipsInstructionSelector(TM, Subtarget, RBI); return new MipsInstructionSelector(TM, Subtarget, RBI);
} }
} // end namespace llvm } // end namespace llvm

llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp

Show All 30 Lines getActionDefinitionsBuilder(G_CONSTANT)
.legalFor({s32}); .legalFor({s32});
getActionDefinitionsBuilder(G_GEP) getActionDefinitionsBuilder(G_GEP)
.legalFor({{p0, s32}}); .legalFor({{p0, s32}});
getActionDefinitionsBuilder(G_FRAME_INDEX) getActionDefinitionsBuilder(G_FRAME_INDEX)
.legalFor({p0}); .legalFor({p0});
getActionDefinitionsBuilder(G_GLOBAL_VALUE)
.legalFor({p0});
computeTables(); computeTables();
verify(*ST.getInstrInfo()); verify(*ST.getInstrInfo());
} }

llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp

Show First 20 Lines • Show All 82 Lines • ▼ Show 20 LinesMipsRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case G_ADD: case G_ADD:
case G_LOAD: case G_LOAD:
case G_STORE: case G_STORE:
case G_GEP: case G_GEP:
OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx]; OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx];
break; break;
case G_CONSTANT: case G_CONSTANT:
case G_FRAME_INDEX: case G_FRAME_INDEX:
case G_GLOBAL_VALUE:
OperandsMapping = OperandsMapping =
getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr}); getOperandsMapping({&Mips::ValueMappings[Mips::GPRIdx], nullptr});
break; break;
default: default:
return getInvalidInstructionMapping(); return getInvalidInstructionMapping();
} }
return getInstructionMapping(DefaultMappingID, /*Cost=*/1, OperandsMapping, return getInstructionMapping(DefaultMappingID, /*Cost=*/1, OperandsMapping,
NumOperands); NumOperands);
} }

llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
@.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
define void @main() {entry: ret void}
declare i32 @printf(i8*, ...)
...
---
name: main
alignment: 2
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: main
; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @.str
; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @.str
; MIPS32: [[LUi1:%[0-9]+]]:gpr32 = LUi 18838
; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi1]], 722
; MIPS32: [[LUi2:%[0-9]+]]:gpr32 = LUi 0
; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi2]], 0
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $a0 = COPY [[ADDiu]]
; MIPS32: $a1 = COPY [[ORi]]
; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[ORi1]]
; MIPS32: RetRA implicit $v0
%2:gprb(p0) = G_GLOBAL_VALUE @.str
%1:gprb(p0) = COPY %2(p0)
%3:gprb(s32) = G_CONSTANT i32 1234567890
%4:gprb(s32) = G_CONSTANT i32 0
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$a0 = COPY %1(p0)
$a1 = COPY %3(s32)
JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
%0:gprb(s32) = COPY $v0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$v0 = COPY %4(s32)
RetRA implicit $v0
...

llvm/trunk/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll

; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
@.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
define i32 @main() {
; MIPS32-LABEL: name: main
; MIPS32: bb.1.entry:
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @.str
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY [[GV]](p0)
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1234567890
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $a0 = COPY [[COPY]](p0)
; MIPS32: $a1 = COPY [[C]](s32)
; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0
entry:
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 signext 1234567890)
ret i32 0
}
declare i32 @printf(i8*, ...)

llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
@.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
define void @main() {entry: ret void}
declare i32 @printf(i8*, ...)
...
---
name: main
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: main
; MIPS32: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @.str
; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY [[GV]](p0)
; MIPS32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1234567890
; MIPS32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $a0 = COPY [[COPY]](p0)
; MIPS32: $a1 = COPY [[C]](s32)
; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
; MIPS32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0
%2:_(p0) = G_GLOBAL_VALUE @.str
%1:_(p0) = COPY %2(p0)
%3:_(s32) = G_CONSTANT i32 1234567890
%4:_(s32) = G_CONSTANT i32 0
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$a0 = COPY %1(p0)
$a1 = COPY %3(s32)
JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
%0:_(s32) = COPY $v0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$v0 = COPY %4(s32)
RetRA implicit $v0
...

llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
@.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
define i32 @main() {
; MIPS32-LABEL: main:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: addiu $sp, $sp, -24
; MIPS32-NEXT: .cfi_def_cfa_offset 24
; MIPS32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill
; MIPS32-NEXT: .cfi_offset 31, -4
; MIPS32-NEXT: lui $1, %hi($.str)
; MIPS32-NEXT: addiu $4, $1, %lo($.str)
; MIPS32-NEXT: lui $1, 18838
; MIPS32-NEXT: ori $5, $1, 722
; MIPS32-NEXT: lui $1, 0
; MIPS32-NEXT: ori $2, $1, 0
; MIPS32-NEXT: sw $2, 16($sp) # 4-byte Folded Spill
; MIPS32-NEXT: jal printf
; MIPS32-NEXT: nop
; MIPS32-NEXT: lw $1, 16($sp) # 4-byte Folded Reload
; MIPS32-NEXT: move $2, $1
; MIPS32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload
; MIPS32-NEXT: addiu $sp, $sp, 24
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 signext 1234567890)
ret i32 0
}
declare i32 @printf(i8*, ...)

llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
--- |
@.str = private unnamed_addr constant [11 x i8] c"hello %d \0A\00"
define void @main() {entry: ret void}
declare i32 @printf(i8*, ...)
...
---
name: main
alignment: 2
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: main
; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @.str
; MIPS32: [[COPY:%[0-9]+]]:gprb(p0) = COPY [[GV]](p0)
; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1234567890
; MIPS32: [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 0
; MIPS32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $a0 = COPY [[COPY]](p0)
; MIPS32: $a1 = COPY [[C]](s32)
; MIPS32: JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $v0
; MIPS32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; MIPS32: $v0 = COPY [[C1]](s32)
; MIPS32: RetRA implicit $v0
%2:_(p0) = G_GLOBAL_VALUE @.str
%1:_(p0) = COPY %2(p0)
%3:_(s32) = G_CONSTANT i32 1234567890
%4:_(s32) = G_CONSTANT i32 0
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$a0 = COPY %1(p0)
$a1 = COPY %3(s32)
JAL @printf, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit $a1, implicit-def $v0
%0:_(s32) = COPY $v0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$v0 = COPY %4(s32)
RetRA implicit $v0
...