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Differential D48001

[Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
ClosedPublic

Authored by lebedev.ri on Jun 11 2018, 1:00 AM.

Details

Reviewers
spatel
RKSimon
MaskRay
tstellar
arsenm
Commits
rGdbd98b3a0908: [Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
rL334396: [Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
Summary

Lack of that support has taken me by surprise.
I need to add (or at least look at) some tests for https://reviews.llvm.org/D47980#1127615,
and i don't really fancy doing that by hand.

The asm pattern is quite similar to that of x86:
https://godbolt.org/g/hfgeds
just with # replaced with ;

Diff Detail

Repository
rL LLVM

Event Timeline

lebedev.ri created this revision.Jun 11 2018, 1:00 AM
Herald added subscribers: t-tye, tpr, dstuttard and 3 others. · View Herald TranscriptJun 11 2018, 1:00 AM
lebedev.ri edited the summary of this revision. (Show Details)Jun 11 2018, 1:02 AM
arsenm accepted this revision.Jun 11 2018, 1:41 AM
arsenm added a subscriber: arsenm.

LGTM, although I don't see the relevance to the IR patch

This revision is now accepted and ready to land.Jun 11 2018, 1:41 AM
lebedev.ri added a comment.Jun 11 2018, 2:19 AM
In D48001#1127744, @arsenm wrote:

LGTM

Thank you for the review.

although I don't see the relevance to the IR patch

That IR thing may or may not break the idioms AMDGPU backend is looking for,
since it changes the IR produced by the @llvm.amdgcn.ubfe. intrinsics.

Closed by commit rL334396: [Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples (authored by lebedevri). · Explain WhyJun 11 2018, 2:24 AM
This revision was automatically updated to reflect the committed changes.
lebedev.ri added a child revision: D48005: [NFC][AMDGPU] Add tests for all the various IR patterns equivalent to extracting low bits..Jun 11 2018, 4:00 AM

Revision Contents

PathSize
llvm/
trunk/
utils/
UpdateTestChecks/
19 lines

Diff 150696

llvm/trunk/utils/UpdateTestChecks/asm.py

Show All 28 Lines
ASM_FUNCTION_AARCH64_RE = re.compile( ASM_FUNCTION_AARCH64_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*\/\/[ \t]*@(?P=func)\n' r'^_?(?P<func>[^:]+):[ \t]*\/\/[ \t]*@(?P=func)\n'
r'(?:[ \t]+.cfi_startproc\n)?' # drop optional cfi noise r'(?:[ \t]+.cfi_startproc\n)?' # drop optional cfi noise
r'(?P<body>.*?)\n' r'(?P<body>.*?)\n'
# This list is incomplete # This list is incomplete
r'.Lfunc_end[0-9]+:\n', r'.Lfunc_end[0-9]+:\n',
flags=(re.M | re.S)) flags=(re.M | re.S))
ASM_FUNCTION_AMDGPU_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*;+[ \t]*@(?P=func)\n[^:]*?'
r'(?P<body>.*?)\n' # (body of the function)
# This list is incomplete
r'.Lfunc_end[0-9]+:\n',
flags=(re.M | re.S))
ASM_FUNCTION_MIPS_RE = re.compile( ASM_FUNCTION_MIPS_RE = re.compile(
r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@(?P=func)\n[^:]*?' # f: (name of func) r'^_?(?P<func>[^:]+):[ \t]*#+[ \t]*@(?P=func)\n[^:]*?' # f: (name of func)
r'(?:^[ \t]+\.(frame|f?mask|set).*?\n)+' # Mips+LLVM standard asm prologue r'(?:^[ \t]+\.(frame|f?mask|set).*?\n)+' # Mips+LLVM standard asm prologue
r'(?P<body>.*?)\n' # (body of the function) r'(?P<body>.*?)\n' # (body of the function)
r'(?:^[ \t]+\.(set|end).*?\n)+' # Mips+LLVM standard asm epilogue r'(?:^[ \t]+\.(set|end).*?\n)+' # Mips+LLVM standard asm epilogue
r'(\$|\.L)func_end[0-9]+:\n', # $func_end0: (mips32 - O32) or r'(\$|\.L)func_end[0-9]+:\n', # $func_end0: (mips32 - O32) or
# .Lfunc_end0: (mips64 - NewABI) # .Lfunc_end0: (mips64 - NewABI)
flags=(re.M | re.S)) flags=(re.M | re.S))
▲ Show 20 Lines • Show All 66 Lines • ▼ Show 20 Lines if getattr(args, 'extra_scrub', False):
# Avoid generating different checks for 32- and 64-bit because of 'retl' vs 'retq'. # Avoid generating different checks for 32- and 64-bit because of 'retl' vs 'retq'.
asm = SCRUB_X86_RET_RE.sub(r'ret{{[l|q]}}', asm) asm = SCRUB_X86_RET_RE.sub(r'ret{{[l|q]}}', asm)
# Strip kill operands inserted into the asm. # Strip kill operands inserted into the asm.
asm = common.SCRUB_KILL_COMMENT_RE.sub('', asm) asm = common.SCRUB_KILL_COMMENT_RE.sub('', asm)
# Strip trailing whitespace. # Strip trailing whitespace.
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm) asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
return asm return asm
def scrub_asm_amdgpu(asm, args):
# Scrub runs of whitespace out of the assembly, but leave the leading
# whitespace in place.
asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm)
# Expand the tabs used for indentation.
asm = string.expandtabs(asm, 2)
# Strip trailing whitespace.
asm = common.SCRUB_TRAILING_WHITESPACE_RE.sub(r'', asm)
return asm
def scrub_asm_arm_eabi(asm, args): def scrub_asm_arm_eabi(asm, args):
# Scrub runs of whitespace out of the assembly, but leave the leading # Scrub runs of whitespace out of the assembly, but leave the leading
# whitespace in place. # whitespace in place.
asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm) asm = common.SCRUB_WHITESPACE_RE.sub(r' ', asm)
# Expand the tabs used for indentation. # Expand the tabs used for indentation.
asm = string.expandtabs(asm, 2) asm = string.expandtabs(asm, 2)
# Strip kill operands inserted into the asm. # Strip kill operands inserted into the asm.
asm = common.SCRUB_KILL_COMMENT_RE.sub('', asm) asm = common.SCRUB_KILL_COMMENT_RE.sub('', asm)
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
def build_function_body_dictionary_for_triple(args, raw_tool_output, triple, prefixes, func_dict): def build_function_body_dictionary_for_triple(args, raw_tool_output, triple, prefixes, func_dict):
target_handlers = { target_handlers = {
'x86_64': (scrub_asm_x86, ASM_FUNCTION_X86_RE), 'x86_64': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
'i686': (scrub_asm_x86, ASM_FUNCTION_X86_RE), 'i686': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
'x86': (scrub_asm_x86, ASM_FUNCTION_X86_RE), 'x86': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
'i386': (scrub_asm_x86, ASM_FUNCTION_X86_RE), 'i386': (scrub_asm_x86, ASM_FUNCTION_X86_RE),
'aarch64': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE), 'aarch64': (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE),
'r600': (scrub_asm_amdgpu, ASM_FUNCTION_AMDGPU_RE),
'amdgcn': (scrub_asm_amdgpu, ASM_FUNCTION_AMDGPU_RE),
'arm-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'arm-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumb-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumb-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6t2': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6t2': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6t2-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6t2-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6m': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6m': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
'thumbv6m-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE), 'thumbv6m-eabi': (scrub_asm_arm_eabi, ASM_FUNCTION_ARM_RE),
▲ Show 20 Lines • Show All 41 Lines • Show Last 20 Lines