[AMDGPU][MC] Enabled parsing of relocations on VALU instructions
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Authored by dp on Jun 7 2018, 8:22 AM.

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rL LLVM
dp created this revision.Jun 7 2018, 8:22 AM

Missing test for the f32 src change?

dp added a comment.Jun 7 2018, 10:07 AM

Missing test for the f32 src change?

I do not think relocations will ever be used with f32 operands, so I added a generic check for expressions:

v_mul_f32 v0, foo+2, v2

Is this sufficient?

This revision is now accepted and ready to land.Jun 7 2018, 10:15 AM
This revision was automatically updated to reflect the committed changes.