This is an archive of the discontinued LLVM Phabricator instance.

[AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions.
ClosedPublic

Authored by sdesmalen on Jun 4 2018, 6:49 AM.

Details

Summary

The variants added by this patch are:

  • SQINC signed increment, e.g. sqinc x0, w0, all, mul #4
  • SQDEC signed decrement, e.g. sqdec x0, w0, all, mul #4
  • UQINC unsigned increment, e.g. uqinc w0, all, mul #4
  • UQDEC unsigned decrement, e.g. uqdec w0, all, mul #4

This patch includes asmparser changes to parse a GPR64 as a GPR32 in
order to satisfy the constraint check:

x0 == GPR64(w0)

in:

sqinc x0, w0, all, mul #4
       ^___^ (must match)

Diff Detail

Event Timeline

sdesmalen created this revision.Jun 4 2018, 6:49 AM
samparker added inline comments.Jun 11 2018, 2:11 AM
test/MC/AArch64/SVE/sqdecd-diagnostics.s
31

After the effort of producing useful diagnostics, why isn't this message so vague?

sdesmalen added inline comments.Jun 14 2018, 4:48 AM
test/MC/AArch64/SVE/sqdecd-diagnostics.s
31

Good point, I see that I wasn't yet using the DiagnosticPredicate for these operands. I'll fix this in a separate patch (because this also affects ptrue(s)).

fhahn accepted this revision.Jun 15 2018, 8:15 AM

LGTM, given there are no objections in D47714

This revision is now accepted and ready to land.Jun 15 2018, 8:15 AM
This revision was automatically updated to reflect the committed changes.