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Differential D48220

[AArch64][SVE] Asm: Fix predicate pattern diagnostics.
ClosedPublic

Authored by sdesmalen on Jun 15 2018, 8:03 AM.

Details

Reviewers
samparker
SjoerdMeijer
javed.absar
fhahn
Commits
rG067eee1c13b6: [AArch64][SVE] Asm: Fix predicate pattern diagnostics.
rL334983: [AArch64][SVE] Asm: Fix predicate pattern diagnostics.
Summary

This patch uses the DiagnosticPredicate for SVE predicate patterns
to improve their diagnostics, now giving a 'invalid operand' diagnostic
if the type is not an immediate or one of the expected pattern
labels.

Diff Detail

Repository
rL LLVM

Event Timeline

sdesmalen created this revision.Jun 15 2018, 8:03 AM
Herald added a reviewer: javed.absar. · View Herald TranscriptJun 15 2018, 8:03 AM
Herald added subscribers: rkruppe, kristof.beyls, tschuett. · View Herald Transcript
sdesmalen added parent revisions: D47715: [AArch64][SVE] Asm: Support for saturating INC/DEC (64bit scalar) instructions., D47716: [AArch64][SVE] Asm: Support for saturating INC/DEC (32bit scalar) instructions..Jun 15 2018, 8:04 AM
fhahn accepted this revision.Jun 15 2018, 8:13 AM
fhahn added a subscriber: fhahn.

LGTM, this fixes some surprising error messages, where invalid predicate pattern was emitted for invalid operands (that are a valid predicate pattern, just not for this instruction or register operands). Thanks Sam for pointing that out in D47716

This revision is now accepted and ready to land.Jun 15 2018, 8:13 AM
Closed by commit rL334983: [AArch64][SVE] Asm: Fix predicate pattern diagnostics. (authored by s.desmalen). · Explain WhyJun 18 2018, 2:07 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

Diff 151788

llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Show First 20 Lines • Show All 567 Lines • ▼ Show 20 Lines DiagnosticPredicate isImmScaled(bool Signed) const {
int64_t Val = MCE->getValue(); int64_t Val = MCE->getValue();
if (Val >= MinVal && Val <= MaxVal && (Val % Scale) == 0) if (Val >= MinVal && Val <= MaxVal && (Val % Scale) == 0)
return DiagnosticPredicateTy::Match; return DiagnosticPredicateTy::Match;
return DiagnosticPredicateTy::NearMatch; return DiagnosticPredicateTy::NearMatch;
} }
bool isSVEPattern() const { DiagnosticPredicate isSVEPattern() const {
if (!isImm()) if (!isImm())
return false; return DiagnosticPredicateTy::NoMatch;
auto *MCE = dyn_cast<MCConstantExpr>(getImm()); auto *MCE = dyn_cast<MCConstantExpr>(getImm());
if (!MCE) if (!MCE)
return false; return DiagnosticPredicateTy::NoMatch;
int64_t Val = MCE->getValue(); int64_t Val = MCE->getValue();
return Val >= 0 && Val < 32; if (Val >= 0 && Val < 32)
return DiagnosticPredicateTy::Match;
return DiagnosticPredicateTy::NearMatch;
} }
bool isSymbolicUImm12Offset(const MCExpr *Expr, unsigned Scale) const { bool isSymbolicUImm12Offset(const MCExpr *Expr, unsigned Scale) const {
AArch64MCExpr::VariantKind ELFRefKind; AArch64MCExpr::VariantKind ELFRefKind;
MCSymbolRefExpr::VariantKind DarwinRefKind; MCSymbolRefExpr::VariantKind DarwinRefKind;
int64_t Addend; int64_t Addend;
if (!AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind, DarwinRefKind, if (!AArch64AsmParser::classifySymbolRef(Expr, ELFRefKind, DarwinRefKind,
Addend)) { Addend)) {
▲ Show 20 Lines • Show All 4,689 Lines • Show Last 20 Lines

llvm/trunk/test/MC/AArch64/SVE/decb-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: decb x0, all, mul #17 // CHECK-NEXT: decb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
decb x0, vl512 decb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decb x0, vl512 // CHECK-NEXT: decb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decb x0, vl9 decb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decb x0, vl9 // CHECK-NEXT: decb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decb x0, #-1 decb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decb x0, #-1 // CHECK-NEXT: decb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decb x0, #32 decb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decb x0, #32 // CHECK-NEXT: decb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/decd-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: decd x0, all, mul #17 // CHECK-NEXT: decd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
decd x0, vl512 decd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decd x0, vl512 // CHECK-NEXT: decd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decd x0, vl9 decd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decd x0, vl9 // CHECK-NEXT: decd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decd x0, #-1 decd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decd x0, #-1 // CHECK-NEXT: decd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decd x0, #32 decd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decd x0, #32 // CHECK-NEXT: decd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/dech-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: dech x0, all, mul #17 // CHECK-NEXT: dech x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
dech x0, vl512 dech x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: dech x0, vl512 // CHECK-NEXT: dech x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
dech x0, vl9 dech x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: dech x0, vl9 // CHECK-NEXT: dech x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
dech x0, #-1 dech x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: dech x0, #-1 // CHECK-NEXT: dech x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
dech x0, #32 dech x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: dech x0, #32 // CHECK-NEXT: dech x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/decw-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: decw x0, all, mul #17 // CHECK-NEXT: decw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
decw x0, vl512 decw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decw x0, vl512 // CHECK-NEXT: decw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decw x0, vl9 decw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: decw x0, vl9 // CHECK-NEXT: decw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decw x0, #-1 decw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decw x0, #-1 // CHECK-NEXT: decw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
decw x0, #32 decw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: decw x0, #32 // CHECK-NEXT: decw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/incb-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: incb x0, all, mul #17 // CHECK-NEXT: incb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
incb x0, vl512 incb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incb x0, vl512 // CHECK-NEXT: incb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incb x0, vl9 incb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incb x0, vl9 // CHECK-NEXT: incb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incb x0, #-1 incb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incb x0, #-1 // CHECK-NEXT: incb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incb x0, #32 incb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incb x0, #32 // CHECK-NEXT: incb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/incd-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: incd x0, all, mul #17 // CHECK-NEXT: incd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
incd x0, vl512 incd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incd x0, vl512 // CHECK-NEXT: incd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incd x0, vl9 incd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incd x0, vl9 // CHECK-NEXT: incd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incd x0, #-1 incd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incd x0, #-1 // CHECK-NEXT: incd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incd x0, #32 incd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incd x0, #32 // CHECK-NEXT: incd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/inch-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: inch x0, all, mul #17 // CHECK-NEXT: inch x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
inch x0, vl512 inch x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: inch x0, vl512 // CHECK-NEXT: inch x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
inch x0, vl9 inch x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: inch x0, vl9 // CHECK-NEXT: inch x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
inch x0, #-1 inch x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: inch x0, #-1 // CHECK-NEXT: inch x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
inch x0, #32 inch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: inch x0, #32 // CHECK-NEXT: inch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/incw-diagnostics.s

Show All 31 Lines
// CHECK-NEXT: incw x0, all, mul #17 // CHECK-NEXT: incw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
incw x0, vl512 incw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incw x0, vl512 // CHECK-NEXT: incw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incw x0, vl9 incw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: incw x0, vl9 // CHECK-NEXT: incw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incw x0, #-1 incw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incw x0, #-1 // CHECK-NEXT: incw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
incw x0, #32 incw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: incw x0, #32 // CHECK-NEXT: incw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/ptrue-diagnostics.s

// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
// Invalid pattern name // Invalid pattern name
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
ptrue p0.s, vl512 ptrue p0.s, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ptrue p0.s, vl512 // CHECK-NEXT: ptrue p0.s, vl512
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
ptrue p0.s, vl9 ptrue p0.s, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ptrue p0.s, vl9 // CHECK-NEXT: ptrue p0.s, vl9
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
// Invalid immediate range // Invalid immediate range
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
ptrue p0.s, #-1 ptrue p0.s, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: ptrue p0.s, #-1 // CHECK-NEXT: ptrue p0.s, #-1
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
ptrue p0.s, #32 ptrue p0.s, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: ptrue p0.s, #32 // CHECK-NEXT: ptrue p0.s, #32
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/ptrues-diagnostics.s

// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
// Invalid pattern name // Invalid pattern name
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
ptrues p0.s, vl512 ptrues p0.s, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ptrues p0.s, vl512 // CHECK-NEXT: ptrues p0.s, vl512
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
ptrues p0.s, vl9 ptrues p0.s, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: ptrues p0.s, vl9 // CHECK-NEXT: ptrues p0.s, vl9
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
// Invalid immediate range // Invalid immediate range
// --------------------------------------------------------------------------// // --------------------------------------------------------------------------//
ptrues p0.s, #-1 ptrues p0.s, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: ptrues p0.s, #-1 // CHECK-NEXT: ptrues p0.s, #-1
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:
ptrues p0.s, #32 ptrues p0.s, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: ptrues p0.s, #32 // CHECK-NEXT: ptrues p0.s, #32
// CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-3]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqdecb-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqdecb x0, w1 sqdecb x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqdecb x0, w1 // CHECK-NEXT: sqdecb x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecb x0, x1 sqdecb x0, x1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecb x0, x1 // CHECK-NEXT: sqdecb x0, x1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqdecb x0, all, mul #-1 sqdecb x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqdecb x0, all, mul #17 // CHECK-NEXT: sqdecb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqdecb x0, vl512 sqdecb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecb x0, vl512 // CHECK-NEXT: sqdecb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecb x0, vl9 sqdecb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecb x0, vl9 // CHECK-NEXT: sqdecb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecb x0, #-1 sqdecb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecb x0, #-1 // CHECK-NEXT: sqdecb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecb x0, #32 sqdecb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecb x0, #32 // CHECK-NEXT: sqdecb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqdecd-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqdecd x0, w1 sqdecd x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqdecd x0, w1 // CHECK-NEXT: sqdecd x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecd x0, x1 sqdecd x0, x1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecd x0, x1 // CHECK-NEXT: sqdecd x0, x1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqdecd x0, all, mul #-1 sqdecd x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqdecd x0, all, mul #17 // CHECK-NEXT: sqdecd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqdecd x0, vl512 sqdecd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecd x0, vl512 // CHECK-NEXT: sqdecd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecd x0, vl9 sqdecd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecd x0, vl9 // CHECK-NEXT: sqdecd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecd x0, #-1 sqdecd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecd x0, #-1 // CHECK-NEXT: sqdecd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecd x0, #32 sqdecd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecd x0, #32 // CHECK-NEXT: sqdecd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqdech-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqdech x0, w1 sqdech x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqdech x0, w1 // CHECK-NEXT: sqdech x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdech x0, x1 sqdech x0, x1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdech x0, x1 // CHECK-NEXT: sqdech x0, x1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqdech x0, all, mul #-1 sqdech x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqdech x0, all, mul #17 // CHECK-NEXT: sqdech x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqdech x0, vl512 sqdech x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdech x0, vl512 // CHECK-NEXT: sqdech x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdech x0, vl9 sqdech x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdech x0, vl9 // CHECK-NEXT: sqdech x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdech x0, #-1 sqdech x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdech x0, #-1 // CHECK-NEXT: sqdech x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdech x0, #32 sqdech x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdech x0, #32 // CHECK-NEXT: sqdech x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqdecw-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqdecw x0, w1 sqdecw x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqdecw x0, w1 // CHECK-NEXT: sqdecw x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecw x0, x1 sqdecw x0, x1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecw x0, x1 // CHECK-NEXT: sqdecw x0, x1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqdecw x0, all, mul #-1 sqdecw x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqdecw x0, all, mul #17 // CHECK-NEXT: sqdecw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqdecw x0, vl512 sqdecw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecw x0, vl512 // CHECK-NEXT: sqdecw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecw x0, vl9 sqdecw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqdecw x0, vl9 // CHECK-NEXT: sqdecw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecw x0, #-1 sqdecw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecw x0, #-1 // CHECK-NEXT: sqdecw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqdecw x0, #32 sqdecw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqdecw x0, #32 // CHECK-NEXT: sqdecw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqincb-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqincb x0, w1 sqincb x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqincb x0, w1 // CHECK-NEXT: sqincb x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincb x0, x0 sqincb x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincb x0, x0 // CHECK-NEXT: sqincb x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqincb x0, all, mul #-1 sqincb x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqincb x0, all, mul #17 // CHECK-NEXT: sqincb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqincb x0, vl512 sqincb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincb x0, vl512 // CHECK-NEXT: sqincb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincb x0, vl9 sqincb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincb x0, vl9 // CHECK-NEXT: sqincb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincb x0, #-1 sqincb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincb x0, #-1 // CHECK-NEXT: sqincb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincb x0, #32 sqincb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincb x0, #32 // CHECK-NEXT: sqincb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqincd-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqincd x0, w1 sqincd x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqincd x0, w1 // CHECK-NEXT: sqincd x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincd x0, x0 sqincd x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincd x0, x0 // CHECK-NEXT: sqincd x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqincd x0, all, mul #-1 sqincd x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqincd x0, all, mul #17 // CHECK-NEXT: sqincd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqincd x0, vl512 sqincd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincd x0, vl512 // CHECK-NEXT: sqincd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincd x0, vl9 sqincd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincd x0, vl9 // CHECK-NEXT: sqincd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincd x0, #-1 sqincd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincd x0, #-1 // CHECK-NEXT: sqincd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincd x0, #32 sqincd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincd x0, #32 // CHECK-NEXT: sqincd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqinch-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqinch x0, w1 sqinch x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqinch x0, w1 // CHECK-NEXT: sqinch x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqinch x0, x0 sqinch x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqinch x0, x0 // CHECK-NEXT: sqinch x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqinch x0, all, mul #-1 sqinch x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqinch x0, all, mul #17 // CHECK-NEXT: sqinch x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqinch x0, vl512 sqinch x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqinch x0, vl512 // CHECK-NEXT: sqinch x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqinch x0, vl9 sqinch x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqinch x0, vl9 // CHECK-NEXT: sqinch x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqinch x0, #-1 sqinch x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqinch x0, #-1 // CHECK-NEXT: sqinch x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqinch x0, #32 sqinch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqinch x0, #32 // CHECK-NEXT: sqinch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/sqincw-diagnostics.s

Show All 22 Lines
// Operands not matching up // Operands not matching up
sqincw x0, w1 sqincw x0, w1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be 32-bit form of destination register
// CHECK-NEXT: sqincw x0, w1 // CHECK-NEXT: sqincw x0, w1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincw x0, x0 sqincw x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincw x0, x0 // CHECK-NEXT: sqincw x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
sqincw x0, all, mul #-1 sqincw x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: sqincw x0, all, mul #17 // CHECK-NEXT: sqincw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
sqincw x0, vl512 sqincw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincw x0, vl512 // CHECK-NEXT: sqincw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincw x0, vl9 sqincw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sqincw x0, vl9 // CHECK-NEXT: sqincw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincw x0, #-1 sqincw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincw x0, #-1 // CHECK-NEXT: sqincw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
sqincw x0, #32 sqincw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: sqincw x0, #32 // CHECK-NEXT: sqincw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqdecb-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqdecb sp // CHECK-NEXT: uqdecb sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned dec only has one register operand) // Operands not matching up (unsigned dec only has one register operand)
uqdecb x0, w0 uqdecb x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecb x0, w0 // CHECK-NEXT: uqdecb x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecb w0, w0 uqdecb w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecb w0, w0 // CHECK-NEXT: uqdecb w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecb x0, x0 uqdecb x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecb x0, x0 // CHECK-NEXT: uqdecb x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqdecb x0, all, mul #-1 uqdecb x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqdecb x0, all, mul #17 // CHECK-NEXT: uqdecb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqdecb x0, vl512 uqdecb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecb x0, vl512 // CHECK-NEXT: uqdecb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecb x0, vl9 uqdecb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecb x0, vl9 // CHECK-NEXT: uqdecb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecb x0, #-1 uqdecb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecb x0, #-1 // CHECK-NEXT: uqdecb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecb x0, #32 uqdecb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecb x0, #32 // CHECK-NEXT: uqdecb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqdecd-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqdecd sp // CHECK-NEXT: uqdecd sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned dec only has one register operand) // Operands not matching up (unsigned dec only has one register operand)
uqdecd x0, w0 uqdecd x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecd x0, w0 // CHECK-NEXT: uqdecd x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecd w0, w0 uqdecd w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecd w0, w0 // CHECK-NEXT: uqdecd w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecd x0, x0 uqdecd x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecd x0, x0 // CHECK-NEXT: uqdecd x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqdecd x0, all, mul #-1 uqdecd x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqdecd x0, all, mul #17 // CHECK-NEXT: uqdecd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqdecd x0, vl512 uqdecd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecd x0, vl512 // CHECK-NEXT: uqdecd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecd x0, vl9 uqdecd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecd x0, vl9 // CHECK-NEXT: uqdecd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecd x0, #-1 uqdecd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecd x0, #-1 // CHECK-NEXT: uqdecd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecd x0, #32 uqdecd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecd x0, #32 // CHECK-NEXT: uqdecd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqdech-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqdech sp // CHECK-NEXT: uqdech sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned dec only has one register operand) // Operands not matching up (unsigned dec only has one register operand)
uqdech x0, w0 uqdech x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdech x0, w0 // CHECK-NEXT: uqdech x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdech w0, w0 uqdech w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdech w0, w0 // CHECK-NEXT: uqdech w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdech x0, x0 uqdech x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdech x0, x0 // CHECK-NEXT: uqdech x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqdech x0, all, mul #-1 uqdech x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqdech x0, all, mul #17 // CHECK-NEXT: uqdech x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqdech x0, vl512 uqdech x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdech x0, vl512 // CHECK-NEXT: uqdech x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdech x0, vl9 uqdech x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdech x0, vl9 // CHECK-NEXT: uqdech x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdech x0, #-1 uqdech x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdech x0, #-1 // CHECK-NEXT: uqdech x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdech x0, #32 uqdech x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdech x0, #32 // CHECK-NEXT: uqdech x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqdecw-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqdecw sp // CHECK-NEXT: uqdecw sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned dec only has one register operand) // Operands not matching up (unsigned dec only has one register operand)
uqdecw x0, w0 uqdecw x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecw x0, w0 // CHECK-NEXT: uqdecw x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecw w0, w0 uqdecw w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecw w0, w0 // CHECK-NEXT: uqdecw w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecw x0, x0 uqdecw x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecw x0, x0 // CHECK-NEXT: uqdecw x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqdecw x0, all, mul #-1 uqdecw x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqdecw x0, all, mul #17 // CHECK-NEXT: uqdecw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqdecw x0, vl512 uqdecw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecw x0, vl512 // CHECK-NEXT: uqdecw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecw x0, vl9 uqdecw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqdecw x0, vl9 // CHECK-NEXT: uqdecw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecw x0, #-1 uqdecw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecw x0, #-1 // CHECK-NEXT: uqdecw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqdecw x0, #32 uqdecw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqdecw x0, #32 // CHECK-NEXT: uqdecw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqincb-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqincb sp // CHECK-NEXT: uqincb sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned inc only has one register operand) // Operands not matching up (unsigned inc only has one register operand)
uqincb x0, w0 uqincb x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincb x0, w0 // CHECK-NEXT: uqincb x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincb w0, w0 uqincb w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincb w0, w0 // CHECK-NEXT: uqincb w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincb x0, x0 uqincb x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincb x0, x0 // CHECK-NEXT: uqincb x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqincb x0, all, mul #-1 uqincb x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqincb x0, all, mul #17 // CHECK-NEXT: uqincb x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqincb x0, vl512 uqincb x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincb x0, vl512 // CHECK-NEXT: uqincb x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincb x0, vl9 uqincb x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincb x0, vl9 // CHECK-NEXT: uqincb x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincb x0, #-1 uqincb x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincb x0, #-1 // CHECK-NEXT: uqincb x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincb x0, #32 uqincb x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincb x0, #32 // CHECK-NEXT: uqincb x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqincd-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqincd sp // CHECK-NEXT: uqincd sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned inc only has one register operand) // Operands not matching up (unsigned inc only has one register operand)
uqincd x0, w0 uqincd x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincd x0, w0 // CHECK-NEXT: uqincd x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincd w0, w0 uqincd w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincd w0, w0 // CHECK-NEXT: uqincd w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincd x0, x0 uqincd x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincd x0, x0 // CHECK-NEXT: uqincd x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqincd x0, all, mul #-1 uqincd x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqincd x0, all, mul #17 // CHECK-NEXT: uqincd x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqincd x0, vl512 uqincd x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincd x0, vl512 // CHECK-NEXT: uqincd x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincd x0, vl9 uqincd x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincd x0, vl9 // CHECK-NEXT: uqincd x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincd x0, #-1 uqincd x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincd x0, #-1 // CHECK-NEXT: uqincd x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincd x0, #32 uqincd x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincd x0, #32 // CHECK-NEXT: uqincd x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqinch-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqinch sp // CHECK-NEXT: uqinch sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned inc only has one register operand) // Operands not matching up (unsigned inc only has one register operand)
uqinch x0, w0 uqinch x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqinch x0, w0 // CHECK-NEXT: uqinch x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqinch w0, w0 uqinch w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqinch w0, w0 // CHECK-NEXT: uqinch w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqinch x0, x0 uqinch x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqinch x0, x0 // CHECK-NEXT: uqinch x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqinch x0, all, mul #-1 uqinch x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqinch x0, all, mul #17 // CHECK-NEXT: uqinch x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqinch x0, vl512 uqinch x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqinch x0, vl512 // CHECK-NEXT: uqinch x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqinch x0, vl9 uqinch x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqinch x0, vl9 // CHECK-NEXT: uqinch x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqinch x0, #-1 uqinch x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqinch x0, #-1 // CHECK-NEXT: uqinch x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqinch x0, #32 uqinch x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqinch x0, #32 // CHECK-NEXT: uqinch x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

llvm/trunk/test/MC/AArch64/SVE/uqincw-diagnostics.s

Show All 12 Lines
// CHECK-NEXT: uqincw sp // CHECK-NEXT: uqincw sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Operands not matching up (unsigned inc only has one register operand) // Operands not matching up (unsigned inc only has one register operand)
uqincw x0, w0 uqincw x0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincw x0, w0 // CHECK-NEXT: uqincw x0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincw w0, w0 uqincw w0, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincw w0, w0 // CHECK-NEXT: uqincw w0, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincw x0, x0 uqincw x0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincw x0, x0 // CHECK-NEXT: uqincw x0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Immediate not compatible with encode/decode function. // Immediate not compatible with encode/decode function.
uqincw x0, all, mul #-1 uqincw x0, all, mul #-1
Show All 11 Lines
// CHECK-NEXT: uqincw x0, all, mul #17 // CHECK-NEXT: uqincw x0, all, mul #17
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
// ------------------------------------------------------------------------- // // ------------------------------------------------------------------------- //
// Invalid predicate patterns // Invalid predicate patterns
uqincw x0, vl512 uqincw x0, vl512
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincw x0, vl512 // CHECK-NEXT: uqincw x0, vl512
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincw x0, vl9 uqincw x0, vl9
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: uqincw x0, vl9 // CHECK-NEXT: uqincw x0, vl9
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincw x0, #-1 uqincw x0, #-1
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincw x0, #-1 // CHECK-NEXT: uqincw x0, #-1
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
uqincw x0, #32 uqincw x0, #32
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
// CHECK-NEXT: uqincw x0, #32 // CHECK-NEXT: uqincw x0, #32
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: