AMDGPU: Add 64-bit relative variant kind

[nhaehnle]

What is this actually needed for? Having a relative relocation in a data segment doesn't seem that useful?

[nhaehnle]

In D47601#1120903, @nhaehnle wrote:

What is this actually needed for? Having a relative relocation in a data segment doesn't seem that useful?

Never mind, I see it in the other commit. Could you please update the table of relocation types in AMDGPUUsage.rst? It has an R_AMDGPU_RELATIVE64, I don't know what that's about, but it doesn't mention R_AMDGPU_REL64.

[t-tye]

In D47601#1120916, @nhaehnle wrote:

In D47601#1120903, @nhaehnle wrote:

What is this actually needed for? Having a relative relocation in a data segment doesn't seem that useful?

Never mind, I see it in the other commit. Could you please update the table of relocation types in AMDGPUUsage.rst? It has an R_AMDGPU_RELATIVE64, I don't know what that's about, but it doesn't mention R_AMDGPU_REL64.

The AMDGPU_REL64 is defined in AMDGPUUsage as:

'''
Relocation Type Kind Value Field Calculation
R_AMDGPU_REL64 Static 5 word64 S + A - P
'''

It is a static relocation used to create PC relative values between sections. For example, there is a field in the kernel descriptor that has to be the delta from the kernel descriptor to the kernel entry point. So if the kernel descriptor is put in a different section to the code, a static relocation record is need. It will be resolved when the executable is linked.

The R_AMDGPU_RELATIVE64 is a dynamic relocation record implemented by most targets to support having absolute addresses in data sections that need to be initialized to the address of a symbol in the same shared object. For example, a variable initialized to the address of another variable which is considered a compile time constant in languages such as C/C++.

[kzhuravl]

In D47601#1121159, @t-tye wrote:

In D47601#1120916, @nhaehnle wrote:

In D47601#1120903, @nhaehnle wrote:

What is this actually needed for? Having a relative relocation in a data segment doesn't seem that useful?

Never mind, I see it in the other commit. Could you please update the table of relocation types in AMDGPUUsage.rst? It has an R_AMDGPU_RELATIVE64, I don't know what that's about, but it doesn't mention R_AMDGPU_REL64.

The AMDGPU_REL64 is defined in AMDGPUUsage as:

'''
Relocation Type Kind Value Field Calculation
R_AMDGPU_REL64 Static 5 word64 S + A - P
'''

It is a static relocation used to create PC relative values between sections. For example, there is a field in the kernel descriptor that has to be the delta from the kernel descriptor to the kernel entry point. So if the kernel descriptor is put in a different section to the code, a static relocation record is need. It will be resolved when the executable is linked.

The R_AMDGPU_RELATIVE64 is a dynamic relocation record implemented by most targets to support having absolute addresses in data sections that need to be initialized to the address of a symbol in the same shared object. For example, a variable initialized to the address of another variable which is considered a compile time constant in languages such as C/C++.

Is current wording about R_AMDGPU_REL64 and R_AMDGPU_RELATIVE64 in AMDGPUUsage enough?

[kzhuravl]

Rebase.

[nhaehnle]

Sorry, I somehow managed to miss the REL64 definition. It's fine.

[t-tye]

LGTM

llvm/trunk/include/llvm/MC/MCExpr.h

enum VariantKind : uint16_t {
 
     VK_WebAssembly_FUNCTION, // Function table index, rather than virtual addr
     VK_WebAssembly_TYPEINDEX,// Type table index
 
     VK_AMDGPU_GOTPCREL32_LO, // symbol@gotpcrel32@lo
     VK_AMDGPU_GOTPCREL32_HI, // symbol@gotpcrel32@hi
     VK_AMDGPU_REL32_LO,      // symbol@rel32@lo
     VK_AMDGPU_REL32_HI,      // symbol@rel32@hi
+    VK_AMDGPU_REL64,         // symbol@rel64
 
     VK_TPREL,
     VK_DTPREL
   };
 
 private:
   /// The symbol reference modifier.
   const VariantKind Kind;

llvm/trunk/lib/MC/MCExpr.cpp

StringRef MCSymbolRefExpr::getVariantKindName(VariantKind Kind) {
   case VK_Hexagon_IE: return "IE";
   case VK_Hexagon_IE_GOT: return "IEGOT";
   case VK_WebAssembly_FUNCTION: return "FUNCTION";
   case VK_WebAssembly_TYPEINDEX: return "TYPEINDEX";
   case VK_AMDGPU_GOTPCREL32_LO: return "gotpcrel32@lo";
   case VK_AMDGPU_GOTPCREL32_HI: return "gotpcrel32@hi";
   case VK_AMDGPU_REL32_LO: return "rel32@lo";
   case VK_AMDGPU_REL32_HI: return "rel32@hi";
+  case VK_AMDGPU_REL64: return "rel64";
   }
   llvm_unreachable("Invalid variant kind");
 }
 
 MCSymbolRefExpr::VariantKind
 MCSymbolRefExpr::getVariantKindForName(StringRef Name) {
   return StringSwitch<VariantKind>(Name.lower())
     .Case("dtprel", VK_DTPREL)
return StringSwitch<VariantKind>(Name.lower())
     .Case("hi8", VK_AVR_HI8)
     .Case("hlo8", VK_AVR_HLO8)
     .Case("function", VK_WebAssembly_FUNCTION)
     .Case("typeindex", VK_WebAssembly_TYPEINDEX)
     .Case("gotpcrel32@lo", VK_AMDGPU_GOTPCREL32_LO)
     .Case("gotpcrel32@hi", VK_AMDGPU_GOTPCREL32_HI)
     .Case("rel32@lo", VK_AMDGPU_REL32_LO)
     .Case("rel32@hi", VK_AMDGPU_REL32_HI)
+    .Case("rel64", VK_AMDGPU_REL64)
     .Default(VK_Invalid);
 }
 
 void MCSymbolRefExpr::printVariantKind(raw_ostream &OS) const {
   if (UseParensForSymbolVariant)
     OS << '(' << MCSymbolRefExpr::getVariantKindName(getKind()) << ')';
   else
     OS << '@' << MCSymbolRefExpr::getVariantKindName(getKind());

llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp

unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
   case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO:
     return ELF::R_AMDGPU_GOTPCREL32_LO;
   case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI:
     return ELF::R_AMDGPU_GOTPCREL32_HI;
   case MCSymbolRefExpr::VK_AMDGPU_REL32_LO:
     return ELF::R_AMDGPU_REL32_LO;
   case MCSymbolRefExpr::VK_AMDGPU_REL32_HI:
     return ELF::R_AMDGPU_REL32_HI;
+  case MCSymbolRefExpr::VK_AMDGPU_REL64:
+    return ELF::R_AMDGPU_REL64;
   }
 
   switch (Fixup.getKind()) {
   default: break;
   case FK_PCRel_4:
     return ELF::R_AMDGPU_REL32;
   case FK_Data_4:
   case FK_SecRel_4:

llvm/trunk/test/MC/AMDGPU/reloc.s

 // RUN: llvm-mc -filetype=obj -triple amdgcn-- -mcpu=kaveri -show-encoding %s | llvm-readobj -relocations | FileCheck %s
 
 // CHECK: Relocations [
 // CHECK: .rel.text {
 // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
 // CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
 // CHECK: R_AMDGPU_GOTPCREL global_var0 0x0
 // CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0
 // CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0
 // CHECK: R_AMDGPU_REL32_LO global_var3 0x0
 // CHECK: R_AMDGPU_REL32_HI global_var4 0x0
 // CHECK: R_AMDGPU_ABS32 var 0x0
 // CHECK: }
 // CHECK: .rel.data {
 // CHECK: R_AMDGPU_ABS64 temp 0x0
+// CHECK: R_AMDGPU_REL64 temp 0x0
 // CHECK: }
 // CHECK: ]
 
 kernel:
   s_mov_b32 s0, SCRATCH_RSRC_DWORD0
   s_mov_b32 s1, SCRATCH_RSRC_DWORD1
   s_mov_b32 s2, global_var0@GOTPCREL
   s_mov_b32 s3, global_var1@gotpcrel32@lo
   s_mov_b32 s4, global_var2@gotpcrel32@hi
   s_mov_b32 s5, global_var3@rel32@lo
   s_mov_b32 s6, global_var4@rel32@hi
 
 .globl global_var0
 .globl global_var1
 .globl global_var2
 .globl global_var3
 .globl global_var4
 
 .globl SCRATCH_RSRC_DWORD0
 
 .section nonalloc, "w", @progbits
   .long var, common_var
 
-
 // 8 byte relocations
   .type ptr,@object
   .data
   .globl  ptr
+  .globl  foo
   .p2align  3
 ptr:
   .quad temp
   .size ptr, 8
+foo:
+  .quad temp@rel64
+  .size foo, 8