[PowerPC] Don't transform to CTR loop if the decrement branch instr. would end up in a different loop

[nemanjai]

Summary

This fixes PR37229.

Basically, we don't want to transform a loop to a CTR loop if the decrement-and-branch instruction would end up in an exiting block that is also part of another nested loop. Previously this couldn't happen because of how SCEV computed the trip count. However, the check is fundamentally needed.

[chandlerc]

test/CodeGen/PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll

1–4

I'm really worried that this test is overreduced.

I think you should craft an IR test that directly forms the pattern you describe where an outer loop has an exiting block shared with an inner loop, but the trip count can only be computed for the outer loop.

I'd also encourage you to not have any undef in the branches. Instead, you really just want to have a "real" (if minimal) loop structure.

[efriedma]

lib/Target/PowerPC/PPCCTRLoops.cpp

579

The actual condition you need to check is whether the branch executes exactly once per iteration.

For most code, this check is equivalent, but it's possible to have an irreducible "loop" which is not an LLVM Loop.

[nemanjai]

lib/Target/PowerPC/PPCCTRLoops.cpp

579

Sorry if this is a naive question, but would adding a check that this loop's header dominates the exit block suffice for such a case?

I don't really know what an irreducible loop looks like, but with this question, I'm making the assumption that for such a loop, there would have to be a path to the exit block that doesn't go through the header. Of course, if this assumption is wrong, please correct me.

test/CodeGen/PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll

1–4

Yeah, I took the easy approach of unleashing bugpoint on the original test case. I'll reduce it manually to keep the original structure in the test.

[nemanjai]

I've produced a test case that closely resembles the original CFG. Also updated the condition to hopefully address the valid point that @efriedma brought up.
Please let me know if this is sufficient.

[mkazantsev]

lib/Target/PowerPC/PPCCTRLoops.cpp

578

By definition, loop header dominates all blocks of this loop. So once you've checked that LI->getLoop(*I) is L, it will automatically give you the second part of the check. I think you can assert that DT->dominates(L->getHeader(), *I)) if the first part is true.

[nemanjai]

lib/Target/PowerPC/PPCCTRLoops.cpp

578

Ah, OK. That makes sense. So clearly my condition isn't sufficient to address Eli's comment. If either you or Eli can suggest how I might modify this condition to also address irreducible loops completely nested in the outer loop, I would really appreciate it.

[hfinkel]

lib/Target/PowerPC/PPCCTRLoops.cpp

579

We have a utility for this. ShrinkWrapping uses it:

if (containsIrreducibleCFG<MachineBasicBlock *>(RPOT, *MLI)) {

as does the loop vectorizer:

if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {

I think that you want to do something here very similar to what the loop vectorizer does:

static void collectSupportedLoops(Loop &L, LoopInfo *LI,

                                OptimizationRemarkEmitter *ORE,
                                SmallVectorImpl<Loop *> &V) {
// Collect inner loops and outer loops without irreducible control flow. For
// now, only collect outer loops that have explicit vectorization hints.
if (L.empty() || (EnableVPlanNativePath && isExplicitVecOuterLoop(&L, ORE))) {
  LoopBlocksRPO RPOT(&L);
  RPOT.perform(LI);
  if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
    V.push_back(&L);
    // TODO: Collect inner loops inside marked outer loops in case
    // vectorization fails for the outer loop. Do not invoke
    // 'containsIrreducibleCFG' again for inner loops when the outer loop is
    // already known to be reducible. We can use an inherited attribute for
    // that.
    return;
  }
}
for (Loop *InnerL : L)
  collectSupportedLoops(*InnerL, LI, ORE, V);

}

[mkazantsev]

lib/Target/PowerPC/PPCCTRLoops.cpp

578

I don't think that SCEV will be able to calculate iteration count for a loop with irreducible control flow. Do you have a test when you really need to support it?

[mkazantsev]

lib/Target/PowerPC/PPCCTRLoops.cpp

578

Unless there is a reason why you need it, I would suggest just to limit this transform to the loops that have a single backedge since it's the canonical form.

[efriedma]

lib/Target/PowerPC/PPCCTRLoops.cpp

578

SCEV can compute the trip count for a loop which contains irreducible control flow. For example:

define void @foo(i1 %z) {
entry:
  br label %loophead

loophead:
  %i = phi i32 [ 0, %entry ], [ %inc, %irr_exit ]
  br i1 %z, label %irr_head1, label %irr_head2

irr_head1:
  br label %exiting

irr_head2:
  br label %exiting

exiting:
  %inc = add nuw nsw i32 %i, 1
  %exitcond = icmp eq i32 %inc, 100000
  br i1 %exitcond, label %exit, label %irr_cont

irr_cont:
  br i1 %z, label %irr_cont2, label %irr_exit

irr_cont2:
  br i1 %z, label %irr_head1, label %irr_head2

irr_exit:
  br label %loophead

exit:
  ret void
}

[nemanjai]

Added a check for irreducible CFG within the loop being considered for transformation - thanks for the pointers @efriedma and @hfinkel.
We simply bail out of the transformation if the loop has irreducible control flow rather than analyzing said control flow. This results in a total reduction of 2 loops out of 25,432 that are transformed in a bootstrap build.

[hfinkel]

LGTM

lib/Target/PowerPC/PPCCTRLoops.cpp

if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
       if (ConstEC->getValue()->isZero())
         continue;
     } else if (!SE->isLoopInvariant(EC, L))
       continue;
 
     if (SE->getTypeSizeInBits(EC->getType()) > (TM->isPPC64() ? 64 : 32))
       continue;
 
+    // If this exiting block is contained in a nested loop, it is not eligible
+    // for insertion of the branch-and-decrement since the inner loop would
+    // end up messing up the value in the CTR.
+    if (LI->getLoopFor(*I) != L)
+      continue;
+
     // We now have a loop-invariant count of loop iterations (which is not the
     // constant zero) for which we know that this loop will not exit via this
     // exisiting block.
 
     // We need to make sure that this block will run on every loop iteration.
     // For this to be true, we must dominate all blocks with backedges. Such
     // blocks are in-loop predecessors to the header block.
     bool NotAlways = false;

test/CodeGen/PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
+; RUN:   -verify-machineinstrs < %s | FileCheck %s
+define hidden fastcc void @gen_bitlen() {
+; CHECK-LABEL: gen_bitlen:
+; CHECK-NOT: mtctr
+; CHECK-NOT: bdnz
+; CHECK-NOT: bdz
+; CHECK:     Lfunc_end0
+  br i1 undef, label %lab_1, label %lab_28
+
+lab_1:                                      ; preds = %0
+  br label %lab_2
+
+lab_2:                                      ; preds = %lab_7, %lab_1
+  br i1 undef, label %lab_7, label %lab_3
+
+lab_3:                                      ; preds = %lab_2
+  br i1 undef, label %lab_5, label %lab_4
+
+lab_4:                                      ; preds = %lab_3
+  br label %lab_5
+
+lab_5:                                      ; preds = %lab_4, %lab_3
+  br i1 undef, label %lab_7, label %lab_6
+
+lab_6:                                      ; preds = %lab_5
+  br label %lab_7
+
+lab_7:                                      ; preds = %lab_6, %lab_5, %lab_2
+  br i1 undef, label %lab_2, label %lab_8
+
+lab_8:                                      ; preds = %lab_7
+  br i1 undef, label %lab_28, label %lab_9
+
+lab_9:                                      ; preds = %lab_8
+  br label %lab_10
+
+lab_10:                                     ; preds = %lab_12, %lab_9
+  br label %lab_11
+
+lab_11:                                     ; preds = %lab_11, %lab_10
+  br i1 undef, label %lab_11, label %lab_12
+
+lab_12:                                     ; preds = %lab_11
+  br i1 undef, label %lab_10, label %lab_13
+
+lab_13:                                     ; preds = %lab_12
+  br i1 undef, label %lab_28, label %lab_14
+
+lab_14:                                     ; preds = %lab_13
+  br label %lab_15
+
+lab_15:                                     ; preds = %lab_27, %lab_14
+  br label %lab_16
+
+lab_16:                                     ; preds = %lab_25, %lab_15
+  %phi_17 = phi i32 [ %add_26, %lab_25 ], [ undef, %lab_15 ]
+  %icmp_18 = icmp eq i32 %phi_17, 0
+  br label %lab_19
+
+lab_19:                                     ; preds = %lab_20, %lab_16
+  br i1 %icmp_18, label %lab_27, label %lab_20
+
+lab_20:                                     ; preds = %lab_19
+  %ld_21 = load i32, i32* undef, align 4
+  %icmp_22 = icmp sgt i32 %ld_21, 0
+  br i1 %icmp_22, label %lab_19, label %lab_23
+
+lab_23:                                     ; preds = %lab_20
+  br i1 undef, label %lab_25, label %lab_24
+
+lab_24:                                     ; preds = %lab_23
+  br label %lab_25
+
+lab_25:                                     ; preds = %lab_24, %lab_23
+  %add_26 = add nsw i32 %phi_17, -1
+  br label %lab_16
+
+lab_27:                                     ; preds = %lab_19
+  br i1 undef, label %lab_28, label %lab_15
+
+lab_28:                                     ; preds = %lab_27, %lab_13, %lab_8, %0
+  ret void
+}