I'd like to use this WIP patch to start a discussion about use-before-def scenarios with debug info intrinsics.
One motivation for preventing use-before-def is to ensure correctness of sinking/hoisting code. For example, if we sink Inst from BB1 to BB2, the debug values for Inst should be moved as well. This is sometimes written as:
Begin = next(Inst.getIterator()) for I in range(Begin, BB.end()): if I.isDebugValue(): break if I.getDebugVariable() == Inst: DbgValuesToSink.push_back(I)
If use-before-def is permitted, we might not sink all the relevant debug intrinsics. There may be debug uses of Inst before Begin. Also, once DbgValuesToSink is processed, there may be leftover debug uses of Inst in BB1 after the final value of I.
To avoid these issues, I propose checking for use-before-def in the IR and MIR verifiers, possibly gated by EXPENSIVE_CHECKS. The IR check catches several issues in a stage2-RelWithDebInfo build. I'd appreciate any feedback on whether or how to enable this check.
Edit: The verifier already has 'verifyDominatesUse'. This patch could be simplified by making use of that.